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wensbroonie
wens
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regulator: mt6358: Use linear voltage helpers for single range regulators
Some of the regulators on the MT6358/MT6366 PMICs have just one linear voltage range. These are the bulk regulators and VSRAM_* LDOs. Currently they are modeled with one linear range, but also have their minimum, maximum, and step voltage described. Convert them to the linear voltage helpers. These helpers are a bit simpler, and we can also drop the linear range definitions. Also reflow the touched lines now that they are shorter. Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20230609083009.2822259-7-wenst@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
1 parent 1ff35e6 commit ea861df

1 file changed

Lines changed: 40 additions & 81 deletions

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‎drivers/regulator/mt6358-regulator.c‎

Lines changed: 40 additions & 81 deletions
Original file line numberDiff line numberDiff line change
@@ -37,7 +37,7 @@ struct mt6358_regulator_info {
3737
#define to_regulator_info(x) container_of((x), struct mt6358_regulator_info, desc)
3838

3939
#define MT6358_BUCK(match, vreg, min, max, step, \
40-
volt_ranges, vosel_mask, _da_vsel_reg, _da_vsel_mask, \
40+
vosel_mask, _da_vsel_reg, _da_vsel_mask, \
4141
_modeset_reg, _modeset_shift) \
4242
[MT6358_ID_##vreg] = { \
4343
.desc = { \
@@ -48,8 +48,8 @@ struct mt6358_regulator_info {
4848
.id = MT6358_ID_##vreg, \
4949
.owner = THIS_MODULE, \
5050
.n_voltages = ((max) - (min)) / (step) + 1, \
51-
.linear_ranges = volt_ranges, \
52-
.n_linear_ranges = ARRAY_SIZE(volt_ranges), \
51+
.min_uV = (min), \
52+
.uV_step = (step), \
5353
.vsel_reg = MT6358_BUCK_##vreg##_ELR0, \
5454
.vsel_mask = vosel_mask, \
5555
.enable_reg = MT6358_BUCK_##vreg##_CON0, \
@@ -89,7 +89,7 @@ struct mt6358_regulator_info {
8989
}
9090

9191
#define MT6358_LDO1(match, vreg, min, max, step, \
92-
volt_ranges, _da_vsel_reg, _da_vsel_mask, \
92+
_da_vsel_reg, _da_vsel_mask, \
9393
vosel, vosel_mask) \
9494
[MT6358_ID_##vreg] = { \
9595
.desc = { \
@@ -100,8 +100,8 @@ struct mt6358_regulator_info {
100100
.id = MT6358_ID_##vreg, \
101101
.owner = THIS_MODULE, \
102102
.n_voltages = ((max) - (min)) / (step) + 1, \
103-
.linear_ranges = volt_ranges, \
104-
.n_linear_ranges = ARRAY_SIZE(volt_ranges), \
103+
.min_uV = (min), \
104+
.uV_step = (step), \
105105
.vsel_reg = vosel, \
106106
.vsel_mask = vosel_mask, \
107107
.enable_reg = MT6358_LDO_##vreg##_CON0, \
@@ -133,7 +133,7 @@ struct mt6358_regulator_info {
133133
}
134134

135135
#define MT6366_BUCK(match, vreg, min, max, step, \
136-
volt_ranges, vosel_mask, _da_vsel_reg, _da_vsel_mask, \
136+
vosel_mask, _da_vsel_reg, _da_vsel_mask, \
137137
_modeset_reg, _modeset_shift) \
138138
[MT6366_ID_##vreg] = { \
139139
.desc = { \
@@ -144,8 +144,8 @@ struct mt6358_regulator_info {
144144
.id = MT6366_ID_##vreg, \
145145
.owner = THIS_MODULE, \
146146
.n_voltages = ((max) - (min)) / (step) + 1, \
147-
.linear_ranges = volt_ranges, \
148-
.n_linear_ranges = ARRAY_SIZE(volt_ranges), \
147+
.min_uV = (min), \
148+
.uV_step = (step), \
149149
.vsel_reg = MT6358_BUCK_##vreg##_ELR0, \
150150
.vsel_mask = vosel_mask, \
151151
.enable_reg = MT6358_BUCK_##vreg##_CON0, \
@@ -185,7 +185,7 @@ struct mt6358_regulator_info {
185185
}
186186

187187
#define MT6366_LDO1(match, vreg, min, max, step, \
188-
volt_ranges, _da_vsel_reg, _da_vsel_mask, \
188+
_da_vsel_reg, _da_vsel_mask, \
189189
vosel, vosel_mask) \
190190
[MT6366_ID_##vreg] = { \
191191
.desc = { \
@@ -196,8 +196,8 @@ struct mt6358_regulator_info {
196196
.id = MT6366_ID_##vreg, \
197197
.owner = THIS_MODULE, \
198198
.n_voltages = ((max) - (min)) / (step) + 1, \
199-
.linear_ranges = volt_ranges, \
200-
.n_linear_ranges = ARRAY_SIZE(volt_ranges), \
199+
.min_uV = (min), \
200+
.uV_step = (step), \
201201
.vsel_reg = vosel, \
202202
.vsel_mask = vosel_mask, \
203203
.enable_reg = MT6358_LDO_##vreg##_CON0, \
@@ -228,21 +228,6 @@ struct mt6358_regulator_info {
228228
.qi = BIT(15), \
229229
}
230230

231-
static const struct linear_range buck_volt_range1[] = {
232-
REGULATOR_LINEAR_RANGE(500000, 0, 0x7f, 6250),
233-
};
234-
235-
static const struct linear_range buck_volt_range2[] = {
236-
REGULATOR_LINEAR_RANGE(500000, 0, 0x7f, 12500),
237-
};
238-
239-
static const struct linear_range buck_volt_range3[] = {
240-
REGULATOR_LINEAR_RANGE(500000, 0, 0x3f, 50000),
241-
};
242-
243-
static const struct linear_range buck_volt_range4[] = {
244-
REGULATOR_LINEAR_RANGE(1000000, 0, 0x7f, 12500),
245-
};
246231

247232
static const unsigned int vdram2_voltages[] = {
248233
600000, 1800000,
@@ -466,8 +451,8 @@ static unsigned int mt6358_regulator_get_mode(struct regulator_dev *rdev)
466451
}
467452

468453
static const struct regulator_ops mt6358_volt_range_ops = {
469-
.list_voltage = regulator_list_voltage_linear_range,
470-
.map_voltage = regulator_map_voltage_linear_range,
454+
.list_voltage = regulator_list_voltage_linear,
455+
.map_voltage = regulator_map_voltage_linear,
471456
.set_voltage_sel = regulator_set_voltage_sel_regmap,
472457
.get_voltage_sel = mt6358_get_buck_voltage_sel,
473458
.set_voltage_time_sel = regulator_set_voltage_time_sel,
@@ -502,32 +487,23 @@ static const struct regulator_ops mt6358_volt_fixed_ops = {
502487
/* The array is indexed by id(MT6358_ID_XXX) */
503488
static const struct mt6358_regulator_info mt6358_regulators[] = {
504489
MT6358_BUCK("buck_vdram1", VDRAM1, 500000, 2087500, 12500,
505-
buck_volt_range2, 0x7f, MT6358_BUCK_VDRAM1_DBG0, 0x7f,
506-
MT6358_VDRAM1_ANA_CON0, 8),
490+
0x7f, MT6358_BUCK_VDRAM1_DBG0, 0x7f, MT6358_VDRAM1_ANA_CON0, 8),
507491
MT6358_BUCK("buck_vcore", VCORE, 500000, 1293750, 6250,
508-
buck_volt_range1, 0x7f, MT6358_BUCK_VCORE_DBG0, 0x7f,
509-
MT6358_VCORE_VGPU_ANA_CON0, 1),
492+
0x7f, MT6358_BUCK_VCORE_DBG0, 0x7f, MT6358_VCORE_VGPU_ANA_CON0, 1),
510493
MT6358_BUCK("buck_vpa", VPA, 500000, 3650000, 50000,
511-
buck_volt_range3, 0x3f, MT6358_BUCK_VPA_DBG0, 0x3f,
512-
MT6358_VPA_ANA_CON0, 3),
494+
0x3f, MT6358_BUCK_VPA_DBG0, 0x3f, MT6358_VPA_ANA_CON0, 3),
513495
MT6358_BUCK("buck_vproc11", VPROC11, 500000, 1293750, 6250,
514-
buck_volt_range1, 0x7f, MT6358_BUCK_VPROC11_DBG0, 0x7f,
515-
MT6358_VPROC_ANA_CON0, 1),
496+
0x7f, MT6358_BUCK_VPROC11_DBG0, 0x7f, MT6358_VPROC_ANA_CON0, 1),
516497
MT6358_BUCK("buck_vproc12", VPROC12, 500000, 1293750, 6250,
517-
buck_volt_range1, 0x7f, MT6358_BUCK_VPROC12_DBG0, 0x7f,
518-
MT6358_VPROC_ANA_CON0, 2),
498+
0x7f, MT6358_BUCK_VPROC12_DBG0, 0x7f, MT6358_VPROC_ANA_CON0, 2),
519499
MT6358_BUCK("buck_vgpu", VGPU, 500000, 1293750, 6250,
520-
buck_volt_range1, 0x7f, MT6358_BUCK_VGPU_ELR0, 0x7f,
521-
MT6358_VCORE_VGPU_ANA_CON0, 2),
500+
0x7f, MT6358_BUCK_VGPU_ELR0, 0x7f, MT6358_VCORE_VGPU_ANA_CON0, 2),
522501
MT6358_BUCK("buck_vs2", VS2, 500000, 2087500, 12500,
523-
buck_volt_range2, 0x7f, MT6358_BUCK_VS2_DBG0, 0x7f,
524-
MT6358_VS2_ANA_CON0, 8),
502+
0x7f, MT6358_BUCK_VS2_DBG0, 0x7f, MT6358_VS2_ANA_CON0, 8),
525503
MT6358_BUCK("buck_vmodem", VMODEM, 500000, 1293750, 6250,
526-
buck_volt_range1, 0x7f, MT6358_BUCK_VMODEM_DBG0, 0x7f,
527-
MT6358_VMODEM_ANA_CON0, 8),
504+
0x7f, MT6358_BUCK_VMODEM_DBG0, 0x7f, MT6358_VMODEM_ANA_CON0, 8),
528505
MT6358_BUCK("buck_vs1", VS1, 1000000, 2587500, 12500,
529-
buck_volt_range4, 0x7f, MT6358_BUCK_VS1_DBG0, 0x7f,
530-
MT6358_VS1_ANA_CON0, 8),
506+
0x7f, MT6358_BUCK_VS1_DBG0, 0x7f, MT6358_VS1_ANA_CON0, 8),
531507
MT6358_REG_FIXED("ldo_vrf12", VRF12,
532508
MT6358_LDO_VRF12_CON0, 0, 1200000),
533509
MT6358_REG_FIXED("ldo_vio18", VIO18,
@@ -577,48 +553,35 @@ static const struct mt6358_regulator_info mt6358_regulators[] = {
577553
MT6358_LDO("ldo_vsim2", VSIM2, vsim_voltages, vsim_idx,
578554
MT6358_LDO_VSIM2_CON0, 0, MT6358_VSIM2_ANA_CON0, 0xf00),
579555
MT6358_LDO1("ldo_vsram_proc11", VSRAM_PROC11, 500000, 1293750, 6250,
580-
buck_volt_range1, MT6358_LDO_VSRAM_PROC11_DBG0, 0x7f00,
581-
MT6358_LDO_VSRAM_CON0, 0x7f),
556+
MT6358_LDO_VSRAM_PROC11_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON0, 0x7f),
582557
MT6358_LDO1("ldo_vsram_others", VSRAM_OTHERS, 500000, 1293750, 6250,
583-
buck_volt_range1, MT6358_LDO_VSRAM_OTHERS_DBG0, 0x7f00,
584-
MT6358_LDO_VSRAM_CON2, 0x7f),
558+
MT6358_LDO_VSRAM_OTHERS_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON2, 0x7f),
585559
MT6358_LDO1("ldo_vsram_gpu", VSRAM_GPU, 500000, 1293750, 6250,
586-
buck_volt_range1, MT6358_LDO_VSRAM_GPU_DBG0, 0x7f00,
587-
MT6358_LDO_VSRAM_CON3, 0x7f),
560+
MT6358_LDO_VSRAM_GPU_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON3, 0x7f),
588561
MT6358_LDO1("ldo_vsram_proc12", VSRAM_PROC12, 500000, 1293750, 6250,
589-
buck_volt_range1, MT6358_LDO_VSRAM_PROC12_DBG0, 0x7f00,
590-
MT6358_LDO_VSRAM_CON1, 0x7f),
562+
MT6358_LDO_VSRAM_PROC12_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON1, 0x7f),
591563
};
592564

593565
/* The array is indexed by id(MT6366_ID_XXX) */
594566
static const struct mt6358_regulator_info mt6366_regulators[] = {
595567
MT6366_BUCK("buck_vdram1", VDRAM1, 500000, 2087500, 12500,
596-
buck_volt_range2, 0x7f, MT6358_BUCK_VDRAM1_DBG0, 0x7f,
597-
MT6358_VDRAM1_ANA_CON0, 8),
568+
0x7f, MT6358_BUCK_VDRAM1_DBG0, 0x7f, MT6358_VDRAM1_ANA_CON0, 8),
598569
MT6366_BUCK("buck_vcore", VCORE, 500000, 1293750, 6250,
599-
buck_volt_range1, 0x7f, MT6358_BUCK_VCORE_DBG0, 0x7f,
600-
MT6358_VCORE_VGPU_ANA_CON0, 1),
570+
0x7f, MT6358_BUCK_VCORE_DBG0, 0x7f, MT6358_VCORE_VGPU_ANA_CON0, 1),
601571
MT6366_BUCK("buck_vpa", VPA, 500000, 3650000, 50000,
602-
buck_volt_range3, 0x3f, MT6358_BUCK_VPA_DBG0, 0x3f,
603-
MT6358_VPA_ANA_CON0, 3),
572+
0x3f, MT6358_BUCK_VPA_DBG0, 0x3f, MT6358_VPA_ANA_CON0, 3),
604573
MT6366_BUCK("buck_vproc11", VPROC11, 500000, 1293750, 6250,
605-
buck_volt_range1, 0x7f, MT6358_BUCK_VPROC11_DBG0, 0x7f,
606-
MT6358_VPROC_ANA_CON0, 1),
574+
0x7f, MT6358_BUCK_VPROC11_DBG0, 0x7f, MT6358_VPROC_ANA_CON0, 1),
607575
MT6366_BUCK("buck_vproc12", VPROC12, 500000, 1293750, 6250,
608-
buck_volt_range1, 0x7f, MT6358_BUCK_VPROC12_DBG0, 0x7f,
609-
MT6358_VPROC_ANA_CON0, 2),
576+
0x7f, MT6358_BUCK_VPROC12_DBG0, 0x7f, MT6358_VPROC_ANA_CON0, 2),
610577
MT6366_BUCK("buck_vgpu", VGPU, 500000, 1293750, 6250,
611-
buck_volt_range1, 0x7f, MT6358_BUCK_VGPU_ELR0, 0x7f,
612-
MT6358_VCORE_VGPU_ANA_CON0, 2),
578+
0x7f, MT6358_BUCK_VGPU_ELR0, 0x7f, MT6358_VCORE_VGPU_ANA_CON0, 2),
613579
MT6366_BUCK("buck_vs2", VS2, 500000, 2087500, 12500,
614-
buck_volt_range2, 0x7f, MT6358_BUCK_VS2_DBG0, 0x7f,
615-
MT6358_VS2_ANA_CON0, 8),
580+
0x7f, MT6358_BUCK_VS2_DBG0, 0x7f, MT6358_VS2_ANA_CON0, 8),
616581
MT6366_BUCK("buck_vmodem", VMODEM, 500000, 1293750, 6250,
617-
buck_volt_range1, 0x7f, MT6358_BUCK_VMODEM_DBG0, 0x7f,
618-
MT6358_VMODEM_ANA_CON0, 8),
582+
0x7f, MT6358_BUCK_VMODEM_DBG0, 0x7f, MT6358_VMODEM_ANA_CON0, 8),
619583
MT6366_BUCK("buck_vs1", VS1, 1000000, 2587500, 12500,
620-
buck_volt_range4, 0x7f, MT6358_BUCK_VS1_DBG0, 0x7f,
621-
MT6358_VS1_ANA_CON0, 8),
584+
0x7f, MT6358_BUCK_VS1_DBG0, 0x7f, MT6358_VS1_ANA_CON0, 8),
622585
MT6366_REG_FIXED("ldo_vrf12", VRF12,
623586
MT6358_LDO_VRF12_CON0, 0, 1200000),
624587
MT6366_REG_FIXED("ldo_vio18", VIO18,
@@ -657,17 +620,13 @@ static const struct mt6358_regulator_info mt6366_regulators[] = {
657620
MT6366_LDO("ldo_vsim2", VSIM2, vsim_voltages, vsim_idx,
658621
MT6358_LDO_VSIM2_CON0, 0, MT6358_VSIM2_ANA_CON0, 0xf00),
659622
MT6366_LDO1("ldo_vsram_proc11", VSRAM_PROC11, 500000, 1293750, 6250,
660-
buck_volt_range1, MT6358_LDO_VSRAM_PROC11_DBG0, 0x7f00,
661-
MT6358_LDO_VSRAM_CON0, 0x7f),
623+
MT6358_LDO_VSRAM_PROC11_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON0, 0x7f),
662624
MT6366_LDO1("ldo_vsram_others", VSRAM_OTHERS, 500000, 1293750, 6250,
663-
buck_volt_range1, MT6358_LDO_VSRAM_OTHERS_DBG0, 0x7f00,
664-
MT6358_LDO_VSRAM_CON2, 0x7f),
625+
MT6358_LDO_VSRAM_OTHERS_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON2, 0x7f),
665626
MT6366_LDO1("ldo_vsram_gpu", VSRAM_GPU, 500000, 1293750, 6250,
666-
buck_volt_range1, MT6358_LDO_VSRAM_GPU_DBG0, 0x7f00,
667-
MT6358_LDO_VSRAM_CON3, 0x7f),
627+
MT6358_LDO_VSRAM_GPU_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON3, 0x7f),
668628
MT6366_LDO1("ldo_vsram_proc12", VSRAM_PROC12, 500000, 1293750, 6250,
669-
buck_volt_range1, MT6358_LDO_VSRAM_PROC12_DBG0, 0x7f00,
670-
MT6358_LDO_VSRAM_CON1, 0x7f),
629+
MT6358_LDO_VSRAM_PROC12_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON1, 0x7f),
671630
};
672631

673632
static int mt6358_sync_vcn33_setting(struct device *dev)

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