Skip to content

Commit edabcf7

Browse files
mtk-rex-bc-chenbebarino
authored andcommitted
clk: mediatek: reset: Fix written reset bit offset
Original assert/deassert bit is BIT(0), but it's more resonable to modify them to BIT(id % 32) which is based on id. This patch will not influence any previous driver because the reset is only used for thermal. The id (MT8183_INFRACFG_AO_THERM_SW_RST) is 0. Fixes: 64ebb57 ("clk: reset: Modify reset-controller driver") Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220523093346.28493-3-rex-bc.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
1 parent b348c26 commit edabcf7

1 file changed

Lines changed: 2 additions & 2 deletions

File tree

drivers/clk/mediatek/reset.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@ static int mtk_reset_assert_set_clr(struct reset_controller_dev *rcdev,
1818
struct mtk_reset *data = container_of(rcdev, struct mtk_reset, rcdev);
1919
unsigned int reg = data->regofs + ((id / 32) << 4);
2020

21-
return regmap_write(data->regmap, reg, 1);
21+
return regmap_write(data->regmap, reg, BIT(id % 32));
2222
}
2323

2424
static int mtk_reset_deassert_set_clr(struct reset_controller_dev *rcdev,
@@ -27,7 +27,7 @@ static int mtk_reset_deassert_set_clr(struct reset_controller_dev *rcdev,
2727
struct mtk_reset *data = container_of(rcdev, struct mtk_reset, rcdev);
2828
unsigned int reg = data->regofs + ((id / 32) << 4) + 0x4;
2929

30-
return regmap_write(data->regmap, reg, 1);
30+
return regmap_write(data->regmap, reg, BIT(id % 32));
3131
}
3232

3333
static int mtk_reset_assert(struct reset_controller_dev *rcdev,

0 commit comments

Comments
 (0)