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Peter Zijlstra
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x86: Fix CPUIDLE_FLAG_IRQ_ENABLE leaking timer reprogram
intel_idle_irq() re-enables IRQs very early. As a result, an interrupt may fire before mwait() is eventually called. If such an interrupt queues a timer, it may go unnoticed until mwait returns and the idle loop handles the tick re-evaluation. And monitoring TIF_NEED_RESCHED doesn't help because a local timer enqueue doesn't set that flag. The issue is mitigated by the fact that this idle handler is only invoked for shallow C-states when, presumably, the next tick is supposed to be close enough. There may still be rare cases though when the next tick is far away and the selected C-state is shallow, resulting in a timer getting ignored for a while. Fix this with using sti_mwait() whose IRQ-reenablement only triggers upon calling mwait(), dealing with the race while keeping the interrupt latency within acceptable bounds. Fixes: c227233 (intel_idle: enable interrupts before C1 on Xeons) Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Frederic Weisbecker <frederic@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Rafael J. Wysocki <rafael@kernel.org> Link: https://lkml.kernel.org/r/20231115151325.6262-3-frederic@kernel.org
1 parent 7d09a05 commit edc8fc0

2 files changed

Lines changed: 16 additions & 14 deletions

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arch/x86/include/asm/mwait.h

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -124,8 +124,15 @@ static __always_inline void mwait_idle_with_hints(unsigned long eax, unsigned lo
124124
}
125125

126126
__monitor((void *)&current_thread_info()->flags, 0, 0);
127-
if (!need_resched())
128-
__mwait(eax, ecx);
127+
128+
if (!need_resched()) {
129+
if (ecx & 1) {
130+
__mwait(eax, ecx);
131+
} else {
132+
__sti_mwait(eax, ecx);
133+
raw_local_irq_disable();
134+
}
135+
}
129136
}
130137
current_clr_polling();
131138
}

drivers/idle/intel_idle.c

Lines changed: 7 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -131,11 +131,12 @@ static unsigned int mwait_substates __initdata;
131131
#define MWAIT2flg(eax) ((eax & 0xFF) << 24)
132132

133133
static __always_inline int __intel_idle(struct cpuidle_device *dev,
134-
struct cpuidle_driver *drv, int index)
134+
struct cpuidle_driver *drv,
135+
int index, bool irqoff)
135136
{
136137
struct cpuidle_state *state = &drv->states[index];
137138
unsigned long eax = flg2MWAIT(state->flags);
138-
unsigned long ecx = 1; /* break on interrupt flag */
139+
unsigned long ecx = 1*irqoff; /* break on interrupt flag */
139140

140141
mwait_idle_with_hints(eax, ecx);
141142

@@ -159,19 +160,13 @@ static __always_inline int __intel_idle(struct cpuidle_device *dev,
159160
static __cpuidle int intel_idle(struct cpuidle_device *dev,
160161
struct cpuidle_driver *drv, int index)
161162
{
162-
return __intel_idle(dev, drv, index);
163+
return __intel_idle(dev, drv, index, true);
163164
}
164165

165166
static __cpuidle int intel_idle_irq(struct cpuidle_device *dev,
166167
struct cpuidle_driver *drv, int index)
167168
{
168-
int ret;
169-
170-
raw_local_irq_enable();
171-
ret = __intel_idle(dev, drv, index);
172-
raw_local_irq_disable();
173-
174-
return ret;
169+
return __intel_idle(dev, drv, index, false);
175170
}
176171

177172
static __cpuidle int intel_idle_ibrs(struct cpuidle_device *dev,
@@ -184,7 +179,7 @@ static __cpuidle int intel_idle_ibrs(struct cpuidle_device *dev,
184179
if (smt_active)
185180
__update_spec_ctrl(0);
186181

187-
ret = __intel_idle(dev, drv, index);
182+
ret = __intel_idle(dev, drv, index, true);
188183

189184
if (smt_active)
190185
__update_spec_ctrl(spec_ctrl);
@@ -196,7 +191,7 @@ static __cpuidle int intel_idle_xstate(struct cpuidle_device *dev,
196191
struct cpuidle_driver *drv, int index)
197192
{
198193
fpu_idle_fpregs();
199-
return __intel_idle(dev, drv, index);
194+
return __intel_idle(dev, drv, index, true);
200195
}
201196

202197
/**

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