Skip to content

Commit f004442

Browse files
committed
KVM: nVMX: Switch to vmcs01 to update SVI on-demand if L2 is active
If APICv is activated while L2 is running and triggers an SVI update, temporarily load vmcs01 and immediately update SVI instead of deferring the update until the next nested VM-Exit. This will eventually allow killing off kvm_apic_update_hwapic_isr(), and all of nVMX's deferred APICv updates. Reviewed-by: Chao Gao <chao.gao@intel.com> Link: https://patch.msgid.link/20260109034532.1012993-5-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
1 parent 51ca274 commit f004442

3 files changed

Lines changed: 7 additions & 18 deletions

File tree

arch/x86/kvm/vmx/nested.c

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -5139,11 +5139,6 @@ void __nested_vmx_vmexit(struct kvm_vcpu *vcpu, u32 vm_exit_reason,
51395139
vmx_refresh_apicv_exec_ctrl(vcpu);
51405140
}
51415141

5142-
if (vmx->nested.update_vmcs01_hwapic_isr) {
5143-
vmx->nested.update_vmcs01_hwapic_isr = false;
5144-
kvm_apic_update_hwapic_isr(vcpu);
5145-
}
5146-
51475142
if ((vm_exit_reason != -1) &&
51485143
(enable_shadow_vmcs || nested_vmx_is_evmptr12_valid(vmx)))
51495144
vmx->nested.need_vmcs12_to_shadow_sync = true;

arch/x86/kvm/vmx/vmx.c

Lines changed: 7 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -6972,21 +6972,16 @@ void vmx_hwapic_isr_update(struct kvm_vcpu *vcpu, int max_isr)
69726972
u16 status;
69736973
u8 old;
69746974

6975-
/*
6976-
* If L2 is active, defer the SVI update until vmcs01 is loaded, as SVI
6977-
* is only relevant for if and only if Virtual Interrupt Delivery is
6978-
* enabled in vmcs12, and if VID is enabled then L2 EOIs affect L2's
6979-
* vAPIC, not L1's vAPIC. KVM must update vmcs01 on the next nested
6980-
* VM-Exit, otherwise L1 with run with a stale SVI.
6981-
*/
6982-
if (is_guest_mode(vcpu)) {
6983-
to_vmx(vcpu)->nested.update_vmcs01_hwapic_isr = true;
6984-
return;
6985-
}
6986-
69876975
if (max_isr == -1)
69886976
max_isr = 0;
69896977

6978+
/*
6979+
* Always update SVI in vmcs01, as SVI is only relevant for L2 if and
6980+
* only if Virtual Interrupt Delivery is enabled in vmcs12, and if VID
6981+
* is enabled then L2 EOIs affect L2's vAPIC, not L1's vAPIC.
6982+
*/
6983+
guard(vmx_vmcs01)(vcpu);
6984+
69906985
status = vmcs_read16(GUEST_INTR_STATUS);
69916986
old = status >> 8;
69926987
if (max_isr != old) {

arch/x86/kvm/vmx/vmx.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -134,7 +134,6 @@ struct nested_vmx {
134134
bool change_vmcs01_virtual_apic_mode;
135135
bool reload_vmcs01_apic_access_page;
136136
bool update_vmcs01_apicv_status;
137-
bool update_vmcs01_hwapic_isr;
138137

139138
/*
140139
* Enlightened VMCS has been enabled. It does not mean that L1 has to

0 commit comments

Comments
 (0)