Skip to content

Commit f00f367

Browse files
zhangshkwilldeacon
zhangshk
authored and
willdeacon
committed
arm64: perf: Consistently make all event numbers as 16-bits
Arm ARM documents PMU event numbers as 16-bits in the table and more 0x4XXX events have been added in the header file, so use 16-bits for all event numbers and make them consistent. No functional change intended. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will@kernel.org> Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com> Link: https://lore.kernel.org/r/20220303100710.2238-1-zhangshaokun@hisilicon.com Signed-off-by: Will Deacon <will@kernel.org>
1 parent 83f83cc commit f00f367

1 file changed

Lines changed: 149 additions & 149 deletions

File tree

‎arch/arm64/include/asm/perf_event.h‎

Lines changed: 149 additions & 149 deletions
Original file line numberDiff line numberDiff line change
@@ -15,70 +15,70 @@
1515
/*
1616
* Common architectural and microarchitectural event numbers.
1717
*/
18-
#define ARMV8_PMUV3_PERFCTR_SW_INCR 0x00
19-
#define ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL 0x01
20-
#define ARMV8_PMUV3_PERFCTR_L1I_TLB_REFILL 0x02
21-
#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL 0x03
22-
#define ARMV8_PMUV3_PERFCTR_L1D_CACHE 0x04
23-
#define ARMV8_PMUV3_PERFCTR_L1D_TLB_REFILL 0x05
24-
#define ARMV8_PMUV3_PERFCTR_LD_RETIRED 0x06
25-
#define ARMV8_PMUV3_PERFCTR_ST_RETIRED 0x07
26-
#define ARMV8_PMUV3_PERFCTR_INST_RETIRED 0x08
27-
#define ARMV8_PMUV3_PERFCTR_EXC_TAKEN 0x09
28-
#define ARMV8_PMUV3_PERFCTR_EXC_RETURN 0x0A
29-
#define ARMV8_PMUV3_PERFCTR_CID_WRITE_RETIRED 0x0B
30-
#define ARMV8_PMUV3_PERFCTR_PC_WRITE_RETIRED 0x0C
31-
#define ARMV8_PMUV3_PERFCTR_BR_IMMED_RETIRED 0x0D
32-
#define ARMV8_PMUV3_PERFCTR_BR_RETURN_RETIRED 0x0E
33-
#define ARMV8_PMUV3_PERFCTR_UNALIGNED_LDST_RETIRED 0x0F
34-
#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED 0x10
35-
#define ARMV8_PMUV3_PERFCTR_CPU_CYCLES 0x11
36-
#define ARMV8_PMUV3_PERFCTR_BR_PRED 0x12
37-
#define ARMV8_PMUV3_PERFCTR_MEM_ACCESS 0x13
38-
#define ARMV8_PMUV3_PERFCTR_L1I_CACHE 0x14
39-
#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_WB 0x15
40-
#define ARMV8_PMUV3_PERFCTR_L2D_CACHE 0x16
41-
#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_REFILL 0x17
42-
#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_WB 0x18
43-
#define ARMV8_PMUV3_PERFCTR_BUS_ACCESS 0x19
44-
#define ARMV8_PMUV3_PERFCTR_MEMORY_ERROR 0x1A
45-
#define ARMV8_PMUV3_PERFCTR_INST_SPEC 0x1B
46-
#define ARMV8_PMUV3_PERFCTR_TTBR_WRITE_RETIRED 0x1C
47-
#define ARMV8_PMUV3_PERFCTR_BUS_CYCLES 0x1D
48-
#define ARMV8_PMUV3_PERFCTR_CHAIN 0x1E
49-
#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_ALLOCATE 0x1F
50-
#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_ALLOCATE 0x20
51-
#define ARMV8_PMUV3_PERFCTR_BR_RETIRED 0x21
52-
#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED_RETIRED 0x22
53-
#define ARMV8_PMUV3_PERFCTR_STALL_FRONTEND 0x23
54-
#define ARMV8_PMUV3_PERFCTR_STALL_BACKEND 0x24
55-
#define ARMV8_PMUV3_PERFCTR_L1D_TLB 0x25
56-
#define ARMV8_PMUV3_PERFCTR_L1I_TLB 0x26
57-
#define ARMV8_PMUV3_PERFCTR_L2I_CACHE 0x27
58-
#define ARMV8_PMUV3_PERFCTR_L2I_CACHE_REFILL 0x28
59-
#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_ALLOCATE 0x29
60-
#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_REFILL 0x2A
61-
#define ARMV8_PMUV3_PERFCTR_L3D_CACHE 0x2B
62-
#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_WB 0x2C
63-
#define ARMV8_PMUV3_PERFCTR_L2D_TLB_REFILL 0x2D
64-
#define ARMV8_PMUV3_PERFCTR_L2I_TLB_REFILL 0x2E
65-
#define ARMV8_PMUV3_PERFCTR_L2D_TLB 0x2F
66-
#define ARMV8_PMUV3_PERFCTR_L2I_TLB 0x30
67-
#define ARMV8_PMUV3_PERFCTR_REMOTE_ACCESS 0x31
68-
#define ARMV8_PMUV3_PERFCTR_LL_CACHE 0x32
69-
#define ARMV8_PMUV3_PERFCTR_LL_CACHE_MISS 0x33
70-
#define ARMV8_PMUV3_PERFCTR_DTLB_WALK 0x34
71-
#define ARMV8_PMUV3_PERFCTR_ITLB_WALK 0x35
72-
#define ARMV8_PMUV3_PERFCTR_LL_CACHE_RD 0x36
73-
#define ARMV8_PMUV3_PERFCTR_LL_CACHE_MISS_RD 0x37
74-
#define ARMV8_PMUV3_PERFCTR_REMOTE_ACCESS_RD 0x38
75-
#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_LMISS_RD 0x39
76-
#define ARMV8_PMUV3_PERFCTR_OP_RETIRED 0x3A
77-
#define ARMV8_PMUV3_PERFCTR_OP_SPEC 0x3B
78-
#define ARMV8_PMUV3_PERFCTR_STALL 0x3C
79-
#define ARMV8_PMUV3_PERFCTR_STALL_SLOT_BACKEND 0x3D
80-
#define ARMV8_PMUV3_PERFCTR_STALL_SLOT_FRONTEND 0x3E
81-
#define ARMV8_PMUV3_PERFCTR_STALL_SLOT 0x3F
18+
#define ARMV8_PMUV3_PERFCTR_SW_INCR 0x0000
19+
#define ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL 0x0001
20+
#define ARMV8_PMUV3_PERFCTR_L1I_TLB_REFILL 0x0002
21+
#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL 0x0003
22+
#define ARMV8_PMUV3_PERFCTR_L1D_CACHE 0x0004
23+
#define ARMV8_PMUV3_PERFCTR_L1D_TLB_REFILL 0x0005
24+
#define ARMV8_PMUV3_PERFCTR_LD_RETIRED 0x0006
25+
#define ARMV8_PMUV3_PERFCTR_ST_RETIRED 0x0007
26+
#define ARMV8_PMUV3_PERFCTR_INST_RETIRED 0x0008
27+
#define ARMV8_PMUV3_PERFCTR_EXC_TAKEN 0x0009
28+
#define ARMV8_PMUV3_PERFCTR_EXC_RETURN 0x000A
29+
#define ARMV8_PMUV3_PERFCTR_CID_WRITE_RETIRED 0x000B
30+
#define ARMV8_PMUV3_PERFCTR_PC_WRITE_RETIRED 0x000C
31+
#define ARMV8_PMUV3_PERFCTR_BR_IMMED_RETIRED 0x000D
32+
#define ARMV8_PMUV3_PERFCTR_BR_RETURN_RETIRED 0x000E
33+
#define ARMV8_PMUV3_PERFCTR_UNALIGNED_LDST_RETIRED 0x000F
34+
#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED 0x0010
35+
#define ARMV8_PMUV3_PERFCTR_CPU_CYCLES 0x0011
36+
#define ARMV8_PMUV3_PERFCTR_BR_PRED 0x0012
37+
#define ARMV8_PMUV3_PERFCTR_MEM_ACCESS 0x0013
38+
#define ARMV8_PMUV3_PERFCTR_L1I_CACHE 0x0014
39+
#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_WB 0x0015
40+
#define ARMV8_PMUV3_PERFCTR_L2D_CACHE 0x0016
41+
#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_REFILL 0x0017
42+
#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_WB 0x0018
43+
#define ARMV8_PMUV3_PERFCTR_BUS_ACCESS 0x0019
44+
#define ARMV8_PMUV3_PERFCTR_MEMORY_ERROR 0x001A
45+
#define ARMV8_PMUV3_PERFCTR_INST_SPEC 0x001B
46+
#define ARMV8_PMUV3_PERFCTR_TTBR_WRITE_RETIRED 0x001C
47+
#define ARMV8_PMUV3_PERFCTR_BUS_CYCLES 0x001D
48+
#define ARMV8_PMUV3_PERFCTR_CHAIN 0x001E
49+
#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_ALLOCATE 0x001F
50+
#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_ALLOCATE 0x0020
51+
#define ARMV8_PMUV3_PERFCTR_BR_RETIRED 0x0021
52+
#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED_RETIRED 0x0022
53+
#define ARMV8_PMUV3_PERFCTR_STALL_FRONTEND 0x0023
54+
#define ARMV8_PMUV3_PERFCTR_STALL_BACKEND 0x0024
55+
#define ARMV8_PMUV3_PERFCTR_L1D_TLB 0x0025
56+
#define ARMV8_PMUV3_PERFCTR_L1I_TLB 0x0026
57+
#define ARMV8_PMUV3_PERFCTR_L2I_CACHE 0x0027
58+
#define ARMV8_PMUV3_PERFCTR_L2I_CACHE_REFILL 0x0028
59+
#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_ALLOCATE 0x0029
60+
#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_REFILL 0x002A
61+
#define ARMV8_PMUV3_PERFCTR_L3D_CACHE 0x002B
62+
#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_WB 0x002C
63+
#define ARMV8_PMUV3_PERFCTR_L2D_TLB_REFILL 0x002D
64+
#define ARMV8_PMUV3_PERFCTR_L2I_TLB_REFILL 0x002E
65+
#define ARMV8_PMUV3_PERFCTR_L2D_TLB 0x002F
66+
#define ARMV8_PMUV3_PERFCTR_L2I_TLB 0x0030
67+
#define ARMV8_PMUV3_PERFCTR_REMOTE_ACCESS 0x0031
68+
#define ARMV8_PMUV3_PERFCTR_LL_CACHE 0x0032
69+
#define ARMV8_PMUV3_PERFCTR_LL_CACHE_MISS 0x0033
70+
#define ARMV8_PMUV3_PERFCTR_DTLB_WALK 0x0034
71+
#define ARMV8_PMUV3_PERFCTR_ITLB_WALK 0x0035
72+
#define ARMV8_PMUV3_PERFCTR_LL_CACHE_RD 0x0036
73+
#define ARMV8_PMUV3_PERFCTR_LL_CACHE_MISS_RD 0x0037
74+
#define ARMV8_PMUV3_PERFCTR_REMOTE_ACCESS_RD 0x0038
75+
#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_LMISS_RD 0x0039
76+
#define ARMV8_PMUV3_PERFCTR_OP_RETIRED 0x003A
77+
#define ARMV8_PMUV3_PERFCTR_OP_SPEC 0x003B
78+
#define ARMV8_PMUV3_PERFCTR_STALL 0x003C
79+
#define ARMV8_PMUV3_PERFCTR_STALL_SLOT_BACKEND 0x003D
80+
#define ARMV8_PMUV3_PERFCTR_STALL_SLOT_FRONTEND 0x003E
81+
#define ARMV8_PMUV3_PERFCTR_STALL_SLOT 0x003F
8282

8383
/* Statistical profiling extension microarchitectural events */
8484
#define ARMV8_SPE_PERFCTR_SAMPLE_POP 0x4000
@@ -121,91 +121,91 @@
121121
#define ARMV8_MTE_PERFCTR_MEM_ACCESS_CHECKED_WR 0x4026
122122

123123
/* ARMv8 recommended implementation defined event types */
124-
#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_RD 0x40
125-
#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR 0x41
126-
#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_RD 0x42
127-
#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_WR 0x43
128-
#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_INNER 0x44
129-
#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_OUTER 0x45
130-
#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WB_VICTIM 0x46
131-
#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WB_CLEAN 0x47
132-
#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_INVAL 0x48
133-
134-
#define ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_RD 0x4C
135-
#define ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_WR 0x4D
136-
#define ARMV8_IMPDEF_PERFCTR_L1D_TLB_RD 0x4E
137-
#define ARMV8_IMPDEF_PERFCTR_L1D_TLB_WR 0x4F
138-
#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_RD 0x50
139-
#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_WR 0x51
140-
#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_REFILL_RD 0x52
141-
#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_REFILL_WR 0x53
142-
143-
#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_WB_VICTIM 0x56
144-
#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_WB_CLEAN 0x57
145-
#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_INVAL 0x58
146-
147-
#define ARMV8_IMPDEF_PERFCTR_L2D_TLB_REFILL_RD 0x5C
148-
#define ARMV8_IMPDEF_PERFCTR_L2D_TLB_REFILL_WR 0x5D
149-
#define ARMV8_IMPDEF_PERFCTR_L2D_TLB_RD 0x5E
150-
#define ARMV8_IMPDEF_PERFCTR_L2D_TLB_WR 0x5F
151-
#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD 0x60
152-
#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR 0x61
153-
#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_SHARED 0x62
154-
#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_NOT_SHARED 0x63
155-
#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_NORMAL 0x64
156-
#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_PERIPH 0x65
157-
#define ARMV8_IMPDEF_PERFCTR_MEM_ACCESS_RD 0x66
158-
#define ARMV8_IMPDEF_PERFCTR_MEM_ACCESS_WR 0x67
159-
#define ARMV8_IMPDEF_PERFCTR_UNALIGNED_LD_SPEC 0x68
160-
#define ARMV8_IMPDEF_PERFCTR_UNALIGNED_ST_SPEC 0x69
161-
#define ARMV8_IMPDEF_PERFCTR_UNALIGNED_LDST_SPEC 0x6A
162-
163-
#define ARMV8_IMPDEF_PERFCTR_LDREX_SPEC 0x6C
164-
#define ARMV8_IMPDEF_PERFCTR_STREX_PASS_SPEC 0x6D
165-
#define ARMV8_IMPDEF_PERFCTR_STREX_FAIL_SPEC 0x6E
166-
#define ARMV8_IMPDEF_PERFCTR_STREX_SPEC 0x6F
167-
#define ARMV8_IMPDEF_PERFCTR_LD_SPEC 0x70
168-
#define ARMV8_IMPDEF_PERFCTR_ST_SPEC 0x71
169-
#define ARMV8_IMPDEF_PERFCTR_LDST_SPEC 0x72
170-
#define ARMV8_IMPDEF_PERFCTR_DP_SPEC 0x73
171-
#define ARMV8_IMPDEF_PERFCTR_ASE_SPEC 0x74
172-
#define ARMV8_IMPDEF_PERFCTR_VFP_SPEC 0x75
173-
#define ARMV8_IMPDEF_PERFCTR_PC_WRITE_SPEC 0x76
174-
#define ARMV8_IMPDEF_PERFCTR_CRYPTO_SPEC 0x77
175-
#define ARMV8_IMPDEF_PERFCTR_BR_IMMED_SPEC 0x78
176-
#define ARMV8_IMPDEF_PERFCTR_BR_RETURN_SPEC 0x79
177-
#define ARMV8_IMPDEF_PERFCTR_BR_INDIRECT_SPEC 0x7A
178-
179-
#define ARMV8_IMPDEF_PERFCTR_ISB_SPEC 0x7C
180-
#define ARMV8_IMPDEF_PERFCTR_DSB_SPEC 0x7D
181-
#define ARMV8_IMPDEF_PERFCTR_DMB_SPEC 0x7E
182-
183-
#define ARMV8_IMPDEF_PERFCTR_EXC_UNDEF 0x81
184-
#define ARMV8_IMPDEF_PERFCTR_EXC_SVC 0x82
185-
#define ARMV8_IMPDEF_PERFCTR_EXC_PABORT 0x83
186-
#define ARMV8_IMPDEF_PERFCTR_EXC_DABORT 0x84
187-
188-
#define ARMV8_IMPDEF_PERFCTR_EXC_IRQ 0x86
189-
#define ARMV8_IMPDEF_PERFCTR_EXC_FIQ 0x87
190-
#define ARMV8_IMPDEF_PERFCTR_EXC_SMC 0x88
191-
192-
#define ARMV8_IMPDEF_PERFCTR_EXC_HVC 0x8A
193-
#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_PABORT 0x8B
194-
#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_DABORT 0x8C
195-
#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_OTHER 0x8D
196-
#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_IRQ 0x8E
197-
#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_FIQ 0x8F
198-
#define ARMV8_IMPDEF_PERFCTR_RC_LD_SPEC 0x90
199-
#define ARMV8_IMPDEF_PERFCTR_RC_ST_SPEC 0x91
200-
201-
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_RD 0xA0
202-
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_WR 0xA1
203-
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_REFILL_RD 0xA2
204-
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_REFILL_WR 0xA3
205-
206-
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_WB_VICTIM 0xA6
207-
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_WB_CLEAN 0xA7
208-
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_INVAL 0xA8
124+
#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_RD 0x0040
125+
#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR 0x0041
126+
#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_RD 0x0042
127+
#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_WR 0x0043
128+
#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_INNER 0x0044
129+
#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_OUTER 0x0045
130+
#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WB_VICTIM 0x0046
131+
#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WB_CLEAN 0x0047
132+
#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_INVAL 0x0048
133+
134+
#define ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_RD 0x004C
135+
#define ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_WR 0x004D
136+
#define ARMV8_IMPDEF_PERFCTR_L1D_TLB_RD 0x004E
137+
#define ARMV8_IMPDEF_PERFCTR_L1D_TLB_WR 0x004F
138+
#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_RD 0x0050
139+
#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_WR 0x0051
140+
#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_REFILL_RD 0x0052
141+
#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_REFILL_WR 0x0053
142+
143+
#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_WB_VICTIM 0x0056
144+
#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_WB_CLEAN 0x0057
145+
#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_INVAL 0x0058
146+
147+
#define ARMV8_IMPDEF_PERFCTR_L2D_TLB_REFILL_RD 0x005C
148+
#define ARMV8_IMPDEF_PERFCTR_L2D_TLB_REFILL_WR 0x005D
149+
#define ARMV8_IMPDEF_PERFCTR_L2D_TLB_RD 0x005E
150+
#define ARMV8_IMPDEF_PERFCTR_L2D_TLB_WR 0x005F
151+
#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD 0x0060
152+
#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR 0x0061
153+
#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_SHARED 0x0062
154+
#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_NOT_SHARED 0x0063
155+
#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_NORMAL 0x0064
156+
#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_PERIPH 0x0065
157+
#define ARMV8_IMPDEF_PERFCTR_MEM_ACCESS_RD 0x0066
158+
#define ARMV8_IMPDEF_PERFCTR_MEM_ACCESS_WR 0x0067
159+
#define ARMV8_IMPDEF_PERFCTR_UNALIGNED_LD_SPEC 0x0068
160+
#define ARMV8_IMPDEF_PERFCTR_UNALIGNED_ST_SPEC 0x0069
161+
#define ARMV8_IMPDEF_PERFCTR_UNALIGNED_LDST_SPEC 0x006A
162+
163+
#define ARMV8_IMPDEF_PERFCTR_LDREX_SPEC 0x006C
164+
#define ARMV8_IMPDEF_PERFCTR_STREX_PASS_SPEC 0x006D
165+
#define ARMV8_IMPDEF_PERFCTR_STREX_FAIL_SPEC 0x006E
166+
#define ARMV8_IMPDEF_PERFCTR_STREX_SPEC 0x006F
167+
#define ARMV8_IMPDEF_PERFCTR_LD_SPEC 0x0070
168+
#define ARMV8_IMPDEF_PERFCTR_ST_SPEC 0x0071
169+
#define ARMV8_IMPDEF_PERFCTR_LDST_SPEC 0x0072
170+
#define ARMV8_IMPDEF_PERFCTR_DP_SPEC 0x0073
171+
#define ARMV8_IMPDEF_PERFCTR_ASE_SPEC 0x0074
172+
#define ARMV8_IMPDEF_PERFCTR_VFP_SPEC 0x0075
173+
#define ARMV8_IMPDEF_PERFCTR_PC_WRITE_SPEC 0x0076
174+
#define ARMV8_IMPDEF_PERFCTR_CRYPTO_SPEC 0x0077
175+
#define ARMV8_IMPDEF_PERFCTR_BR_IMMED_SPEC 0x0078
176+
#define ARMV8_IMPDEF_PERFCTR_BR_RETURN_SPEC 0x0079
177+
#define ARMV8_IMPDEF_PERFCTR_BR_INDIRECT_SPEC 0x007A
178+
179+
#define ARMV8_IMPDEF_PERFCTR_ISB_SPEC 0x007C
180+
#define ARMV8_IMPDEF_PERFCTR_DSB_SPEC 0x007D
181+
#define ARMV8_IMPDEF_PERFCTR_DMB_SPEC 0x007E
182+
183+
#define ARMV8_IMPDEF_PERFCTR_EXC_UNDEF 0x0081
184+
#define ARMV8_IMPDEF_PERFCTR_EXC_SVC 0x0082
185+
#define ARMV8_IMPDEF_PERFCTR_EXC_PABORT 0x0083
186+
#define ARMV8_IMPDEF_PERFCTR_EXC_DABORT 0x0084
187+
188+
#define ARMV8_IMPDEF_PERFCTR_EXC_IRQ 0x0086
189+
#define ARMV8_IMPDEF_PERFCTR_EXC_FIQ 0x0087
190+
#define ARMV8_IMPDEF_PERFCTR_EXC_SMC 0x0088
191+
192+
#define ARMV8_IMPDEF_PERFCTR_EXC_HVC 0x008A
193+
#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_PABORT 0x008B
194+
#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_DABORT 0x008C
195+
#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_OTHER 0x008D
196+
#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_IRQ 0x008E
197+
#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_FIQ 0x008F
198+
#define ARMV8_IMPDEF_PERFCTR_RC_LD_SPEC 0x0090
199+
#define ARMV8_IMPDEF_PERFCTR_RC_ST_SPEC 0x0091
200+
201+
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_RD 0x00A0
202+
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_WR 0x00A1
203+
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_REFILL_RD 0x00A2
204+
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_REFILL_WR 0x00A3
205+
206+
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_WB_VICTIM 0x00A6
207+
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_WB_CLEAN 0x00A7
208+
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_INVAL 0x00A8
209209

210210
/*
211211
* Per-CPU PMCR: config reg

0 commit comments

Comments
 (0)