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Anshuman Khandualctmarinas
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arm64/sysreg: Convert TRBIDR_EL1 register to automatic generation
This converts TRBIDR_EL1 register to automatic generation without causing any functional change. Cc: Will Deacon <will@kernel.org> Cc: Marc Zyngier <maz@kernel.org> Cc: Mark Brown <broonie@kernel.org> Cc: Rob Herring <robh@kernel.org> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Cc: James Morse <james.morse@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Reviewed-by: Mark Brown <broonie@kernel.org> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230614065949.146187-15-anshuman.khandual@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Lines changed: 13 additions & 6 deletions

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arch/arm64/include/asm/sysreg.h

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@@ -227,14 +227,8 @@
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/*** End of Statistical Profiling Extension ***/
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#define SYS_TRBIDR_EL1 sys_reg(3, 0, 9, 11, 7)
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#define TRBSR_EL1_BSC_MASK GENMASK(5, 0)
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#define TRBSR_EL1_BSC_SHIFT 0
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#define TRBIDR_EL1_F BIT(5)
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#define TRBIDR_EL1_P BIT(4)
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#define TRBIDR_EL1_Align_MASK GENMASK(3, 0)
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#define TRBIDR_EL1_Align_SHIFT 0
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#define SYS_PMINTENSET_EL1 sys_reg(3, 0, 9, 14, 1)
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#define SYS_PMINTENCLR_EL1 sys_reg(3, 0, 9, 14, 2)

arch/arm64/tools/sysreg

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@@ -2319,3 +2319,16 @@ Sysreg TRBTRG_EL1 3 0 9 11 6
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Res0 63:32
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Field 31:0 TRG
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EndSysreg
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Sysreg TRBIDR_EL1 3 0 9 11 7
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Res0 63:12
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Enum 11:8 EA
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0b0000 NON_DESC
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0b0001 IGNORE
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0b0010 SERROR
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EndEnum
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Res0 7:6
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Field 5 F
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Field 4 P
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Field 3:0 Align
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EndSysreg

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