@@ -110,7 +110,7 @@ struct imx_mu_dcfg {
110110 int (* tx )(struct imx_mu_priv * priv , struct imx_mu_con_priv * cp , void * data );
111111 int (* rx )(struct imx_mu_priv * priv , struct imx_mu_con_priv * cp );
112112 int (* rxdb )(struct imx_mu_priv * priv , struct imx_mu_con_priv * cp );
113- void (* init )(struct imx_mu_priv * priv );
113+ int (* init )(struct imx_mu_priv * priv );
114114 enum imx_mu_type type ;
115115 u32 xTR ; /* Transmit Register0 */
116116 u32 xRR ; /* Receive Register0 */
@@ -737,7 +737,7 @@ static struct mbox_chan *imx_mu_seco_xlate(struct mbox_controller *mbox,
737737 return imx_mu_xlate (mbox , sp );
738738}
739739
740- static void imx_mu_init_generic (struct imx_mu_priv * priv )
740+ static int imx_mu_init_generic (struct imx_mu_priv * priv )
741741{
742742 unsigned int i ;
743743 unsigned int val ;
@@ -757,7 +757,7 @@ static void imx_mu_init_generic(struct imx_mu_priv *priv)
757757 priv -> mbox .of_xlate = imx_mu_xlate ;
758758
759759 if (priv -> side_b )
760- return ;
760+ return 0 ;
761761
762762 /* Set default MU configuration */
763763 for (i = 0 ; i < IMX_MU_xCR_MAX ; i ++ )
@@ -770,9 +770,11 @@ static void imx_mu_init_generic(struct imx_mu_priv *priv)
770770 /* Clear any pending RSR */
771771 for (i = 0 ; i < IMX_MU_NUM_RR ; i ++ )
772772 imx_mu_read (priv , priv -> dcfg -> xRR + (i % 4 ) * 4 );
773+
774+ return 0 ;
773775}
774776
775- static void imx_mu_init_specific (struct imx_mu_priv * priv )
777+ static int imx_mu_init_specific (struct imx_mu_priv * priv )
776778{
777779 unsigned int i ;
778780 int num_chans = priv -> dcfg -> type & IMX_MU_V2_S4 ? IMX_MU_S4_CHANS : IMX_MU_SCU_CHANS ;
@@ -794,12 +796,20 @@ static void imx_mu_init_specific(struct imx_mu_priv *priv)
794796 /* Set default MU configuration */
795797 for (i = 0 ; i < IMX_MU_xCR_MAX ; i ++ )
796798 imx_mu_write (priv , 0 , priv -> dcfg -> xCR [i ]);
799+
800+ return 0 ;
797801}
798802
799- static void imx_mu_init_seco (struct imx_mu_priv * priv )
803+ static int imx_mu_init_seco (struct imx_mu_priv * priv )
800804{
801- imx_mu_init_generic (priv );
805+ int ret ;
806+
807+ ret = imx_mu_init_generic (priv );
808+ if (ret )
809+ return ret ;
802810 priv -> mbox .of_xlate = imx_mu_seco_xlate ;
811+
812+ return 0 ;
803813}
804814
805815static int imx_mu_probe (struct platform_device * pdev )
@@ -866,7 +876,11 @@ static int imx_mu_probe(struct platform_device *pdev)
866876
867877 priv -> side_b = of_property_read_bool (np , "fsl,mu-side-b" );
868878
869- priv -> dcfg -> init (priv );
879+ ret = priv -> dcfg -> init (priv );
880+ if (ret ) {
881+ dev_err (dev , "Failed to init MU\n" );
882+ goto disable_clk ;
883+ }
870884
871885 spin_lock_init (& priv -> xcr_lock );
872886
@@ -878,10 +892,8 @@ static int imx_mu_probe(struct platform_device *pdev)
878892 platform_set_drvdata (pdev , priv );
879893
880894 ret = devm_mbox_controller_register (dev , & priv -> mbox );
881- if (ret ) {
882- clk_disable_unprepare (priv -> clk );
883- return ret ;
884- }
895+ if (ret )
896+ goto disable_clk ;
885897
886898 pm_runtime_enable (dev );
887899
@@ -899,6 +911,7 @@ static int imx_mu_probe(struct platform_device *pdev)
899911
900912disable_runtime_pm :
901913 pm_runtime_disable (dev );
914+ disable_clk :
902915 clk_disable_unprepare (priv -> clk );
903916 return ret ;
904917}
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