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Marc Zyngier
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arm64: Convert ID_AA64MMFR0_EL1.TGRAN{4,16,64}_2 to UnsignedEnum
ID_AA64MMFR0_EL1.TGRAN{4,16,64}_2 are currently represented as unordered enumerations. However, the architecture treats them as Unsigned, as hinted to by the MRS data: (FEAT_S2TGran4K <=> (((UInt(ID_AA64MMFR0_EL1.TGran4_2) == 0) && FEAT_TGran4K) || (UInt(ID_AA64MMFR0_EL1.TGran4_2) >= 2)))) and similar descriptions exist for 16 and 64k. This is also confirmed by D24.1.3.3 ("Alternative ID scheme used for ID_AA64MMFR0_EL1 stage 2 granule sizes") in the L.b revision of the ARM ARM. Turn these fields into UnsignedEnum so that we can use the above description more or less literally. Reviewed-by: Fuad Tabba <tabba@google.com> Tested-by: Fuad Tabba <tabba@google.com> Link: https://patch.msgid.link/20251210173024.561160-3-maz@kernel.org Signed-off-by: Marc Zyngier <maz@kernel.org>
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arch/arm64/tools/sysreg

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2098,18 +2098,18 @@ UnsignedEnum 47:44 EXS
20982098
0b0000 NI
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0b0001 IMP
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EndEnum
2101-
Enum 43:40 TGRAN4_2
2101+
UnsignedEnum 43:40 TGRAN4_2
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0b0000 TGRAN4
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0b0001 NI
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0b0010 IMP
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0b0011 52_BIT
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EndEnum
2107-
Enum 39:36 TGRAN64_2
2107+
UnsignedEnum 39:36 TGRAN64_2
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0b0000 TGRAN64
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0b0001 NI
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0b0010 IMP
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EndEnum
2112-
Enum 35:32 TGRAN16_2
2112+
UnsignedEnum 35:32 TGRAN16_2
21132113
0b0000 TGRAN16
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0b0001 NI
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0b0010 IMP

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