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rrendecKAGA-KOKO
rrendec
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KAGA-KOKO
committed
PCI: dwc: Code cleanup
Code cleanup with no functional changes. These changes were originally made by Thomas Gleixner (see Link tag below) in a patch that was never submitted as is. Other parts of that patch were eventually submitted as commit 8e71711 ("PCI: dwc: Switch to msi_create_parent_irq_domain()") and the remaining parts are the code cleanup changes: - Use guard()/scoped_guard() instead of open-coded lock/unlock. - Return void in a few functions whose return value is never used. - Simplify dw_handle_msi_irq() by using for_each_set_bit(). One notable deviation from the original patch is that it reverts back to a simple 1 by 1 iteration over the controllers inside dw_handle_msi_irq. The reason is that with the original changes, the IRQ offset was calculated incorrectly. This prepares the ground for enabling MSI affinity support, which was originally part of that same series that Thomas Gleixner prepared. Originally-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Radu Rendec <rrendec@redhat.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/linux-pci/878qpg4o4t.ffs@tglx/ Link: https://patch.msgid.link/20251128212055.1409093-3-rrendec@redhat.com
1 parent fcc1d0d commit f187509

2 files changed

Lines changed: 34 additions & 71 deletions

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‎drivers/pci/controller/dwc/pcie-designware-host.c‎

Lines changed: 32 additions & 66 deletions
Original file line numberDiff line numberDiff line change
@@ -46,35 +46,25 @@ static const struct msi_parent_ops dw_pcie_msi_parent_ops = {
4646
};
4747

4848
/* MSI int handler */
49-
irqreturn_t dw_handle_msi_irq(struct dw_pcie_rp *pp)
49+
void dw_handle_msi_irq(struct dw_pcie_rp *pp)
5050
{
51-
int i, pos;
52-
unsigned long val;
53-
u32 status, num_ctrls;
54-
irqreturn_t ret = IRQ_NONE;
5551
struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
52+
unsigned int i, num_ctrls;
5653

5754
num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL;
5855

5956
for (i = 0; i < num_ctrls; i++) {
60-
status = dw_pcie_readl_dbi(pci, PCIE_MSI_INTR0_STATUS +
61-
(i * MSI_REG_CTRL_BLOCK_SIZE));
57+
unsigned int reg_off = i * MSI_REG_CTRL_BLOCK_SIZE;
58+
unsigned int irq_off = i * MAX_MSI_IRQS_PER_CTRL;
59+
unsigned long status, pos;
60+
61+
status = dw_pcie_readl_dbi(pci, PCIE_MSI_INTR0_STATUS + reg_off);
6262
if (!status)
6363
continue;
6464

65-
ret = IRQ_HANDLED;
66-
val = status;
67-
pos = 0;
68-
while ((pos = find_next_bit(&val, MAX_MSI_IRQS_PER_CTRL,
69-
pos)) != MAX_MSI_IRQS_PER_CTRL) {
70-
generic_handle_domain_irq(pp->irq_domain,
71-
(i * MAX_MSI_IRQS_PER_CTRL) +
72-
pos);
73-
pos++;
74-
}
65+
for_each_set_bit(pos, &status, MAX_MSI_IRQS_PER_CTRL)
66+
generic_handle_domain_irq(pp->irq_domain, irq_off + pos);
7567
}
76-
77-
return ret;
7868
}
7969

8070
/* Chained MSI interrupt service routine */
@@ -95,13 +85,10 @@ static void dw_pci_setup_msi_msg(struct irq_data *d, struct msi_msg *msg)
9585
{
9686
struct dw_pcie_rp *pp = irq_data_get_irq_chip_data(d);
9787
struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
98-
u64 msi_target;
99-
100-
msi_target = (u64)pp->msi_data;
88+
u64 msi_target = (u64)pp->msi_data;
10189

10290
msg->address_lo = lower_32_bits(msi_target);
10391
msg->address_hi = upper_32_bits(msi_target);
104-
10592
msg->data = d->hwirq;
10693

10794
dev_dbg(pci->dev, "msi#%d address_hi %#x address_lo %#x\n",
@@ -113,37 +100,29 @@ static void dw_pci_bottom_mask(struct irq_data *d)
113100
struct dw_pcie_rp *pp = irq_data_get_irq_chip_data(d);
114101
struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
115102
unsigned int res, bit, ctrl;
116-
unsigned long flags;
117-
118-
raw_spin_lock_irqsave(&pp->lock, flags);
119103

104+
guard(raw_spinlock)(&pp->lock);
120105
ctrl = d->hwirq / MAX_MSI_IRQS_PER_CTRL;
121106
res = ctrl * MSI_REG_CTRL_BLOCK_SIZE;
122107
bit = d->hwirq % MAX_MSI_IRQS_PER_CTRL;
123108

124109
pp->irq_mask[ctrl] |= BIT(bit);
125110
dw_pcie_writel_dbi(pci, PCIE_MSI_INTR0_MASK + res, pp->irq_mask[ctrl]);
126-
127-
raw_spin_unlock_irqrestore(&pp->lock, flags);
128111
}
129112

130113
static void dw_pci_bottom_unmask(struct irq_data *d)
131114
{
132115
struct dw_pcie_rp *pp = irq_data_get_irq_chip_data(d);
133116
struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
134117
unsigned int res, bit, ctrl;
135-
unsigned long flags;
136-
137-
raw_spin_lock_irqsave(&pp->lock, flags);
138118

119+
guard(raw_spinlock)(&pp->lock);
139120
ctrl = d->hwirq / MAX_MSI_IRQS_PER_CTRL;
140121
res = ctrl * MSI_REG_CTRL_BLOCK_SIZE;
141122
bit = d->hwirq % MAX_MSI_IRQS_PER_CTRL;
142123

143124
pp->irq_mask[ctrl] &= ~BIT(bit);
144125
dw_pcie_writel_dbi(pci, PCIE_MSI_INTR0_MASK + res, pp->irq_mask[ctrl]);
145-
146-
raw_spin_unlock_irqrestore(&pp->lock, flags);
147126
}
148127

149128
static void dw_pci_bottom_ack(struct irq_data *d)
@@ -160,54 +139,42 @@ static void dw_pci_bottom_ack(struct irq_data *d)
160139
}
161140

162141
static struct irq_chip dw_pci_msi_bottom_irq_chip = {
163-
.name = "DWPCI-MSI",
164-
.irq_ack = dw_pci_bottom_ack,
165-
.irq_compose_msi_msg = dw_pci_setup_msi_msg,
166-
.irq_mask = dw_pci_bottom_mask,
167-
.irq_unmask = dw_pci_bottom_unmask,
142+
.name = "DWPCI-MSI",
143+
.irq_ack = dw_pci_bottom_ack,
144+
.irq_compose_msi_msg = dw_pci_setup_msi_msg,
145+
.irq_mask = dw_pci_bottom_mask,
146+
.irq_unmask = dw_pci_bottom_unmask,
168147
};
169148

170-
static int dw_pcie_irq_domain_alloc(struct irq_domain *domain,
171-
unsigned int virq, unsigned int nr_irqs,
172-
void *args)
149+
static int dw_pcie_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
150+
unsigned int nr_irqs, void *args)
173151
{
174152
struct dw_pcie_rp *pp = domain->host_data;
175-
unsigned long flags;
176-
u32 i;
177153
int bit;
178154

179-
raw_spin_lock_irqsave(&pp->lock, flags);
180-
181-
bit = bitmap_find_free_region(pp->msi_irq_in_use, pp->num_vectors,
182-
order_base_2(nr_irqs));
183-
184-
raw_spin_unlock_irqrestore(&pp->lock, flags);
155+
scoped_guard (raw_spinlock_irq, &pp->lock) {
156+
bit = bitmap_find_free_region(pp->msi_irq_in_use, pp->num_vectors,
157+
order_base_2(nr_irqs));
158+
}
185159

186160
if (bit < 0)
187161
return -ENOSPC;
188162

189-
for (i = 0; i < nr_irqs; i++)
190-
irq_domain_set_info(domain, virq + i, bit + i,
191-
pp->msi_irq_chip,
192-
pp, handle_edge_irq,
193-
NULL, NULL);
194-
163+
for (unsigned int i = 0; i < nr_irqs; i++) {
164+
irq_domain_set_info(domain, virq + i, bit + i, pp->msi_irq_chip,
165+
pp, handle_edge_irq, NULL, NULL);
166+
}
195167
return 0;
196168
}
197169

198-
static void dw_pcie_irq_domain_free(struct irq_domain *domain,
199-
unsigned int virq, unsigned int nr_irqs)
170+
static void dw_pcie_irq_domain_free(struct irq_domain *domain, unsigned int virq,
171+
unsigned int nr_irqs)
200172
{
201173
struct irq_data *d = irq_domain_get_irq_data(domain, virq);
202174
struct dw_pcie_rp *pp = domain->host_data;
203-
unsigned long flags;
204-
205-
raw_spin_lock_irqsave(&pp->lock, flags);
206175

207-
bitmap_release_region(pp->msi_irq_in_use, d->hwirq,
208-
order_base_2(nr_irqs));
209-
210-
raw_spin_unlock_irqrestore(&pp->lock, flags);
176+
guard(raw_spinlock_irq)(&pp->lock);
177+
bitmap_release_region(pp->msi_irq_in_use, d->hwirq, order_base_2(nr_irqs));
211178
}
212179

213180
static const struct irq_domain_ops dw_pcie_msi_domain_ops = {
@@ -241,8 +208,7 @@ void dw_pcie_free_msi(struct dw_pcie_rp *pp)
241208

242209
for (ctrl = 0; ctrl < MAX_MSI_CTRLS; ctrl++) {
243210
if (pp->msi_irq[ctrl] > 0)
244-
irq_set_chained_handler_and_data(pp->msi_irq[ctrl],
245-
NULL, NULL);
211+
irq_set_chained_handler_and_data(pp->msi_irq[ctrl], NULL, NULL);
246212
}
247213

248214
irq_domain_remove(pp->irq_domain);

‎drivers/pci/controller/dwc/pcie-designware.h‎

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -821,7 +821,7 @@ static inline enum dw_pcie_ltssm dw_pcie_get_ltssm(struct dw_pcie *pci)
821821
#ifdef CONFIG_PCIE_DW_HOST
822822
int dw_pcie_suspend_noirq(struct dw_pcie *pci);
823823
int dw_pcie_resume_noirq(struct dw_pcie *pci);
824-
irqreturn_t dw_handle_msi_irq(struct dw_pcie_rp *pp);
824+
void dw_handle_msi_irq(struct dw_pcie_rp *pp);
825825
void dw_pcie_msi_init(struct dw_pcie_rp *pp);
826826
int dw_pcie_msi_host_init(struct dw_pcie_rp *pp);
827827
void dw_pcie_free_msi(struct dw_pcie_rp *pp);
@@ -842,10 +842,7 @@ static inline int dw_pcie_resume_noirq(struct dw_pcie *pci)
842842
return 0;
843843
}
844844

845-
static inline irqreturn_t dw_handle_msi_irq(struct dw_pcie_rp *pp)
846-
{
847-
return IRQ_NONE;
848-
}
845+
static inline void dw_handle_msi_irq(struct dw_pcie_rp *pp) { }
849846

850847
static inline void dw_pcie_msi_init(struct dw_pcie_rp *pp)
851848
{ }

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