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nehebbroonie
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spi: rb4xx: add COMPILE_TEST support
Copy macros from ath79 SPI driver to allow compilation on all platforms and remove ath79 specific header. Signed-off-by: Rosen Penev <rosenp@gmail.com> Message-ID: <20250826212413.15065-3-rosenp@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
1 parent c73c378 commit f18f0ac

2 files changed

Lines changed: 15 additions & 6 deletions

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drivers/spi/Kconfig

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -916,7 +916,7 @@ config SPI_ROCKCHIP_SFC
916916

917917
config SPI_RB4XX
918918
tristate "Mikrotik RB4XX SPI master"
919-
depends on SPI_MASTER && ATH79
919+
depends on SPI_MASTER && (ATH79 || COMPILE_TEST)
920920
depends on OF
921921
help
922922
SPI controller driver for the Mikrotik RB4xx series boards.

drivers/spi/spi-rb4xx.c

Lines changed: 14 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,16 @@
1616
#include <linux/spi/spi.h>
1717
#include <linux/of.h>
1818

19-
#include <asm/mach-ath79/ar71xx_regs.h>
19+
#define AR71XX_SPI_REG_FS 0x00 /* Function Select */
20+
#define AR71XX_SPI_REG_CTRL 0x04 /* SPI Control */
21+
#define AR71XX_SPI_REG_IOC 0x08 /* SPI I/O Control */
22+
#define AR71XX_SPI_REG_RDS 0x0c /* Read Data Shift */
23+
24+
#define AR71XX_SPI_FS_GPIO BIT(0) /* Enable GPIO mode */
25+
26+
#define AR71XX_SPI_IOC_DO BIT(0) /* Data Out pin */
27+
#define AR71XX_SPI_IOC_CLK BIT(8) /* CLK pin */
28+
#define AR71XX_SPI_IOC_CS(n) BIT(16 + (n))
2029

2130
struct rb4xx_spi {
2231
void __iomem *base;
@@ -63,7 +72,7 @@ static inline void do_spi_clk_two(struct rb4xx_spi *rbspi, u32 spi_ioc,
6372
if (value & BIT(1))
6473
regval |= AR71XX_SPI_IOC_DO;
6574
if (value & BIT(0))
66-
regval |= AR71XX_SPI_IOC_CS2;
75+
regval |= AR71XX_SPI_IOC_CS(2);
6776

6877
rb4xx_write(rbspi, AR71XX_SPI_REG_IOC, regval);
6978
rb4xx_write(rbspi, AR71XX_SPI_REG_IOC, regval | AR71XX_SPI_IOC_CLK);
@@ -89,7 +98,7 @@ static void rb4xx_set_cs(struct spi_device *spi, bool enable)
8998
*/
9099
if (enable)
91100
rb4xx_write(rbspi, AR71XX_SPI_REG_IOC,
92-
AR71XX_SPI_IOC_CS0 | AR71XX_SPI_IOC_CS1);
101+
AR71XX_SPI_IOC_CS(0) | AR71XX_SPI_IOC_CS(1));
93102
}
94103

95104
static int rb4xx_transfer_one(struct spi_controller *host,
@@ -109,10 +118,10 @@ static int rb4xx_transfer_one(struct spi_controller *host,
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*/
110119
if (spi_get_chipselect(spi, 0) == 2)
111120
/* MMC */
112-
spi_ioc = AR71XX_SPI_IOC_CS0;
121+
spi_ioc = AR71XX_SPI_IOC_CS(0);
113122
else
114123
/* Boot flash and CPLD */
115-
spi_ioc = AR71XX_SPI_IOC_CS1;
124+
spi_ioc = AR71XX_SPI_IOC_CS(1);
116125

117126
tx_buf = t->tx_buf;
118127
rx_buf = t->rx_buf;

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