@@ -809,29 +809,22 @@ void amdgpu_bo_unref(struct amdgpu_bo **bo)
809809}
810810
811811/**
812- * amdgpu_bo_pin_restricted - pin an &amdgpu_bo buffer object
812+ * amdgpu_bo_pin - pin an &amdgpu_bo buffer object
813813 * @bo: &amdgpu_bo buffer object to be pinned
814814 * @domain: domain to be pinned to
815- * @min_offset: the start of requested address range
816- * @max_offset: the end of requested address range
817815 *
818- * Pins the buffer object according to requested domain and address range. If
819- * the memory is unbound gart memory, binds the pages into gart table. Adjusts
820- * pin_count and pin_size accordingly.
816+ * Pins the buffer object according to requested domain. If the memory is
817+ * unbound gart memory, binds the pages into gart table. Adjusts pin_count and
818+ * pin_size accordingly.
821819 *
822820 * Pinning means to lock pages in memory along with keeping them at a fixed
823821 * offset. It is required when a buffer can not be moved, for example, when
824822 * a display buffer is being scanned out.
825823 *
826- * Compared with amdgpu_bo_pin(), this function gives more flexibility on
827- * where to pin a buffer if there are specific restrictions on where a buffer
828- * must be located.
829- *
830824 * Returns:
831825 * 0 for success or a negative error code on failure.
832826 */
833- int amdgpu_bo_pin_restricted (struct amdgpu_bo * bo , u32 domain ,
834- u64 min_offset , u64 max_offset )
827+ int amdgpu_bo_pin (struct amdgpu_bo * bo , u32 domain )
835828{
836829 struct amdgpu_device * adev = amdgpu_ttm_adev (bo -> tbo .bdev );
837830 struct ttm_operation_ctx ctx = { false, false };
@@ -840,9 +833,6 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
840833 if (amdgpu_ttm_tt_get_usermm (bo -> tbo .ttm ))
841834 return - EPERM ;
842835
843- if (WARN_ON_ONCE (min_offset > max_offset ))
844- return - EINVAL ;
845-
846836 /* Check domain to be pinned to against preferred domains */
847837 if (bo -> preferred_domains & domain )
848838 domain = bo -> preferred_domains & domain ;
@@ -868,14 +858,6 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
868858 return - EINVAL ;
869859
870860 ttm_bo_pin (& bo -> tbo );
871-
872- if (max_offset != 0 ) {
873- u64 domain_start = amdgpu_ttm_domain_start (adev ,
874- mem_type );
875- WARN_ON_ONCE (max_offset <
876- (amdgpu_bo_gpu_offset (bo ) - domain_start ));
877- }
878-
879861 return 0 ;
880862 }
881863
@@ -892,17 +874,6 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
892874 bo -> flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED ;
893875 amdgpu_bo_placement_from_domain (bo , domain );
894876 for (i = 0 ; i < bo -> placement .num_placement ; i ++ ) {
895- unsigned int fpfn , lpfn ;
896-
897- fpfn = min_offset >> PAGE_SHIFT ;
898- lpfn = max_offset >> PAGE_SHIFT ;
899-
900- if (fpfn > bo -> placements [i ].fpfn )
901- bo -> placements [i ].fpfn = fpfn ;
902- if (!bo -> placements [i ].lpfn ||
903- (lpfn && lpfn < bo -> placements [i ].lpfn ))
904- bo -> placements [i ].lpfn = lpfn ;
905-
906877 if (bo -> flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS &&
907878 bo -> placements [i ].mem_type == TTM_PL_VRAM )
908879 bo -> placements [i ].flags |= TTM_PL_FLAG_CONTIGUOUS ;
@@ -928,23 +899,6 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
928899 return r ;
929900}
930901
931- /**
932- * amdgpu_bo_pin - pin an &amdgpu_bo buffer object
933- * @bo: &amdgpu_bo buffer object to be pinned
934- * @domain: domain to be pinned to
935- *
936- * A simple wrapper to amdgpu_bo_pin_restricted().
937- * Provides a simpler API for buffers that do not have any strict restrictions
938- * on where a buffer must be located.
939- *
940- * Returns:
941- * 0 for success or a negative error code on failure.
942- */
943- int amdgpu_bo_pin (struct amdgpu_bo * bo , u32 domain )
944- {
945- return amdgpu_bo_pin_restricted (bo , domain , 0 , 0 );
946- }
947-
948902/**
949903 * amdgpu_bo_unpin - unpin an &amdgpu_bo buffer object
950904 * @bo: &amdgpu_bo buffer object to be unpinned
0 commit comments