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Merge patch series "riscv: report more ISA extensions through hwprobe"
Clément Léger <cleger@rivosinc.com> says: In order to be able to gather more information about the supported ISA extensions from userspace using the hwprobe syscall, add more ISA extensions report. This series adds the following ISA extensions parsing support: - Zfh[min] - Zvfh[min] - Zihintntl - Zbc - Zvbb - Zvbc - Zvkb - Zvkg - Zvkned - Zvknh[ab] - Zvksed - Zvksh - Zvkn - Zvknc - Zvkng - Zvks - Zvksc - Zvksg - Zvkt - Zfa - Zbkb - Zbkc - Zbkx - Zknd - Zkne - Zknh - Zkr - Zksed - Zksh - Zkt Some of these extensions are actually shorthands for other "sub" extensions. This series includes a patch from Conor/Evan that adds a way to specify such "bundled" extensions. When exposing these bundled extensions to userspace through hwprobe, only the "sub" extensions are exposed. In order to test it, one can use qemu and the small hwprobe utility provided[1]. Run qemu by specifying additional ISA extensions, for instance: $ qemu-system-riscv64 -cpu rv64,v=true,zk=true,zvksh=true,zvkned=true <whatever options you want> Then, run hwprobe: $ ./hwprobe Base system ISA: - IMA_FD - C - V Supported extensions: - Zba - Zbb - Zbs - Zbc - Zbkb - Zbkc - Zbkx - Zknd - Zkne - Zknh - Zkt - Zvkned - Zvksh - Zihintntl - Zfa * b4-shazam-merge: dt-bindings: riscv: add Zfa ISA extension description riscv: hwprobe: export Zfa ISA extension riscv: add ISA extension parsing for Zfa dt-bindings: riscv: add Zvfh[min] ISA extension description riscv: hwprobe: export Zvfh[min] ISA extensions riscv: add ISA extension parsing for Zvfh[min] dt-bindings: riscv: add Zihintntl ISA extension description riscv: hwprobe: export Zhintntl ISA extension riscv: add ISA extension parsing for Zihintntl dt-bindings: riscv: add Zfh[min] ISA extensions description riscv: hwprobe: export Zfh[min] ISA extensions riscv: add ISA extension parsing for Zfh/Zfh[min] dt-bindings: riscv: add vector crypto ISA extensions description riscv: hwprobe: export vector crypto ISA extensions riscv: add ISA extension parsing for vector crypto dt-bindings: riscv: add scalar crypto ISA extensions description riscv: hwprobe: add support for scalar crypto ISA extensions riscv: add ISA extension parsing for scalar crypto riscv: hwprobe: export missing Zbc ISA extension riscv: add ISA extension parsing for Zbc Link: https://lore.kernel.org/r/20231114141256.126749-1-cleger@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2 parents b85ea95 + 9726acf commit f352a28

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‎Documentation/arch/riscv/hwprobe.rst‎

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@@ -80,6 +80,87 @@ The following keys are defined:
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* :c:macro:`RISCV_HWPROBE_EXT_ZICBOZ`: The Zicboz extension is supported, as
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ratified in commit 3dd606f ("Create cmobase-v1.0.pdf") of riscv-CMOs.
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* :c:macro:`RISCV_HWPROBE_EXT_ZBC` The Zbc extension is supported, as defined
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in version 1.0 of the Bit-Manipulation ISA extensions.
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* :c:macro:`RISCV_HWPROBE_EXT_ZBKB` The Zbkb extension is supported, as
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defined in version 1.0 of the Scalar Crypto ISA extensions.
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* :c:macro:`RISCV_HWPROBE_EXT_ZBKC` The Zbkc extension is supported, as
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defined in version 1.0 of the Scalar Crypto ISA extensions.
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* :c:macro:`RISCV_HWPROBE_EXT_ZBKX` The Zbkx extension is supported, as
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defined in version 1.0 of the Scalar Crypto ISA extensions.
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* :c:macro:`RISCV_HWPROBE_EXT_ZKND` The Zknd extension is supported, as
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defined in version 1.0 of the Scalar Crypto ISA extensions.
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* :c:macro:`RISCV_HWPROBE_EXT_ZKNE` The Zkne extension is supported, as
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defined in version 1.0 of the Scalar Crypto ISA extensions.
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* :c:macro:`RISCV_HWPROBE_EXT_ZKNH` The Zknh extension is supported, as
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defined in version 1.0 of the Scalar Crypto ISA extensions.
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* :c:macro:`RISCV_HWPROBE_EXT_ZKSED` The Zksed extension is supported, as
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defined in version 1.0 of the Scalar Crypto ISA extensions.
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* :c:macro:`RISCV_HWPROBE_EXT_ZKSH` The Zksh extension is supported, as
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defined in version 1.0 of the Scalar Crypto ISA extensions.
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* :c:macro:`RISCV_HWPROBE_EXT_ZKT` The Zkt extension is supported, as defined
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in version 1.0 of the Scalar Crypto ISA extensions.
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* :c:macro:`RISCV_HWPROBE_EXT_ZVBB`: The Zvbb extension is supported as
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defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
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* :c:macro:`RISCV_HWPROBE_EXT_ZVBC`: The Zvbc extension is supported as
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defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
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* :c:macro:`RISCV_HWPROBE_EXT_ZVKB`: The Zvkb extension is supported as
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defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
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* :c:macro:`RISCV_HWPROBE_EXT_ZVKG`: The Zvkg extension is supported as
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defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
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* :c:macro:`RISCV_HWPROBE_EXT_ZVKNED`: The Zvkned extension is supported as
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defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
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* :c:macro:`RISCV_HWPROBE_EXT_ZVKNHA`: The Zvknha extension is supported as
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defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
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* :c:macro:`RISCV_HWPROBE_EXT_ZVKNHB`: The Zvknhb extension is supported as
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defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
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* :c:macro:`RISCV_HWPROBE_EXT_ZVKSED`: The Zvksed extension is supported as
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defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
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* :c:macro:`RISCV_HWPROBE_EXT_ZVKSH`: The Zvksh extension is supported as
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defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
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* :c:macro:`RISCV_HWPROBE_EXT_ZVKT`: The Zvkt extension is supported as
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defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
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* :c:macro:`RISCV_HWPROBE_EXT_ZFH`: The Zfh extension version 1.0 is supported
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as defined in the RISC-V ISA manual.
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* :c:macro:`RISCV_HWPROBE_EXT_ZFHMIN`: The Zfhmin extension version 1.0 is
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supported as defined in the RISC-V ISA manual.
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* :c:macro:`RISCV_HWPROBE_EXT_ZIHINTNTL`: The Zihintntl extension version 1.0
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is supported as defined in the RISC-V ISA manual.
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* :c:macro:`RISCV_HWPROBE_EXT_ZVFH`: The Zvfh extension is supported as
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defined in the RISC-V Vector manual starting from commit e2ccd0548d6c
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("Remove draft warnings from Zvfh[min]").
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* :c:macro:`RISCV_HWPROBE_EXT_ZVFHMIN`: The Zvfhmin extension is supported as
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defined in the RISC-V Vector manual starting from commit e2ccd0548d6c
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("Remove draft warnings from Zvfh[min]").
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* :c:macro:`RISCV_HWPROBE_EXT_ZFA`: The Zfa extension is supported as
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defined in the RISC-V ISA manual starting from commit 056b6ff467c7
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("Zfa is ratified").
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* :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: A bitmask that contains performance
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information about the selected set of processors.
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‎Documentation/devicetree/bindings/riscv/extensions.yaml‎

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@@ -190,12 +190,111 @@ properties:
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multiplication as ratified at commit 6d33919 ("Merge pull request
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#158 from hirooih/clmul-fix-loop-end-condition") of riscv-bitmanip.
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- const: zbkb
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description:
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The standard Zbkb bitmanip instructions for cryptography as ratified
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in version 1.0 of RISC-V Cryptography Extensions Volume I
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specification.
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- const: zbkc
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description:
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The standard Zbkc carry-less multiply instructions as ratified
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in version 1.0 of RISC-V Cryptography Extensions Volume I
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specification.
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- const: zbkx
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description:
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The standard Zbkx crossbar permutation instructions as ratified
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in version 1.0 of RISC-V Cryptography Extensions Volume I
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specification.
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- const: zbs
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description: |
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The standard Zbs bit-manipulation extension for single-bit
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instructions as ratified at commit 6d33919 ("Merge pull request #158
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from hirooih/clmul-fix-loop-end-condition") of riscv-bitmanip.
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- const: zfa
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description:
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The standard Zfa extension for additional floating point
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instructions, as ratified in commit 056b6ff ("Zfa is ratified") of
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riscv-isa-manual.
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- const: zfh
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description:
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The standard Zfh extension for 16-bit half-precision binary
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floating-point instructions, as ratified in commit 64074bc ("Update
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version numbers for Zfh/Zfinx") of riscv-isa-manual.
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- const: zfhmin
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description:
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The standard Zfhmin extension which provides minimal support for
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16-bit half-precision binary floating-point instructions, as ratified
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in commit 64074bc ("Update version numbers for Zfh/Zfinx") of
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riscv-isa-manual.
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- const: zk
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description:
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The standard Zk Standard Scalar cryptography extension as ratified
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in version 1.0 of RISC-V Cryptography Extensions Volume I
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specification.
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- const: zkn
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description:
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The standard Zkn NIST algorithm suite extensions as ratified in
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version 1.0 of RISC-V Cryptography Extensions Volume I
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specification.
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- const: zknd
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description: |
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The standard Zknd for NIST suite: AES decryption instructions as
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ratified in version 1.0 of RISC-V Cryptography Extensions Volume I
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specification.
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- const: zkne
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description: |
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The standard Zkne for NIST suite: AES encryption instructions as
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ratified in version 1.0 of RISC-V Cryptography Extensions Volume I
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specification.
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- const: zknh
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description: |
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The standard Zknh for NIST suite: hash function instructions as
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ratified in version 1.0 of RISC-V Cryptography Extensions Volume I
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specification.
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- const: zkr
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description:
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The standard Zkr entropy source extension as ratified in version
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1.0 of RISC-V Cryptography Extensions Volume I specification.
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This string being present means that the CSR associated to this
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extension is accessible at the privilege level to which that
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device-tree has been provided.
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- const: zks
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description:
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The standard Zks ShangMi algorithm suite extensions as ratified in
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version 1.0 of RISC-V Cryptography Extensions Volume I
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specification.
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- const: zksed
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description: |
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The standard Zksed for ShangMi suite: SM4 block cipher instructions
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as ratified in version 1.0 of RISC-V Cryptography Extensions
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Volume I specification.
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- const: zksh
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description: |
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The standard Zksh for ShangMi suite: SM3 hash function instructions
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as ratified in version 1.0 of RISC-V Cryptography Extensions
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Volume I specification.
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- const: zkt
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description:
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The standard Zkt for data independent execution latency as ratified
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in version 1.0 of RISC-V Cryptography Extensions Volume I
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specification.
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- const: zicbom
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description:
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The standard Zicbom extension for base cache management operations as
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The standard Zihintpause extension for pause hints, as ratified in
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commit d8ab5c7 ("Zihintpause is ratified") of the riscv-isa-manual.
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- const: zihintntl
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description:
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The standard Zihintntl extension for non-temporal locality hints, as
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ratified in commit 0dc91f5 ("Zihintntl is ratified") of the
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riscv-isa-manual.
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- const: zihpm
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description:
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The standard Zihpm extension for hardware performance counters, as
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in commit 2e5236 ("Ztso is now ratified.") of the
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riscv-isa-manual.
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- const: zvbb
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description:
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The standard Zvbb extension for vectored basic bit-manipulation
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instructions, as ratified in commit 56ed795 ("Update
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riscv-crypto-spec-vector.adoc") of riscv-crypto.
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- const: zvbc
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description:
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The standard Zvbc extension for vectored carryless multiplication
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instructions, as ratified in commit 56ed795 ("Update
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riscv-crypto-spec-vector.adoc") of riscv-crypto.
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- const: zvfh
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description:
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The standard Zvfh extension for vectored half-precision
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floating-point instructions, as ratified in commit e2ccd05
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("Remove draft warnings from Zvfh[min]") of riscv-v-spec.
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- const: zvfhmin
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description:
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The standard Zvfhmin extension for vectored minimal half-precision
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floating-point instructions, as ratified in commit e2ccd05
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("Remove draft warnings from Zvfh[min]") of riscv-v-spec.
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- const: zvkb
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description:
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The standard Zvkb extension for vector cryptography bit-manipulation
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instructions, as ratified in commit 56ed795 ("Update
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riscv-crypto-spec-vector.adoc") of riscv-crypto.
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- const: zvkg
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description:
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The standard Zvkg extension for vector GCM/GMAC instructions, as
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ratified in commit 56ed795 ("Update riscv-crypto-spec-vector.adoc")
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of riscv-crypto.
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- const: zvkn
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description:
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The standard Zvkn extension for NIST algorithm suite instructions, as
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ratified in commit 56ed795 ("Update riscv-crypto-spec-vector.adoc")
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of riscv-crypto.
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- const: zvknc
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description:
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The standard Zvknc extension for NIST algorithm suite with carryless
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multiply instructions, as ratified in commit 56ed795 ("Update
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riscv-crypto-spec-vector.adoc") of riscv-crypto.
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- const: zvkned
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description:
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The standard Zvkned extension for Vector AES block cipher
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instructions, as ratified in commit 56ed795 ("Update
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riscv-crypto-spec-vector.adoc") of riscv-crypto.
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- const: zvkng
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description:
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The standard Zvkng extension for NIST algorithm suite with GCM
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instructions, as ratified in commit 56ed795 ("Update
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riscv-crypto-spec-vector.adoc") of riscv-crypto.
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- const: zvknha
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description: |
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The standard Zvknha extension for NIST suite: vector SHA-2 secure,
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hash (SHA-256 only) instructions, as ratified in commit
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56ed795 ("Update riscv-crypto-spec-vector.adoc") of riscv-crypto.
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- const: zvknhb
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description: |
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The standard Zvknhb extension for NIST suite: vector SHA-2 secure,
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hash (SHA-256 and SHA-512) instructions, as ratified in commit
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56ed795 ("Update riscv-crypto-spec-vector.adoc") of riscv-crypto.
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- const: zvks
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description:
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The standard Zvks extension for ShangMi algorithm suite
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instructions, as ratified in commit 56ed795 ("Update
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riscv-crypto-spec-vector.adoc") of riscv-crypto.
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- const: zvksc
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description:
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The standard Zvksc extension for ShangMi algorithm suite with
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carryless multiplication instructions, as ratified in commit 56ed795
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("Update riscv-crypto-spec-vector.adoc") of riscv-crypto.
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- const: zvksed
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description: |
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The standard Zvksed extension for ShangMi suite: SM4 block cipher
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instructions, as ratified in commit 56ed795 ("Update
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riscv-crypto-spec-vector.adoc") of riscv-crypto.
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- const: zvksh
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description: |
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The standard Zvksh extension for ShangMi suite: SM3 secure hash
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instructions, as ratified in commit 56ed795 ("Update
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riscv-crypto-spec-vector.adoc") of riscv-crypto.
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- const: zvksg
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description:
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The standard Zvksg extension for ShangMi algorithm suite with GCM
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instructions, as ratified in commit 56ed795 ("Update
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riscv-crypto-spec-vector.adoc") of riscv-crypto.
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- const: zvkt
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description:
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The standard Zvkt extension for vector data-independent execution
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latency, as ratified in commit 56ed795 ("Update
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riscv-crypto-spec-vector.adoc") of riscv-crypto.
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additionalProperties: true
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...

‎arch/riscv/include/asm/cpufeature.h‎

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@@ -59,6 +59,8 @@ struct riscv_isa_ext_data {
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const unsigned int id;
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const char *name;
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const char *property;
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const unsigned int *subset_ext_ids;
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const unsigned int subset_ext_size;
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};
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extern const struct riscv_isa_ext_data riscv_isa_ext[];
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unsigned long riscv_isa_extension_base(const unsigned long *isa_bitmap);
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bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, int bit);
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bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, unsigned int bit);
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#define riscv_isa_extension_available(isa_bitmap, ext) \
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__riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_##ext)
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‎arch/riscv/include/asm/hwcap.h‎

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#define RISCV_ISA_EXT_ZIHPM 42
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#define RISCV_ISA_EXT_SMSTATEEN 43
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#define RISCV_ISA_EXT_ZICOND 44
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#define RISCV_ISA_EXT_ZBC 45
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#define RISCV_ISA_EXT_ZBKB 46
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#define RISCV_ISA_EXT_ZBKC 47
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#define RISCV_ISA_EXT_ZBKX 48
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#define RISCV_ISA_EXT_ZKND 49
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#define RISCV_ISA_EXT_ZKNE 50
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#define RISCV_ISA_EXT_ZKNH 51
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#define RISCV_ISA_EXT_ZKR 52
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#define RISCV_ISA_EXT_ZKSED 53
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#define RISCV_ISA_EXT_ZKSH 54
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#define RISCV_ISA_EXT_ZKT 55
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#define RISCV_ISA_EXT_ZVBB 56
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#define RISCV_ISA_EXT_ZVBC 57
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#define RISCV_ISA_EXT_ZVKB 58
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#define RISCV_ISA_EXT_ZVKG 59
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#define RISCV_ISA_EXT_ZVKNED 60
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#define RISCV_ISA_EXT_ZVKNHA 61
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#define RISCV_ISA_EXT_ZVKNHB 62
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#define RISCV_ISA_EXT_ZVKSED 63
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#define RISCV_ISA_EXT_ZVKSH 64
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#define RISCV_ISA_EXT_ZVKT 65
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#define RISCV_ISA_EXT_ZFH 66
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#define RISCV_ISA_EXT_ZFHMIN 67
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#define RISCV_ISA_EXT_ZIHINTNTL 68
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#define RISCV_ISA_EXT_ZVFH 69
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#define RISCV_ISA_EXT_ZVFHMIN 70
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#define RISCV_ISA_EXT_ZFA 71
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#define RISCV_ISA_EXT_MAX 64
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#define RISCV_ISA_EXT_MAX 128
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#define RISCV_ISA_EXT_INVALID U32_MAX
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#ifdef CONFIG_RISCV_M_MODE
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#define RISCV_ISA_EXT_SxAIA RISCV_ISA_EXT_SMAIA

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