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Merge tag 'qcom-arm64-for-6.8-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
A few more Qualcomm Arm64 DeviceTree updates for v6.8 This corrects the rate of the UTMI clock on IPQ6018 USB0. The SDHCI controller on SC7280 gains missing markings for being cache-coherent. For SC8180X a typo in assignment of PCIe refgen clocks is corrected, PCI controllers are marked cache-coherent, and the USB SS PHY interrupts are corrected to allow wakeup. Similarly USB HS PHY and SS PHY interrupts are corrected to allow wakeup on SDM670. On SM8550 the X3 cluster idle state is properly described, and the latency numbers are adjusted for all the idle states. The PM8550 regulator supplies on X1E are corrected to match the driver and binding, and the timer node is updated to avoid an unnecessary validation error. * tag 'qcom-arm64-for-6.8-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: dts: qcom: sc8180x: Fix up PCIe nodes arm64: dts: qcom: sc8180x: Mark PCIe hosts cache-coherent arm64: dts: qcom: x1e80100-qcp: Fix supplies for some LDOs in PM8550 arm64: dts: qcom: sm8550: Update idle state time requirements arm64: dts: qcom: sm8550: Separate out X3 idle state arm64: dts: qcom: ipq6018: fix clock rates for GCC_USB0_MOCK_UTMI_CLK arm64: dts: qcom: x1e80100: align mem timer size cells with bindings arm64: dts: qcom: sc7280: Mark SDHCI hosts as cache-coherent arm64: dts: qcom: sc8180x: fix USB SS wakeup arm64: dts: qcom: sdm670: fix USB SS wakeup arm64: dts: qcom: sdm670: fix USB DP/DM HS PHY interrupts Link: https://lore.kernel.org/r/20231231034108.3262678-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 parents 2f5ed2c + 78403b3 commit f3a4d7c

7 files changed

Lines changed: 48 additions & 34 deletions

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‎arch/arm64/boot/dts/qcom/ipq6018.dtsi‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -628,7 +628,7 @@
628628
<&gcc GCC_USB0_MOCK_UTMI_CLK>;
629629
assigned-clock-rates = <133330000>,
630630
<133330000>,
631-
<20000000>;
631+
<24000000>;
632632

633633
resets = <&gcc GCC_USB0_BCR>;
634634
status = "disabled";

‎arch/arm64/boot/dts/qcom/sc7280.dtsi‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1000,6 +1000,7 @@
10001000

10011001
bus-width = <8>;
10021002
supports-cqe;
1003+
dma-coherent;
10031004

10041005
qcom,dll-config = <0x0007642c>;
10051006
qcom,ddr-config = <0x80040868>;
@@ -3458,6 +3459,7 @@
34583459
operating-points-v2 = <&sdhc2_opp_table>;
34593460

34603461
bus-width = <4>;
3462+
dma-coherent;
34613463

34623464
qcom,dll-config = <0x0007642c>;
34633465

‎arch/arm64/boot/dts/qcom/sc8180x.dtsi‎

Lines changed: 9 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1751,6 +1751,7 @@
17511751

17521752
phys = <&pcie0_phy>;
17531753
phy-names = "pciephy";
1754+
dma-coherent;
17541755

17551756
status = "disabled";
17561757
};
@@ -1761,7 +1762,7 @@
17611762
clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
17621763
<&gcc GCC_PCIE_0_CFG_AHB_CLK>,
17631764
<&gcc GCC_PCIE_0_CLKREF_CLK>,
1764-
<&gcc GCC_PCIE1_PHY_REFGEN_CLK>,
1765+
<&gcc GCC_PCIE0_PHY_REFGEN_CLK>,
17651766
<&gcc GCC_PCIE_0_PIPE_CLK>;
17661767
clock-names = "aux",
17671768
"cfg_ahb",
@@ -1847,6 +1848,7 @@
18471848

18481849
phys = <&pcie3_phy>;
18491850
phy-names = "pciephy";
1851+
dma-coherent;
18501852

18511853
status = "disabled";
18521854
};
@@ -1857,7 +1859,7 @@
18571859
clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
18581860
<&gcc GCC_PCIE_3_CFG_AHB_CLK>,
18591861
<&gcc GCC_PCIE_3_CLKREF_CLK>,
1860-
<&gcc GCC_PCIE2_PHY_REFGEN_CLK>,
1862+
<&gcc GCC_PCIE3_PHY_REFGEN_CLK>,
18611863
<&gcc GCC_PCIE_3_PIPE_CLK>;
18621864
clock-names = "aux",
18631865
"cfg_ahb",
@@ -1944,6 +1946,7 @@
19441946

19451947
phys = <&pcie1_phy>;
19461948
phy-names = "pciephy";
1949+
dma-coherent;
19471950

19481951
status = "disabled";
19491952
};
@@ -2041,6 +2044,7 @@
20412044

20422045
phys = <&pcie2_phy>;
20432046
phy-names = "pciephy";
2047+
dma-coherent;
20442048

20452049
status = "disabled";
20462050
};
@@ -2059,7 +2063,7 @@
20592063
"refgen",
20602064
"pipe";
20612065
#clock-cells = <0>;
2062-
clock-output-names = "pcie_3_pipe_clk";
2066+
clock-output-names = "pcie_2_pipe_clk";
20632067

20642068
#phy-cells = <0>;
20652069

@@ -2554,7 +2558,7 @@
25542558
compatible = "qcom,sc8180x-dwc3", "qcom,dwc3";
25552559
reg = <0 0x0a6f8800 0 0x400>;
25562560
interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
2557-
<&intc GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
2561+
<&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
25582562
<&pdc 8 IRQ_TYPE_EDGE_BOTH>,
25592563
<&pdc 9 IRQ_TYPE_EDGE_BOTH>;
25602564
interrupt-names = "hs_phy_irq",
@@ -2628,7 +2632,7 @@
26282632
resets = <&gcc GCC_USB30_SEC_BCR>;
26292633
power-domains = <&gcc USB30_SEC_GDSC>;
26302634
interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
2631-
<&intc GIC_SPI 487 IRQ_TYPE_LEVEL_HIGH>,
2635+
<&pdc 7 IRQ_TYPE_LEVEL_HIGH>,
26322636
<&pdc 10 IRQ_TYPE_EDGE_BOTH>,
26332637
<&pdc 11 IRQ_TYPE_EDGE_BOTH>;
26342638
interrupt-names = "hs_phy_irq", "ss_phy_irq",

‎arch/arm64/boot/dts/qcom/sdm670.dtsi‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1320,10 +1320,10 @@
13201320
<&gcc GCC_USB30_PRIM_MASTER_CLK>;
13211321
assigned-clock-rates = <19200000>, <150000000>;
13221322

1323-
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
1324-
<GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
1325-
<GIC_SPI 488 IRQ_TYPE_EDGE_BOTH>,
1326-
<GIC_SPI 489 IRQ_TYPE_EDGE_BOTH>;
1323+
interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
1324+
<&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
1325+
<&pdc 8 IRQ_TYPE_EDGE_BOTH>,
1326+
<&pdc 9 IRQ_TYPE_EDGE_BOTH>;
13271327
interrupt-names = "hs_phy_irq", "ss_phy_irq",
13281328
"dm_hs_phy_irq", "dp_hs_phy_irq";
13291329

‎arch/arm64/boot/dts/qcom/sm8550.dtsi‎

Lines changed: 21 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -285,9 +285,9 @@
285285
compatible = "arm,idle-state";
286286
idle-state-name = "silver-rail-power-collapse";
287287
arm,psci-suspend-param = <0x40000004>;
288-
entry-latency-us = <800>;
288+
entry-latency-us = <550>;
289289
exit-latency-us = <750>;
290-
min-residency-us = <4090>;
290+
min-residency-us = <6700>;
291291
local-timer-stop;
292292
};
293293

@@ -296,8 +296,18 @@
296296
idle-state-name = "gold-rail-power-collapse";
297297
arm,psci-suspend-param = <0x40000004>;
298298
entry-latency-us = <600>;
299-
exit-latency-us = <1550>;
300-
min-residency-us = <4791>;
299+
exit-latency-us = <1300>;
300+
min-residency-us = <8136>;
301+
local-timer-stop;
302+
};
303+
304+
PRIME_CPU_SLEEP_0: cpu-sleep-2-0 {
305+
compatible = "arm,idle-state";
306+
idle-state-name = "goldplus-rail-power-collapse";
307+
arm,psci-suspend-param = <0x40000004>;
308+
entry-latency-us = <500>;
309+
exit-latency-us = <1350>;
310+
min-residency-us = <7480>;
301311
local-timer-stop;
302312
};
303313
};
@@ -306,17 +316,17 @@
306316
CLUSTER_SLEEP_0: cluster-sleep-0 {
307317
compatible = "domain-idle-state";
308318
arm,psci-suspend-param = <0x41000044>;
309-
entry-latency-us = <1050>;
310-
exit-latency-us = <2500>;
311-
min-residency-us = <5309>;
319+
entry-latency-us = <750>;
320+
exit-latency-us = <2350>;
321+
min-residency-us = <9144>;
312322
};
313323

314324
CLUSTER_SLEEP_1: cluster-sleep-1 {
315325
compatible = "domain-idle-state";
316326
arm,psci-suspend-param = <0x4100c344>;
317-
entry-latency-us = <2700>;
318-
exit-latency-us = <3500>;
319-
min-residency-us = <13959>;
327+
entry-latency-us = <2800>;
328+
exit-latency-us = <4400>;
329+
min-residency-us = <10150>;
320330
};
321331
};
322332
};
@@ -401,7 +411,7 @@
401411
CPU_PD7: power-domain-cpu7 {
402412
#power-domain-cells = <0>;
403413
power-domains = <&CLUSTER_PD>;
404-
domain-idle-states = <&BIG_CPU_SLEEP_0>;
414+
domain-idle-states = <&PRIME_CPU_SLEEP_0>;
405415
};
406416

407417
CLUSTER_PD: power-domain-cluster {

‎arch/arm64/boot/dts/qcom/x1e80100-qcp.dts‎

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -40,13 +40,11 @@
4040

4141
vdd-bob1-supply = <&vph_pwr>;
4242
vdd-bob2-supply = <&vph_pwr>;
43-
vdd-l1-supply = <&vreg_s4c_1p8>;
43+
vdd-l1-l4-l10-supply = <&vreg_s4c_1p8>;
4444
vdd-l2-l13-l14-supply = <&vreg_bob1>;
45-
vdd-l4-supply = <&vreg_s4c_1p8>;
4645
vdd-l5-l16-supply = <&vreg_bob1>;
4746
vdd-l6-l7-supply = <&vreg_bob2>;
4847
vdd-l8-l9-supply = <&vreg_bob1>;
49-
vdd-l10-supply = <&vreg_s4c_1p8>;
5048
vdd-l12-supply = <&vreg_s5j_1p2>;
5149
vdd-l15-supply = <&vreg_s4c_1p8>;
5250
vdd-l17-supply = <&vreg_bob2>;

‎arch/arm64/boot/dts/qcom/x1e80100.dtsi‎

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -3418,12 +3418,12 @@
34183418
reg = <0 0x17800000 0 0x1000>;
34193419

34203420
#address-cells = <2>;
3421-
#size-cells = <2>;
3422-
ranges;
3421+
#size-cells = <1>;
3422+
ranges = <0 0 0 0 0x20000000>;
34233423

34243424
frame@17801000 {
3425-
reg = <0 0x17801000 0 0x1000>,
3426-
<0 0x17802000 0 0x1000>;
3425+
reg = <0 0x17801000 0x1000>,
3426+
<0 0x17802000 0x1000>;
34273427

34283428
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
34293429
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
@@ -3432,7 +3432,7 @@
34323432
};
34333433

34343434
frame@17803000 {
3435-
reg = <0 0x17803000 0 0x1000>;
3435+
reg = <0 0x17803000 0x1000>;
34363436

34373437
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
34383438

@@ -3442,7 +3442,7 @@
34423442
};
34433443

34443444
frame@17805000 {
3445-
reg = <0 0x17805000 0 0x1000>;
3445+
reg = <0 0x17805000 0x1000>;
34463446

34473447
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
34483448

@@ -3452,7 +3452,7 @@
34523452
};
34533453

34543454
frame@17807000 {
3455-
reg = <0 0x17807000 0 0x1000>;
3455+
reg = <0 0x17807000 0x1000>;
34563456

34573457
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
34583458

@@ -3462,7 +3462,7 @@
34623462
};
34633463

34643464
frame@17809000 {
3465-
reg = <0 0x17809000 0 0x1000>;
3465+
reg = <0 0x17809000 0x1000>;
34663466

34673467
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
34683468

@@ -3472,7 +3472,7 @@
34723472
};
34733473

34743474
frame@1780b000 {
3475-
reg = <0 0x1780b000 0 0x1000>;
3475+
reg = <0 0x1780b000 0x1000>;
34763476

34773477
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
34783478

@@ -3482,7 +3482,7 @@
34823482
};
34833483

34843484
frame@1780d000 {
3485-
reg = <0 0x1780d000 0 0x1000>;
3485+
reg = <0 0x1780d000 0x1000>;
34863486

34873487
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
34883488

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