@@ -1022,102 +1022,6 @@ static int rt5665_mono_vol_put(struct snd_kcontrol *kcontrol,
10221022 return ret ;
10231023}
10241024
1025- /**
1026- * rt5665_sel_asrc_clk_src - select ASRC clock source for a set of filters
1027- * @component: SoC audio component device.
1028- * @filter_mask: mask of filters.
1029- * @clk_src: clock source
1030- *
1031- * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5665 can
1032- * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
1033- * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
1034- * ASRC function will track i2s clock and generate a corresponding system clock
1035- * for codec. This function provides an API to select the clock source for a
1036- * set of filters specified by the mask. And the codec driver will turn on ASRC
1037- * for these filters if ASRC is selected as their clock source.
1038- */
1039- int rt5665_sel_asrc_clk_src (struct snd_soc_component * component ,
1040- unsigned int filter_mask , unsigned int clk_src )
1041- {
1042- unsigned int asrc2_mask = 0 ;
1043- unsigned int asrc2_value = 0 ;
1044- unsigned int asrc3_mask = 0 ;
1045- unsigned int asrc3_value = 0 ;
1046-
1047- switch (clk_src ) {
1048- case RT5665_CLK_SEL_SYS :
1049- case RT5665_CLK_SEL_I2S1_ASRC :
1050- case RT5665_CLK_SEL_I2S2_ASRC :
1051- case RT5665_CLK_SEL_I2S3_ASRC :
1052- case RT5665_CLK_SEL_SYS2 :
1053- case RT5665_CLK_SEL_SYS3 :
1054- case RT5665_CLK_SEL_SYS4 :
1055- break ;
1056-
1057- default :
1058- return - EINVAL ;
1059- }
1060-
1061- if (filter_mask & RT5665_DA_STEREO1_FILTER ) {
1062- asrc2_mask |= RT5665_DA_STO1_CLK_SEL_MASK ;
1063- asrc2_value = (asrc2_value & ~RT5665_DA_STO1_CLK_SEL_MASK )
1064- | (clk_src << RT5665_DA_STO1_CLK_SEL_SFT );
1065- }
1066-
1067- if (filter_mask & RT5665_DA_STEREO2_FILTER ) {
1068- asrc2_mask |= RT5665_DA_STO2_CLK_SEL_MASK ;
1069- asrc2_value = (asrc2_value & ~RT5665_DA_STO2_CLK_SEL_MASK )
1070- | (clk_src << RT5665_DA_STO2_CLK_SEL_SFT );
1071- }
1072-
1073- if (filter_mask & RT5665_DA_MONO_L_FILTER ) {
1074- asrc2_mask |= RT5665_DA_MONOL_CLK_SEL_MASK ;
1075- asrc2_value = (asrc2_value & ~RT5665_DA_MONOL_CLK_SEL_MASK )
1076- | (clk_src << RT5665_DA_MONOL_CLK_SEL_SFT );
1077- }
1078-
1079- if (filter_mask & RT5665_DA_MONO_R_FILTER ) {
1080- asrc2_mask |= RT5665_DA_MONOR_CLK_SEL_MASK ;
1081- asrc2_value = (asrc2_value & ~RT5665_DA_MONOR_CLK_SEL_MASK )
1082- | (clk_src << RT5665_DA_MONOR_CLK_SEL_SFT );
1083- }
1084-
1085- if (filter_mask & RT5665_AD_STEREO1_FILTER ) {
1086- asrc3_mask |= RT5665_AD_STO1_CLK_SEL_MASK ;
1087- asrc3_value = (asrc2_value & ~RT5665_AD_STO1_CLK_SEL_MASK )
1088- | (clk_src << RT5665_AD_STO1_CLK_SEL_SFT );
1089- }
1090-
1091- if (filter_mask & RT5665_AD_STEREO2_FILTER ) {
1092- asrc3_mask |= RT5665_AD_STO2_CLK_SEL_MASK ;
1093- asrc3_value = (asrc2_value & ~RT5665_AD_STO2_CLK_SEL_MASK )
1094- | (clk_src << RT5665_AD_STO2_CLK_SEL_SFT );
1095- }
1096-
1097- if (filter_mask & RT5665_AD_MONO_L_FILTER ) {
1098- asrc3_mask |= RT5665_AD_MONOL_CLK_SEL_MASK ;
1099- asrc3_value = (asrc3_value & ~RT5665_AD_MONOL_CLK_SEL_MASK )
1100- | (clk_src << RT5665_AD_MONOL_CLK_SEL_SFT );
1101- }
1102-
1103- if (filter_mask & RT5665_AD_MONO_R_FILTER ) {
1104- asrc3_mask |= RT5665_AD_MONOR_CLK_SEL_MASK ;
1105- asrc3_value = (asrc3_value & ~RT5665_AD_MONOR_CLK_SEL_MASK )
1106- | (clk_src << RT5665_AD_MONOR_CLK_SEL_SFT );
1107- }
1108-
1109- if (asrc2_mask )
1110- snd_soc_component_update_bits (component , RT5665_ASRC_2 ,
1111- asrc2_mask , asrc2_value );
1112-
1113- if (asrc3_mask )
1114- snd_soc_component_update_bits (component , RT5665_ASRC_3 ,
1115- asrc3_mask , asrc3_value );
1116-
1117- return 0 ;
1118- }
1119- EXPORT_SYMBOL_GPL (rt5665_sel_asrc_clk_src );
1120-
11211025static int rt5665_button_detect (struct snd_soc_component * component )
11221026{
11231027 int btn_type , val ;
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