@@ -151,8 +151,8 @@ struct zynq_platform_data {
151151 int bank_max [ZYNQMP_GPIO_MAX_BANK ];
152152};
153153
154- static struct irq_chip zynq_gpio_level_irqchip ;
155- static struct irq_chip zynq_gpio_edge_irqchip ;
154+ static const struct irq_chip zynq_gpio_level_irqchip ;
155+ static const struct irq_chip zynq_gpio_edge_irqchip ;
156156
157157/**
158158 * zynq_gpio_is_zynq - test if HW is zynq or zynqmp
@@ -404,9 +404,12 @@ static int zynq_gpio_get_direction(struct gpio_chip *chip, unsigned int pin)
404404static void zynq_gpio_irq_mask (struct irq_data * irq_data )
405405{
406406 unsigned int device_pin_num , bank_num , bank_pin_num ;
407+ const unsigned long offset = irqd_to_hwirq (irq_data );
408+ struct gpio_chip * chip = irq_data_get_irq_chip_data (irq_data );
407409 struct zynq_gpio * gpio =
408410 gpiochip_get_data (irq_data_get_irq_chip_data (irq_data ));
409411
412+ gpiochip_disable_irq (chip , offset );
410413 device_pin_num = irq_data -> hwirq ;
411414 zynq_gpio_get_bank_pin (device_pin_num , & bank_num , & bank_pin_num , gpio );
412415 writel_relaxed (BIT (bank_pin_num ),
@@ -425,9 +428,12 @@ static void zynq_gpio_irq_mask(struct irq_data *irq_data)
425428static void zynq_gpio_irq_unmask (struct irq_data * irq_data )
426429{
427430 unsigned int device_pin_num , bank_num , bank_pin_num ;
431+ const unsigned long offset = irqd_to_hwirq (irq_data );
432+ struct gpio_chip * chip = irq_data_get_irq_chip_data (irq_data );
428433 struct zynq_gpio * gpio =
429434 gpiochip_get_data (irq_data_get_irq_chip_data (irq_data ));
430435
436+ gpiochip_enable_irq (chip , offset );
431437 device_pin_num = irq_data -> hwirq ;
432438 zynq_gpio_get_bank_pin (device_pin_num , & bank_num , & bank_pin_num , gpio );
433439 writel_relaxed (BIT (bank_pin_num ),
@@ -590,7 +596,7 @@ static void zynq_gpio_irq_relres(struct irq_data *d)
590596}
591597
592598/* irq chip descriptor */
593- static struct irq_chip zynq_gpio_level_irqchip = {
599+ static const struct irq_chip zynq_gpio_level_irqchip = {
594600 .name = DRIVER_NAME ,
595601 .irq_enable = zynq_gpio_irq_enable ,
596602 .irq_eoi = zynq_gpio_irq_ack ,
@@ -601,10 +607,11 @@ static struct irq_chip zynq_gpio_level_irqchip = {
601607 .irq_request_resources = zynq_gpio_irq_reqres ,
602608 .irq_release_resources = zynq_gpio_irq_relres ,
603609 .flags = IRQCHIP_EOI_THREADED | IRQCHIP_EOI_IF_HANDLED |
604- IRQCHIP_MASK_ON_SUSPEND ,
610+ IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_IMMUTABLE ,
611+ GPIOCHIP_IRQ_RESOURCE_HELPERS ,
605612};
606613
607- static struct irq_chip zynq_gpio_edge_irqchip = {
614+ static const struct irq_chip zynq_gpio_edge_irqchip = {
608615 .name = DRIVER_NAME ,
609616 .irq_enable = zynq_gpio_irq_enable ,
610617 .irq_ack = zynq_gpio_irq_ack ,
@@ -614,7 +621,8 @@ static struct irq_chip zynq_gpio_edge_irqchip = {
614621 .irq_set_wake = zynq_gpio_set_wake ,
615622 .irq_request_resources = zynq_gpio_irq_reqres ,
616623 .irq_release_resources = zynq_gpio_irq_relres ,
617- .flags = IRQCHIP_MASK_ON_SUSPEND ,
624+ .flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_IMMUTABLE ,
625+ GPIOCHIP_IRQ_RESOURCE_HELPERS ,
618626};
619627
620628static void zynq_gpio_handle_bank_irq (struct zynq_gpio * gpio ,
@@ -962,7 +970,7 @@ static int zynq_gpio_probe(struct platform_device *pdev)
962970
963971 /* Set up the GPIO irqchip */
964972 girq = & chip -> irq ;
965- girq -> chip = & zynq_gpio_edge_irqchip ;
973+ gpio_irq_chip_set_chip ( girq , & zynq_gpio_edge_irqchip ) ;
966974 girq -> parent_handler = zynq_gpio_irqhandler ;
967975 girq -> num_parents = 1 ;
968976 girq -> parents = devm_kcalloc (& pdev -> dev , 1 ,
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