drm/amdgpu: Add flag to enable indirect RLCG access for gfx v9.4.3

victorlu-amd · alexdeucher · commit f64c3fce4604 · 2023-11-09T17:01:01.000-05:00
The "rlcg_reg_access_supported" flag is missing. Add it back in.

Signed-off-by: Victor Lu &lt;victorchengchi.lu@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
@@ -1102,6 +1102,7 @@ static void gfx_v9_4_3_init_rlcg_reg_access_ctrl(struct amdgpu_device *adev)
 		reg_access_ctrl->grbm_idx = SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regGRBM_GFX_INDEX);
 		reg_access_ctrl->spare_int = SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regRLC_SPARE_INT);
 	}
+	adev->gfx.rlc.rlcg_reg_access_supported = true;
 }
 
 static int gfx_v9_4_3_rlc_init(struct amdgpu_device *adev)

Original file line number	Diff line number	Diff line change
`@@ -1102,6 +1102,7 @@ static void gfx_v9_4_3_init_rlcg_reg_access_ctrl(struct amdgpu_device *adev)`
`1102`	`1102`	`reg_access_ctrl->grbm_idx = SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regGRBM_GFX_INDEX);`
`1103`	`1103`	`reg_access_ctrl->spare_int = SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regRLC_SPARE_INT);`
`1104`	`1104`	`}`
	`1105`	`+ adev->gfx.rlc.rlcg_reg_access_supported = true;`
`1105`	`1106`	`}`
`1106`	`1107`
`1107`	`1108`	`static int gfx_v9_4_3_rlc_init(struct amdgpu_device *adev)`