Skip to content

Commit f7ae20f

Browse files
nxpfrankliJonathan Corbet
authored andcommitted
docs: dma: correct dma_set_mask() sample code
There are bunch of codes in driver like if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64))) dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32)) Actually it is wrong because if dma_set_mask_and_coherent(64) fails, dma_set_mask_and_coherent(32) will fail for the same reason. And dma_set_mask_and_coherent(64) never returns failure. According to the definition of dma_set_mask(), it indicates the width of address that device DMA can access. If it can access 64-bit address, it must access 32-bit address inherently. So only need set biggest address width. See below code fragment: dma_set_mask(mask) { mask = (dma_addr_t)mask; if (!dev->dma_mask || !dma_supported(dev, mask)) return -EIO; arch_dma_set_mask(dev, mask); *dev->dma_mask = mask; return 0; } dma_supported() will call dma_direct_supported or iommux's dma_supported call back function. int dma_direct_supported(struct device *dev, u64 mask) { u64 min_mask = (max_pfn - 1) << PAGE_SHIFT; /* * Because 32-bit DMA masks are so common we expect every architecture * to be able to satisfy them - either by not supporting more physical * memory, or by providing a ZONE_DMA32. If neither is the case, the * architecture needs to use an IOMMU instead of the direct mapping. */ if (mask >= DMA_BIT_MASK(32)) return 1; ... } The iommux's dma_supported() actually means iommu requires devices's minimized dma capability. An example: static int sba_dma_supported( struct device *dev, u64 mask)() { ... * check if mask is >= than the current max IO Virt Address * The max IO Virt address will *always* < 30 bits. */ return((int)(mask >= (ioc->ibase - 1 + (ioc->pdir_size / sizeof(u64) * IOVP_SIZE) ))); ... } 1 means supported. 0 means unsupported. Correct document to make it more clear and provide correct sample code. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Jonathan Corbet <corbet@lwn.net> [jc: fixed then/than typo] Link: https://lore.kernel.org/r/20240401174159.642998-1-Frank.Li@nxp.com
1 parent e9c44c1 commit f7ae20f

1 file changed

Lines changed: 22 additions & 2 deletions

File tree

Documentation/core-api/dma-api-howto.rst

Lines changed: 22 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -203,13 +203,33 @@ setting the DMA mask fails. In this manner, if a user of your driver reports
203203
that performance is bad or that the device is not even detected, you can ask
204204
them for the kernel messages to find out exactly why.
205205

206-
The standard 64-bit addressing device would do something like this::
206+
The 24-bit addressing device would do something like this::
207207

208-
if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64))) {
208+
if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(24))) {
209209
dev_warn(dev, "mydev: No suitable DMA available\n");
210210
goto ignore_this_device;
211211
}
212212

213+
The standard 64-bit addressing device would do something like this::
214+
215+
dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64))
216+
217+
dma_set_mask_and_coherent() never return fail when DMA_BIT_MASK(64). Typical
218+
error code like::
219+
220+
/* Wrong code */
221+
if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64)))
222+
dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32))
223+
224+
dma_set_mask_and_coherent() will never return failure when bigger than 32.
225+
So typical code like::
226+
227+
/* Recommended code */
228+
if (support_64bit)
229+
dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));
230+
else
231+
dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
232+
213233
If the device only supports 32-bit addressing for descriptors in the
214234
coherent allocations, but supports full 64-bits for streaming mappings
215235
it would look like this::

0 commit comments

Comments
 (0)