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parisc/unaligned: Rewrite inline assembly of emulate_ldh()
Convert to use real temp variables instead of clobbering processor registers. Signed-off-by: Helge Deller <deller@gmx.de>
1 parent d1434e0 commit f85b2af

1 file changed

Lines changed: 5 additions & 6 deletions

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arch/parisc/kernel/unaligned.c

Lines changed: 5 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -113,23 +113,22 @@ int unaligned_enabled __read_mostly = 1;
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static int emulate_ldh(struct pt_regs *regs, int toreg)
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{
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unsigned long saddr = regs->ior;
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unsigned long val = 0;
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unsigned long val = 0, temp1;
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ASM_EXCEPTIONTABLE_VAR(ret);
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DPRINTF("load " RFMT ":" RFMT " to r%d for 2 bytes\n",
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regs->isr, regs->ior, toreg);
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__asm__ __volatile__ (
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" mtsp %4, %%sr1\n"
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"1: ldbs 0(%%sr1,%3), %%r20\n"
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"1: ldbs 0(%%sr1,%3), %2\n"
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"2: ldbs 1(%%sr1,%3), %0\n"
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" depw %%r20, 23, 24, %0\n"
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" depw %2, 23, 24, %0\n"
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"3: \n"
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ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 3b)
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ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 3b)
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: "=r" (val), "+r" (ret)
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: "0" (val), "r" (saddr), "r" (regs->isr)
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: "r20" );
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: "+r" (val), "+r" (ret), "=&r" (temp1)
131+
: "r" (saddr), "r" (regs->isr) );
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DPRINTF("val = 0x" RFMT "\n", val);
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