Skip to content

Commit f9b11aa

Browse files
robherringwilldeacon
authored andcommitted
KVM: arm64: pmu: Use generated define for PMSELR_EL0.SEL access
ARMV8_PMU_COUNTER_MASK is really a mask for the PMSELR_EL0.SEL register field. Make that clear by adding a standard sysreg definition for the register, and using it instead. Reviewed-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Tested-by: James Clark <james.clark@linaro.org> Link: https://lore.kernel.org/r/20240731-arm-pmu-3-9-icntr-v3-4-280a8d7ff465@kernel.org Signed-off-by: Will Deacon <will@kernel.org>
1 parent 741ee52 commit f9b11aa

4 files changed

Lines changed: 10 additions & 7 deletions

File tree

arch/arm64/include/asm/sysreg.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -403,7 +403,6 @@
403403
#define SYS_PMCNTENCLR_EL0 sys_reg(3, 3, 9, 12, 2)
404404
#define SYS_PMOVSCLR_EL0 sys_reg(3, 3, 9, 12, 3)
405405
#define SYS_PMSWINC_EL0 sys_reg(3, 3, 9, 12, 4)
406-
#define SYS_PMSELR_EL0 sys_reg(3, 3, 9, 12, 5)
407406
#define SYS_PMCEID0_EL0 sys_reg(3, 3, 9, 12, 6)
408407
#define SYS_PMCEID1_EL0 sys_reg(3, 3, 9, 12, 7)
409408
#define SYS_PMCCNTR_EL0 sys_reg(3, 3, 9, 13, 0)

arch/arm64/kvm/sys_regs.c

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -887,7 +887,7 @@ static u64 reset_pmevtyper(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
887887
static u64 reset_pmselr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
888888
{
889889
reset_unknown(vcpu, r);
890-
__vcpu_sys_reg(vcpu, r->reg) &= ARMV8_PMU_COUNTER_MASK;
890+
__vcpu_sys_reg(vcpu, r->reg) &= PMSELR_EL0_SEL_MASK;
891891

892892
return __vcpu_sys_reg(vcpu, r->reg);
893893
}
@@ -979,7 +979,7 @@ static bool access_pmselr(struct kvm_vcpu *vcpu, struct sys_reg_params *p,
979979
else
980980
/* return PMSELR.SEL field */
981981
p->regval = __vcpu_sys_reg(vcpu, PMSELR_EL0)
982-
& ARMV8_PMU_COUNTER_MASK;
982+
& PMSELR_EL0_SEL_MASK;
983983

984984
return true;
985985
}
@@ -1047,8 +1047,8 @@ static bool access_pmu_evcntr(struct kvm_vcpu *vcpu,
10471047
if (pmu_access_event_counter_el0_disabled(vcpu))
10481048
return false;
10491049

1050-
idx = __vcpu_sys_reg(vcpu, PMSELR_EL0)
1051-
& ARMV8_PMU_COUNTER_MASK;
1050+
idx = SYS_FIELD_GET(PMSELR_EL0, SEL,
1051+
__vcpu_sys_reg(vcpu, PMSELR_EL0));
10521052
} else if (r->Op2 == 0) {
10531053
/* PMCCNTR_EL0 */
10541054
if (pmu_access_cycle_counter_el0_disabled(vcpu))
@@ -1098,7 +1098,7 @@ static bool access_pmu_evtyper(struct kvm_vcpu *vcpu, struct sys_reg_params *p,
10981098

10991099
if (r->CRn == 9 && r->CRm == 13 && r->Op2 == 1) {
11001100
/* PMXEVTYPER_EL0 */
1101-
idx = __vcpu_sys_reg(vcpu, PMSELR_EL0) & ARMV8_PMU_COUNTER_MASK;
1101+
idx = SYS_FIELD_GET(PMSELR_EL0, SEL, __vcpu_sys_reg(vcpu, PMSELR_EL0));
11021102
reg = PMEVTYPER0_EL0 + idx;
11031103
} else if (r->CRn == 14 && (r->CRm & 12) == 12) {
11041104
idx = ((r->CRm & 3) << 3) | (r->Op2 & 7);

arch/arm64/tools/sysreg

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2153,6 +2153,11 @@ Field 4 P
21532153
Field 3:0 ALIGN
21542154
EndSysreg
21552155

2156+
Sysreg PMSELR_EL0 3 3 9 12 5
2157+
Res0 63:5
2158+
Field 4:0 SEL
2159+
EndSysreg
2160+
21562161
SysregFields CONTEXTIDR_ELx
21572162
Res0 63:32
21582163
Field 31:0 PROCID

include/linux/perf/arm_pmuv3.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,6 @@
88

99
#define ARMV8_PMU_MAX_GENERAL_COUNTERS 31
1010
#define ARMV8_PMU_MAX_COUNTERS 32
11-
#define ARMV8_PMU_COUNTER_MASK (ARMV8_PMU_MAX_COUNTERS - 1)
1211

1312
/*
1413
* Common architectural and microarchitectural event numbers.

0 commit comments

Comments
 (0)