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Merge tag 'coresight-next-v6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux into char-misc-next
Suzuki writes: coresight: Updates for v6.5 CoreSight and hwtracing subsystem updates for v6.5 includes: - Fixes to the CTI module reference leaks. This involves, redesign of how the helper devices are tracked and CTI devices have been converted to helper devices. - Fix removal of the trctraceidr file from sysfs for ETMs. - Match all ETMv4 instances based on the ETMv4 architected registers and the CoreSight Component ID (CID), than having to add individual PIDs for CPUs. - Add support for Dummy CoreSight source and sink drivers. - Add James Clark as Reviewer for the CoreSight kernel drivers - Fixes to HiSilicon PCIe Tune and Trace Device driver Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> * tag 'coresight-next-v6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux: (27 commits) hwtracing: hisi_ptt: Fix potential sleep in atomic context hwtracing: hisi_ptt: Advertise PERF_PMU_CAP_NO_EXCLUDE for PTT PMU hwtracing: hisi_ptt: Export available filters through sysfs hwtracing: hisi_ptt: Add support for dynamically updating the filter list hwtracing: hisi_ptt: Factor out filter allocation and release operation coresight: dummy: Update type of mode parameter in dummy_{sink,source}_enable() Documentation: trace: Add documentation for Coresight Dummy Trace dt-bindings: arm: Add support for Coresight dummy trace Coresight: Add coresight dummy driver MAINTAINERS: coresight: Add James Clark as Reviewer coresight: etm4x: Match all ETM4 instances based on DEVARCH and DEVTYPE coresight: etm4x: Make etm4_remove_dev() return void coresight: etm4x: Fix missing trctraceidr file in sysfs coresight: Fix CTI module refcount leak by making it a helper device coresight: Enable and disable helper devices adjacent to the path coresight: Refactor out buffer allocation function for ETR coresight: Make refcount a property of the connection coresight: Store in-connections as well as out-connections coresight: Simplify connection fixup mechanism coresight: Store pointers to connections rather than an array of them ...
2 parents 9285221 + 6c50384 commit fa50d6b

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‎Documentation/ABI/testing/sysfs-devices-hisi_ptt‎

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@@ -59,3 +59,55 @@ Description: (RW) Control the allocated buffer watermark of outbound packets.
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The available tune data is [0, 1, 2]. Writing a negative value
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will return an error, and out of range values will be converted
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to 2. The value indicates a probable level of the event.
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What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/root_port_filters
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Date: May 2023
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KernelVersion: 6.5
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Description: This directory contains the files providing the PCIe Root Port filters
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information used for PTT trace. Each file is named after the supported
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Root Port device name <domain>:<bus>:<device>.<function>.
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See the description of the "filter" in Documentation/trace/hisi-ptt.rst
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for more information.
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What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/root_port_filters/multiselect
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Date: May 2023
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KernelVersion: 6.5
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Description: (Read) Indicates if this kind of filter can be selected at the same
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time as others filters, or must be used on it's own. 1 indicates
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the former case and 0 indicates the latter.
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What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/root_port_filters/<bdf>
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Date: May 2023
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KernelVersion: 6.5
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Description: (Read) Indicates the filter value of this Root Port filter, which
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can be used to control the TLP headers to trace by the PTT trace.
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What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/requester_filters
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Date: May 2023
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KernelVersion: 6.5
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Description: This directory contains the files providing the PCIe Requester filters
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information used for PTT trace. Each file is named after the supported
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Endpoint device name <domain>:<bus>:<device>.<function>.
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See the description of the "filter" in Documentation/trace/hisi-ptt.rst
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for more information.
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What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/requester_filters/multiselect
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Date: May 2023
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KernelVersion: 6.5
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Description: (Read) Indicates if this kind of filter can be selected at the same
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time as others filters, or must be used on it's own. 1 indicates
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the former case and 0 indicates the latter.
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What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/requester_filters/<bdf>
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Date: May 2023
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KernelVersion: 6.5
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Description: (Read) Indicates the filter value of this Requester filter, which
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can be used to control the TLP headers to trace by the PTT trace.

‎Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml‎

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# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/arm/arm,coresight-dummy-sink.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ARM Coresight Dummy sink component
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description: |
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CoreSight components are compliant with the ARM CoreSight architecture
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specification and can be connected in various topologies to suit a particular
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SoCs tracing needs. These trace components can generally be classified as
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sinks, links and sources. Trace data produced by one or more sources flows
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through the intermediate links connecting the source to the currently selected
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sink.
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The Coresight dummy sink component is for the specific coresight sink devices
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kernel don't have permission to access or configure, e.g., CoreSight EUD on
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Qualcomm platforms. It is a mini-USB hub implemented to support the USB-based
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debug and trace capabilities. For this device, a dummy driver is needed to
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register it as Coresight sink device in kernel side, so that path can be
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created in the driver. Then the trace flow would be transferred to EUD via
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coresight link of AP processor. It provides Coresight API for operations on
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dummy source devices, such as enabling and disabling them. It also provides
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the Coresight dummy source paths for debugging.
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The primary use case of the coresight dummy sink is to build path in kernel
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side for dummy sink component.
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maintainers:
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- Mike Leach <mike.leach@linaro.org>
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- Suzuki K Poulose <suzuki.poulose@arm.com>
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- James Clark <james.clark@arm.com>
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- Mao Jinlong <quic_jinlmao@quicinc.com>
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- Hao Zhang <quic_hazha@quicinc.com>
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properties:
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compatible:
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enum:
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- arm,coresight-dummy-sink
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in-ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port:
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description: Input connection from the Coresight Trace bus to
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dummy sink, such as Embedded USB debugger(EUD).
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$ref: /schemas/graph.yaml#/properties/port
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required:
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- compatible
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- in-ports
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additionalProperties: false
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examples:
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# Minimum dummy sink definition. Dummy sink connect to coresight replicator.
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- |
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sink {
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compatible = "arm,coresight-dummy-sink";
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in-ports {
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port {
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eud_in_replicator_swao: endpoint {
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remote-endpoint = <&replicator_swao_out_eud>;
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};
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};
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};
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};
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...

‎Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml‎

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# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/arm/arm,coresight-dummy-source.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ARM Coresight Dummy source component
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description: |
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CoreSight components are compliant with the ARM CoreSight architecture
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specification and can be connected in various topologies to suit a particular
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SoCs tracing needs. These trace components can generally be classified as
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sinks, links and sources. Trace data produced by one or more sources flows
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through the intermediate links connecting the source to the currently selected
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sink.
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The Coresight dummy source component is for the specific coresight source
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devices kernel don't have permission to access or configure. For some SOCs,
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there would be Coresight source trace components on sub-processor which
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are conneted to AP processor via debug bus. For these devices, a dummy driver
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is needed to register them as Coresight source devices, so that paths can be
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created in the driver. It provides Coresight API for operations on dummy
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source devices, such as enabling and disabling them. It also provides the
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Coresight dummy source paths for debugging.
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The primary use case of the coresight dummy source is to build path in kernel
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side for dummy source component.
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maintainers:
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- Mike Leach <mike.leach@linaro.org>
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- Suzuki K Poulose <suzuki.poulose@arm.com>
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- James Clark <james.clark@arm.com>
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- Mao Jinlong <quic_jinlmao@quicinc.com>
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- Hao Zhang <quic_hazha@quicinc.com>
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properties:
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compatible:
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enum:
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- arm,coresight-dummy-source
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out-ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port:
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description: Output connection from the source to Coresight
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Trace bus.
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$ref: /schemas/graph.yaml#/properties/port
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required:
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- compatible
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- out-ports
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additionalProperties: false
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examples:
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# Minimum dummy source definition. Dummy source connect to coresight funnel.
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- |
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source {
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compatible = "arm,coresight-dummy-source";
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out-ports {
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port {
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dummy_riscv_out_funnel_swao: endpoint {
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remote-endpoint = <&funnel_swao_in_dummy_riscv>;
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};
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};
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};
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};
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...

‎Documentation/driver-api/driver-model/devres.rst‎

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devm_kmalloc_array()
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devm_kmemdup()
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devm_krealloc()
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devm_krealloc_array()
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devm_kstrdup()
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devm_kstrdup_const()
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devm_kvasprintf()

‎Documentation/trace/coresight/coresight-dummy.rst‎

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.. SPDX-License-Identifier: GPL-2.0
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=============================
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Coresight Dummy Trace Module
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=============================
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:Author: Hao Zhang <quic_hazha@quicinc.com>
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:Date: June 2023
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Introduction
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------------
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The Coresight dummy trace module is for the specific devices that kernel don't
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have permission to access or configure, e.g., CoreSight TPDMs on Qualcomm
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platforms. For these devices, a dummy driver is needed to register them as
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Coresight devices. The module may also be used to define components that may
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not have any programming interfaces, so that paths can be created in the driver.
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It provides Coresight API for operations on dummy devices, such as enabling and
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disabling them. It also provides the Coresight dummy sink/source paths for
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debugging.
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Config details
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--------------
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There are two types of nodes, dummy sink and dummy source. These nodes
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are available at ``/sys/bus/coresight/devices``.
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Example output::
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$ ls -l /sys/bus/coresight/devices | grep dummy
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dummy_sink0 -> ../../../devices/platform/soc@0/soc@0:sink/dummy_sink0
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dummy_source0 -> ../../../devices/platform/soc@0/soc@0:source/dummy_source0

‎Documentation/trace/hisi-ptt.rst‎

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@@ -148,14 +148,20 @@ For example, if the desired filter is Endpoint function 0000:01:00.1 the filter
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value will be 0x00101. If the desired filter is Root Port 0000:00:10.0 then
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then filter value is calculated as 0x80001.
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The driver also presents every supported Root Port and Requester filter through
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sysfs. Each filter will be an individual file with name of its related PCIe
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device name (domain:bus:device.function). The files of Root Port filters are
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under $(PTT PMU dir)/root_port_filters and files of Requester filters
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are under $(PTT PMU dir)/requester_filters.
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Note that multiple Root Ports can be specified at one time, but only one
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Endpoint function can be specified in one trace. Specifying both Root Port
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and function at the same time is not supported. Driver maintains a list of
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available filters and will check the invalid inputs.
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Currently the available filters are detected in driver's probe. If the supported
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devices are removed/added after probe, you may need to reload the driver to update
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the filters.
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The available filters will be dynamically updated, which means you will always
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get correct filter information when hotplug events happen, or when you manually
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remove/rescan the devices.
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2. Type
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-------

‎MAINTAINERS‎

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ARM/CORESIGHT FRAMEWORK AND DRIVERS
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M: Suzuki K Poulose <suzuki.poulose@arm.com>
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R: Mike Leach <mike.leach@linaro.org>
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R: James Clark <james.clark@arm.com>
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R: Leo Yan <leo.yan@linaro.org>
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L: coresight@lists.linaro.org (moderated for non-subscribers)
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)

‎drivers/hwtracing/coresight/Kconfig‎

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To compile this driver as a module, choose M here: the module will be
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called coresight-tpda.
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config CORESIGHT_DUMMY
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tristate "Dummy driver support"
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help
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Enables support for dummy driver. Dummy driver can be used for
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CoreSight sources/sinks that are owned and configured by some
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other subsystem and use Linux drivers to configure rest of trace
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path.
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To compile this driver as a module, choose M here: the module will be
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called coresight-dummy.
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endif

‎drivers/hwtracing/coresight/Makefile‎

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coresight-cti-y := coresight-cti-core.o coresight-cti-platform.o \
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coresight-cti-sysfs.o
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obj-$(CONFIG_ULTRASOC_SMB) += ultrasoc-smb.o
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obj-$(CONFIG_CORESIGHT_DUMMY) += coresight-dummy.o

‎drivers/hwtracing/coresight/coresight-catu.c‎

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return coresight_timeout(csa, CATU_STATUS, CATU_STATUS_READY, 1);
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}
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static int catu_enable_hw(struct catu_drvdata *drvdata, void *data)
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static int catu_enable_hw(struct catu_drvdata *drvdata, enum cs_mode cs_mode,
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void *data)
399400
{
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int rc;
401402
u32 control, mode;
402-
struct etr_buf *etr_buf = data;
403+
struct etr_buf *etr_buf = NULL;
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struct device *dev = &drvdata->csdev->dev;
404405
struct coresight_device *csdev = drvdata->csdev;
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struct coresight_device *etrdev;
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union coresight_dev_subtype etr_subtype = {
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.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_SYSMEM
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};
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if (catu_wait_for_ready(drvdata))
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dev_warn(dev, "Timeout while waiting for READY\n");
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if (rc)
417422
return rc;
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etrdev = coresight_find_input_type(
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csdev->pdata, CORESIGHT_DEV_TYPE_SINK, etr_subtype);
426+
if (etrdev) {
427+
etr_buf = tmc_etr_get_buffer(etrdev, cs_mode, data);
428+
if (IS_ERR(etr_buf))
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return PTR_ERR(etr_buf);
430+
}
419431
control |= BIT(CATU_CONTROL_ENABLE);
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421433
if (etr_buf && etr_buf->mode == ETR_MODE_CATU) {
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441453
return 0;
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}
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static int catu_enable(struct coresight_device *csdev, void *data)
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static int catu_enable(struct coresight_device *csdev, enum cs_mode mode,
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void *data)
445458
{
446459
int rc;
447460
struct catu_drvdata *catu_drvdata = csdev_to_catu_drvdata(csdev);
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449462
CS_UNLOCK(catu_drvdata->base);
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rc = catu_enable_hw(catu_drvdata, data);
463+
rc = catu_enable_hw(catu_drvdata, mode, data);
451464
CS_LOCK(catu_drvdata->base);
452465
return rc;
453466
}

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