Commit fc584d8
irqchip/meson-gpio: Add support for Amlogic S6 S7 and S7D SoCs
The Amlogic S6/S7/S7D SoCs support GPIO interrupt lines:
S6 IRQ Number:
- 99:98 2 pins on bank CC
- 97 1 pin on bank TESTN
- 96:81 16 pins on bank A
- 80:65 16 pins on bank Z
- 64:45 20 pins on bank X
- 44:37 8 pins on bank H offs H1
- 36:32 5 pins on bank F
- 31:25 7 pins on bank D
- 24:22 3 pins on bank E
- 21:14 8 pins on bank C
- 13:0 14 pins on bank B
S7 IRQ Number:
- 83:82 2 pins on bank CC
- 81 1 pin on bank TESTN
- 80:68 13 pins on bank Z
- 67:48 20 pins on bank X
- 47:36 12 pins on bank H
- 35:24 12 pins on bank D
- 23:22 2 pins on bank E
- 21:14 8 pins on bank C
- 13:0 14 pins on bank B
S7D IRQ Number:
- 83:82 2 pins on bank CC
- 81:75 7 pins on bank DV
- 74 1 pin on bank TESTN
- 73:61 13 pins on bank Z
- 60:41 20 pins on bank X
- 40:29 12 pins on bank H
- 28:24 5 pins on bank D
- 23:22 2 pins on bank E
- 21:14 8 pins on bank C
- 13:0 14 pins on bank B
Add the required compatibles and interrupt count initializers.
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20251105-irqchip-gpio-s6-s7-s7d-v1-2-b4d1fe4781c1@amlogic.com1 parent e4ca152 commit fc584d8
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