|
14 | 14 | #include <dt-bindings/pinctrl/mt8195-pinfunc.h> |
15 | 15 | #include <dt-bindings/power/mt8195-power.h> |
16 | 16 | #include <dt-bindings/reset/mt8195-resets.h> |
| 17 | +#include <dt-bindings/thermal/mediatek,lvts-thermal.h> |
17 | 18 |
|
18 | 19 | / { |
19 | 20 | compatible = "mediatek,mt8195"; |
|
1105 | 1106 | status = "disabled"; |
1106 | 1107 | }; |
1107 | 1108 |
|
| 1109 | + lvts_ap: thermal-sensor@1100b000 { |
| 1110 | + compatible = "mediatek,mt8195-lvts-ap"; |
| 1111 | + reg = <0 0x1100b000 0 0x1000>; |
| 1112 | + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH 0>; |
| 1113 | + clocks = <&infracfg_ao CLK_INFRA_AO_THERM>; |
| 1114 | + resets = <&infracfg_ao MT8195_INFRA_RST0_THERM_CTRL_SWRST>; |
| 1115 | + nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>; |
| 1116 | + nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2"; |
| 1117 | + #thermal-sensor-cells = <1>; |
| 1118 | + }; |
| 1119 | + |
1108 | 1120 | spi1: spi@11010000 { |
1109 | 1121 | compatible = "mediatek,mt8195-spi", |
1110 | 1122 | "mediatek,mt6765-spi"; |
|
1357 | 1369 | status = "disabled"; |
1358 | 1370 | }; |
1359 | 1371 |
|
| 1372 | + lvts_mcu: thermal-sensor@11278000 { |
| 1373 | + compatible = "mediatek,mt8195-lvts-mcu"; |
| 1374 | + reg = <0 0x11278000 0 0x1000>; |
| 1375 | + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>; |
| 1376 | + clocks = <&infracfg_ao CLK_INFRA_AO_THERM>; |
| 1377 | + resets = <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>; |
| 1378 | + nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>; |
| 1379 | + nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2"; |
| 1380 | + #thermal-sensor-cells = <1>; |
| 1381 | + }; |
| 1382 | + |
1360 | 1383 | xhci1: usb@11290000 { |
1361 | 1384 | compatible = "mediatek,mt8195-xhci", |
1362 | 1385 | "mediatek,mtk-xhci"; |
|
2976 | 2999 | status = "disabled"; |
2977 | 3000 | }; |
2978 | 3001 | }; |
| 3002 | + |
| 3003 | + thermal_zones: thermal-zones { |
| 3004 | + cpu0-thermal { |
| 3005 | + polling-delay = <0>; |
| 3006 | + polling-delay-passive = <0>; |
| 3007 | + thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU0>; |
| 3008 | + trips { |
| 3009 | + cpu0_crit: trip-crit { |
| 3010 | + temperature = <100000>; |
| 3011 | + hysteresis = <2000>; |
| 3012 | + type = "critical"; |
| 3013 | + }; |
| 3014 | + }; |
| 3015 | + }; |
| 3016 | + |
| 3017 | + cpu1-thermal { |
| 3018 | + polling-delay = <0>; |
| 3019 | + polling-delay-passive = <0>; |
| 3020 | + thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU1>; |
| 3021 | + trips { |
| 3022 | + cpu1_crit: trip-crit { |
| 3023 | + temperature = <100000>; |
| 3024 | + hysteresis = <2000>; |
| 3025 | + type = "critical"; |
| 3026 | + }; |
| 3027 | + }; |
| 3028 | + }; |
| 3029 | + |
| 3030 | + cpu2-thermal { |
| 3031 | + polling-delay = <0>; |
| 3032 | + polling-delay-passive = <0>; |
| 3033 | + thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU2>; |
| 3034 | + trips { |
| 3035 | + cpu2_crit: trip-crit { |
| 3036 | + temperature = <100000>; |
| 3037 | + hysteresis = <2000>; |
| 3038 | + type = "critical"; |
| 3039 | + }; |
| 3040 | + }; |
| 3041 | + }; |
| 3042 | + |
| 3043 | + cpu3-thermal { |
| 3044 | + polling-delay = <0>; |
| 3045 | + polling-delay-passive = <0>; |
| 3046 | + thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU3>; |
| 3047 | + trips { |
| 3048 | + cpu3_crit: trip-crit { |
| 3049 | + temperature = <100000>; |
| 3050 | + hysteresis = <2000>; |
| 3051 | + type = "critical"; |
| 3052 | + }; |
| 3053 | + }; |
| 3054 | + }; |
| 3055 | + |
| 3056 | + cpu4-thermal { |
| 3057 | + polling-delay = <0>; |
| 3058 | + polling-delay-passive = <0>; |
| 3059 | + thermal-sensors = <&lvts_mcu MT8195_MCU_BIG_CPU0>; |
| 3060 | + trips { |
| 3061 | + cpu4_crit: trip-crit { |
| 3062 | + temperature = <100000>; |
| 3063 | + hysteresis = <2000>; |
| 3064 | + type = "critical"; |
| 3065 | + }; |
| 3066 | + }; |
| 3067 | + }; |
| 3068 | + |
| 3069 | + cpu5-thermal { |
| 3070 | + polling-delay = <0>; |
| 3071 | + polling-delay-passive = <0>; |
| 3072 | + thermal-sensors = <&lvts_mcu MT8195_MCU_BIG_CPU1>; |
| 3073 | + trips { |
| 3074 | + cpu5_crit: trip-crit { |
| 3075 | + temperature = <100000>; |
| 3076 | + hysteresis = <2000>; |
| 3077 | + type = "critical"; |
| 3078 | + }; |
| 3079 | + }; |
| 3080 | + }; |
| 3081 | + |
| 3082 | + cpu6-thermal { |
| 3083 | + polling-delay = <0>; |
| 3084 | + polling-delay-passive = <0>; |
| 3085 | + thermal-sensors = <&lvts_mcu MT8195_MCU_BIG_CPU2>; |
| 3086 | + trips { |
| 3087 | + cpu6_crit: trip-crit { |
| 3088 | + temperature = <100000>; |
| 3089 | + hysteresis = <2000>; |
| 3090 | + type = "critical"; |
| 3091 | + }; |
| 3092 | + }; |
| 3093 | + }; |
| 3094 | + |
| 3095 | + cpu7-thermal { |
| 3096 | + polling-delay = <0>; |
| 3097 | + polling-delay-passive = <0>; |
| 3098 | + thermal-sensors = <&lvts_mcu MT8195_MCU_BIG_CPU3>; |
| 3099 | + trips { |
| 3100 | + cpu7_crit: trip-crit { |
| 3101 | + temperature = <100000>; |
| 3102 | + hysteresis = <2000>; |
| 3103 | + type = "critical"; |
| 3104 | + }; |
| 3105 | + }; |
| 3106 | + }; |
| 3107 | + }; |
2979 | 3108 | }; |
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