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| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | +%YAML 1.2 |
| 3 | +--- |
| 4 | +$id: http://devicetree.org/schemas/sound/rockchip,rk3576-sai.yaml# |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | + |
| 7 | +title: Rockchip Serial Audio Interface Controller |
| 8 | + |
| 9 | +description: |
| 10 | + The Rockchip Serial Audio Interface (SAI) controller is a flexible audio |
| 11 | + controller that implements the I2S, I2S/TDM and the PDM standards. |
| 12 | + |
| 13 | +maintainers: |
| 14 | + - Nicolas Frattaroli <nicolas.frattaroli@collabora.com> |
| 15 | + |
| 16 | +allOf: |
| 17 | + - $ref: dai-common.yaml# |
| 18 | + |
| 19 | +properties: |
| 20 | + compatible: |
| 21 | + const: rockchip,rk3576-sai |
| 22 | + |
| 23 | + reg: |
| 24 | + maxItems: 1 |
| 25 | + |
| 26 | + interrupts: |
| 27 | + maxItems: 1 |
| 28 | + |
| 29 | + dmas: |
| 30 | + minItems: 1 |
| 31 | + maxItems: 2 |
| 32 | + |
| 33 | + dma-names: |
| 34 | + minItems: 1 |
| 35 | + items: |
| 36 | + - enum: [tx, rx] |
| 37 | + - const: rx |
| 38 | + |
| 39 | + clocks: |
| 40 | + items: |
| 41 | + - description: master audio clock |
| 42 | + - description: AHB clock driving the interface |
| 43 | + |
| 44 | + clock-names: |
| 45 | + items: |
| 46 | + - const: mclk |
| 47 | + - const: hclk |
| 48 | + |
| 49 | + resets: |
| 50 | + minItems: 1 |
| 51 | + items: |
| 52 | + - description: reset for the mclk domain |
| 53 | + - description: reset for the hclk domain |
| 54 | + |
| 55 | + reset-names: |
| 56 | + minItems: 1 |
| 57 | + items: |
| 58 | + - const: m |
| 59 | + - const: h |
| 60 | + |
| 61 | + port: |
| 62 | + $ref: audio-graph-port.yaml# |
| 63 | + unevaluatedProperties: false |
| 64 | + |
| 65 | + power-domains: |
| 66 | + maxItems: 1 |
| 67 | + |
| 68 | + "#sound-dai-cells": |
| 69 | + const: 0 |
| 70 | + |
| 71 | + rockchip,sai-rx-route: |
| 72 | + $ref: /schemas/types.yaml#/definitions/uint32-array |
| 73 | + description: |
| 74 | + Defines the mapping of the controller's SDI ports to actual input lanes, |
| 75 | + as well as the number of input lanes. |
| 76 | + rockchip,sai-rx-route = <3> would mean sdi3 is receiving from data0, and |
| 77 | + that there is only one receiving lane. |
| 78 | + This property's absence is to be understood as only one receiving lane |
| 79 | + being used if the controller has capture capabilities. |
| 80 | + maxItems: 4 |
| 81 | + items: |
| 82 | + minimum: 0 |
| 83 | + maximum: 3 |
| 84 | + |
| 85 | + rockchip,sai-tx-route: |
| 86 | + $ref: /schemas/types.yaml#/definitions/uint32-array |
| 87 | + description: |
| 88 | + Defines the mapping of the controller's SDO ports to actual output lanes, |
| 89 | + as well as the number of output lanes. |
| 90 | + rockchip,sai-tx-route = <3> would mean sdo3 is sending to data0, and |
| 91 | + that there is only one transmitting lane. |
| 92 | + This property's absence is to be understood as only one transmitting lane |
| 93 | + being used if the controller has playback capabilities. |
| 94 | + maxItems: 4 |
| 95 | + items: |
| 96 | + minimum: 0 |
| 97 | + maximum: 3 |
| 98 | + |
| 99 | +required: |
| 100 | + - compatible |
| 101 | + - reg |
| 102 | + - dmas |
| 103 | + - dma-names |
| 104 | + - clocks |
| 105 | + - clock-names |
| 106 | + - "#sound-dai-cells" |
| 107 | + |
| 108 | +unevaluatedProperties: false |
| 109 | + |
| 110 | +examples: |
| 111 | + - | |
| 112 | + #include <dt-bindings/clock/rockchip,rk3576-cru.h> |
| 113 | + #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 114 | + #include <dt-bindings/interrupt-controller/irq.h> |
| 115 | + #include <dt-bindings/pinctrl/rockchip.h> |
| 116 | + #include <dt-bindings/power/rockchip,rk3576-power.h> |
| 117 | + #include <dt-bindings/reset/rockchip,rk3576-cru.h> |
| 118 | +
|
| 119 | + bus { |
| 120 | + #address-cells = <2>; |
| 121 | + #size-cells = <2>; |
| 122 | + sai1: sai@2a610000 { |
| 123 | + compatible = "rockchip,rk3576-sai"; |
| 124 | + reg = <0x0 0x2a610000 0x0 0x1000>; |
| 125 | + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; |
| 126 | + clocks = <&cru MCLK_SAI1_8CH>, <&cru HCLK_SAI1_8CH>; |
| 127 | + clock-names = "mclk", "hclk"; |
| 128 | + dmas = <&dmac0 2>, <&dmac0 3>; |
| 129 | + dma-names = "tx", "rx"; |
| 130 | + power-domains = <&power RK3576_PD_AUDIO>; |
| 131 | + resets = <&cru SRST_M_SAI1_8CH>, <&cru SRST_H_SAI1_8CH>; |
| 132 | + reset-names = "m", "h"; |
| 133 | + pinctrl-names = "default"; |
| 134 | + pinctrl-0 = <&sai1m0_lrck |
| 135 | + &sai1m0_sclk |
| 136 | + &sai1m0_sdi0 |
| 137 | + &sai1m0_sdo0 |
| 138 | + &sai1m0_sdo1 |
| 139 | + &sai1m0_sdo2 |
| 140 | + &sai1m0_sdo3>; |
| 141 | + rockchip,sai-tx-route = <3 1 2 0>; |
| 142 | + #sound-dai-cells = <0>; |
| 143 | + }; |
| 144 | + }; |
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