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MarijnS95Abhinav Kumar
MarijnS95
authored and
Abhinav Kumar
committed
drm/msm/dpu: Use V2 DITHER PINGPONG sub-block in SM8[34]50/SC8280XP
According to downstream sources this DITHER sub-block sits at an offset of 0xe0 with version 0x20000. Lets fix this by using sc7280_pp_sblk instead of sdm845_pp_sblk. Fixes: 4a352c2 ("drm/msm/dpu: Introduce SC8280XP") Fixes: 0e91bcb ("drm/msm/dpu: Add SM8350 to hw catalog") Fixes: 100d7ef ("drm/msm/dpu: add support for SM8450") Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/534208/ Link: https://lore.kernel.org/r/20230411-dpu-intf-te-v4-6-27ce1a5ab5c6@somainline.org [quic_abhinavk@quicinc.com: minor fix in the commit message] Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
1 parent 701f691 commit fe47a30

3 files changed

Lines changed: 20 additions & 20 deletions

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‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -127,22 +127,22 @@ static const struct dpu_dspp_cfg sm8350_dspp[] = {
127127
};
128128

129129
static const struct dpu_pingpong_cfg sm8350_pp[] = {
130-
PP_BLK("pingpong_0", PINGPONG_0, 0x69000, MERGE_3D_0, sdm845_pp_sblk,
130+
PP_BLK("pingpong_0", PINGPONG_0, 0x69000, MERGE_3D_0, sc7280_pp_sblk,
131131
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
132132
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 12)),
133-
PP_BLK("pingpong_1", PINGPONG_1, 0x6a000, MERGE_3D_0, sdm845_pp_sblk,
133+
PP_BLK("pingpong_1", PINGPONG_1, 0x6a000, MERGE_3D_0, sc7280_pp_sblk,
134134
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9),
135135
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 13)),
136-
PP_BLK("pingpong_2", PINGPONG_2, 0x6b000, MERGE_3D_1, sdm845_pp_sblk,
136+
PP_BLK("pingpong_2", PINGPONG_2, 0x6b000, MERGE_3D_1, sc7280_pp_sblk,
137137
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10),
138138
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 14)),
139-
PP_BLK("pingpong_3", PINGPONG_3, 0x6c000, MERGE_3D_1, sdm845_pp_sblk,
139+
PP_BLK("pingpong_3", PINGPONG_3, 0x6c000, MERGE_3D_1, sc7280_pp_sblk,
140140
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11),
141141
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 15)),
142-
PP_BLK("pingpong_4", PINGPONG_4, 0x6d000, MERGE_3D_2, sdm845_pp_sblk,
142+
PP_BLK("pingpong_4", PINGPONG_4, 0x6d000, MERGE_3D_2, sc7280_pp_sblk,
143143
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 30),
144144
-1),
145-
PP_BLK("pingpong_5", PINGPONG_5, 0x6e000, MERGE_3D_2, sdm845_pp_sblk,
145+
PP_BLK("pingpong_5", PINGPONG_5, 0x6e000, MERGE_3D_2, sc7280_pp_sblk,
146146
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 31),
147147
-1),
148148
};

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -121,17 +121,17 @@ static const struct dpu_dspp_cfg sc8280xp_dspp[] = {
121121
};
122122

123123
static const struct dpu_pingpong_cfg sc8280xp_pp[] = {
124-
PP_BLK("pingpong_0", PINGPONG_0, 0x69000, MERGE_3D_0, sdm845_pp_sblk,
124+
PP_BLK("pingpong_0", PINGPONG_0, 0x69000, MERGE_3D_0, sc7280_pp_sblk,
125125
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8), -1),
126-
PP_BLK("pingpong_1", PINGPONG_1, 0x6a000, MERGE_3D_0, sdm845_pp_sblk,
126+
PP_BLK("pingpong_1", PINGPONG_1, 0x6a000, MERGE_3D_0, sc7280_pp_sblk,
127127
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9), -1),
128-
PP_BLK("pingpong_2", PINGPONG_2, 0x6b000, MERGE_3D_1, sdm845_pp_sblk,
128+
PP_BLK("pingpong_2", PINGPONG_2, 0x6b000, MERGE_3D_1, sc7280_pp_sblk,
129129
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10), -1),
130-
PP_BLK("pingpong_3", PINGPONG_3, 0x6c000, MERGE_3D_1, sdm845_pp_sblk,
130+
PP_BLK("pingpong_3", PINGPONG_3, 0x6c000, MERGE_3D_1, sc7280_pp_sblk,
131131
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11), -1),
132-
PP_BLK("pingpong_4", PINGPONG_4, 0x6d000, MERGE_3D_2, sdm845_pp_sblk,
132+
PP_BLK("pingpong_4", PINGPONG_4, 0x6d000, MERGE_3D_2, sc7280_pp_sblk,
133133
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 30), -1),
134-
PP_BLK("pingpong_5", PINGPONG_5, 0x6e000, MERGE_3D_2, sdm845_pp_sblk,
134+
PP_BLK("pingpong_5", PINGPONG_5, 0x6e000, MERGE_3D_2, sc7280_pp_sblk,
135135
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 31), -1),
136136
};
137137

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -128,28 +128,28 @@ static const struct dpu_dspp_cfg sm8450_dspp[] = {
128128
};
129129
/* FIXME: interrupts */
130130
static const struct dpu_pingpong_cfg sm8450_pp[] = {
131-
PP_BLK("pingpong_0", PINGPONG_0, 0x69000, MERGE_3D_0, sdm845_pp_sblk,
131+
PP_BLK("pingpong_0", PINGPONG_0, 0x69000, MERGE_3D_0, sc7280_pp_sblk,
132132
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
133133
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 12)),
134-
PP_BLK("pingpong_1", PINGPONG_1, 0x6a000, MERGE_3D_0, sdm845_pp_sblk,
134+
PP_BLK("pingpong_1", PINGPONG_1, 0x6a000, MERGE_3D_0, sc7280_pp_sblk,
135135
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9),
136136
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 13)),
137-
PP_BLK("pingpong_2", PINGPONG_2, 0x6b000, MERGE_3D_1, sdm845_pp_sblk,
137+
PP_BLK("pingpong_2", PINGPONG_2, 0x6b000, MERGE_3D_1, sc7280_pp_sblk,
138138
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10),
139139
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 14)),
140-
PP_BLK("pingpong_3", PINGPONG_3, 0x6c000, MERGE_3D_1, sdm845_pp_sblk,
140+
PP_BLK("pingpong_3", PINGPONG_3, 0x6c000, MERGE_3D_1, sc7280_pp_sblk,
141141
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11),
142142
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 15)),
143-
PP_BLK("pingpong_4", PINGPONG_4, 0x6d000, MERGE_3D_2, sdm845_pp_sblk,
143+
PP_BLK("pingpong_4", PINGPONG_4, 0x6d000, MERGE_3D_2, sc7280_pp_sblk,
144144
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 30),
145145
-1),
146-
PP_BLK("pingpong_5", PINGPONG_5, 0x6e000, MERGE_3D_2, sdm845_pp_sblk,
146+
PP_BLK("pingpong_5", PINGPONG_5, 0x6e000, MERGE_3D_2, sc7280_pp_sblk,
147147
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 31),
148148
-1),
149-
PP_BLK("pingpong_6", PINGPONG_6, 0x65800, MERGE_3D_3, sdm845_pp_sblk,
149+
PP_BLK("pingpong_6", PINGPONG_6, 0x65800, MERGE_3D_3, sc7280_pp_sblk,
150150
-1,
151151
-1),
152-
PP_BLK("pingpong_7", PINGPONG_7, 0x65c00, MERGE_3D_3, sdm845_pp_sblk,
152+
PP_BLK("pingpong_7", PINGPONG_7, 0x65c00, MERGE_3D_3, sc7280_pp_sblk,
153153
-1,
154154
-1),
155155
};

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