2424
2525static DEFINE_MUTEX (mbox_lock );
2626
27- static int send_mbox_cmd (struct pci_dev * pdev , u16 cmd_id , u32 cmd_data , u64 * cmd_resp )
27+ static int wait_for_mbox_ready (struct proc_thermal_device * proc_priv )
2828{
29- struct proc_thermal_device * proc_priv ;
3029 u32 retries , data ;
3130 int ret ;
3231
33- mutex_lock (& mbox_lock );
34- proc_priv = pci_get_drvdata (pdev );
35-
3632 /* Poll for rb bit == 0 */
3733 retries = MBOX_RETRY_COUNT ;
3834 do {
39- data = readl (( void __iomem * ) ( proc_priv -> mmio_base + MBOX_OFFSET_INTERFACE ) );
35+ data = readl (proc_priv -> mmio_base + MBOX_OFFSET_INTERFACE );
4036 if (data & BIT_ULL (MBOX_BUSY_BIT )) {
4137 ret = - EBUSY ;
4238 continue ;
@@ -45,53 +41,78 @@ static int send_mbox_cmd(struct pci_dev *pdev, u16 cmd_id, u32 cmd_data, u64 *cm
4541 break ;
4642 } while (-- retries );
4743
44+ return ret ;
45+ }
46+
47+ static int send_mbox_write_cmd (struct pci_dev * pdev , u16 id , u32 data )
48+ {
49+ struct proc_thermal_device * proc_priv ;
50+ u32 reg_data ;
51+ int ret ;
52+
53+ proc_priv = pci_get_drvdata (pdev );
54+
55+ mutex_lock (& mbox_lock );
56+
57+ ret = wait_for_mbox_ready (proc_priv );
4858 if (ret )
4959 goto unlock_mbox ;
5060
51- if (cmd_id == MBOX_CMD_WORKLOAD_TYPE_WRITE )
52- writel (cmd_data , (void __iomem * ) ((proc_priv -> mmio_base + MBOX_OFFSET_DATA )));
53-
61+ writel (data , (proc_priv -> mmio_base + MBOX_OFFSET_DATA ));
5462 /* Write command register */
55- data = BIT_ULL (MBOX_BUSY_BIT ) | cmd_id ;
56- writel (data , (void __iomem * ) (( proc_priv -> mmio_base + MBOX_OFFSET_INTERFACE ) ));
63+ reg_data = BIT_ULL (MBOX_BUSY_BIT ) | id ;
64+ writel (reg_data , (proc_priv -> mmio_base + MBOX_OFFSET_INTERFACE ));
5765
58- /* Poll for rb bit == 0 */
59- retries = MBOX_RETRY_COUNT ;
60- do {
61- data = readl ((void __iomem * ) (proc_priv -> mmio_base + MBOX_OFFSET_INTERFACE ));
62- if (data & BIT_ULL (MBOX_BUSY_BIT )) {
63- ret = - EBUSY ;
64- continue ;
65- }
66+ ret = wait_for_mbox_ready (proc_priv );
6667
67- if ( data ) {
68- ret = - ENXIO ;
69- goto unlock_mbox ;
70- }
68+ unlock_mbox :
69+ mutex_unlock ( & mbox_lock ) ;
70+ return ret ;
71+ }
7172
72- ret = 0 ;
73+ static int send_mbox_read_cmd (struct pci_dev * pdev , u16 id , u64 * resp )
74+ {
75+ struct proc_thermal_device * proc_priv ;
76+ u32 reg_data ;
77+ int ret ;
7378
74- if (!cmd_resp )
75- break ;
79+ proc_priv = pci_get_drvdata (pdev );
7680
77- if (cmd_id == MBOX_CMD_WORKLOAD_TYPE_READ )
78- * cmd_resp = readl ((void __iomem * ) (proc_priv -> mmio_base + MBOX_OFFSET_DATA ));
79- else
80- * cmd_resp = readq ((void __iomem * ) (proc_priv -> mmio_base + MBOX_OFFSET_DATA ));
81+ mutex_lock (& mbox_lock );
8182
82- break ;
83- } while (-- retries );
83+ ret = wait_for_mbox_ready (proc_priv );
84+ if (ret )
85+ goto unlock_mbox ;
86+
87+ /* Write command register */
88+ reg_data = BIT_ULL (MBOX_BUSY_BIT ) | id ;
89+ writel (reg_data , (proc_priv -> mmio_base + MBOX_OFFSET_INTERFACE ));
90+
91+ ret = wait_for_mbox_ready (proc_priv );
92+ if (ret )
93+ goto unlock_mbox ;
94+
95+ if (id == MBOX_CMD_WORKLOAD_TYPE_READ )
96+ * resp = readl (proc_priv -> mmio_base + MBOX_OFFSET_DATA );
97+ else
98+ * resp = readq (proc_priv -> mmio_base + MBOX_OFFSET_DATA );
8499
85100unlock_mbox :
86101 mutex_unlock (& mbox_lock );
87102 return ret ;
88103}
89104
90- int processor_thermal_send_mbox_cmd (struct pci_dev * pdev , u16 cmd_id , u32 cmd_data , u64 * cmd_resp )
105+ int processor_thermal_send_mbox_read_cmd (struct pci_dev * pdev , u16 id , u64 * resp )
91106{
92- return send_mbox_cmd (pdev , cmd_id , cmd_data , cmd_resp );
107+ return send_mbox_read_cmd (pdev , id , resp );
93108}
94- EXPORT_SYMBOL_GPL (processor_thermal_send_mbox_cmd );
109+ EXPORT_SYMBOL_NS_GPL (processor_thermal_send_mbox_read_cmd , INT340X_THERMAL );
110+
111+ int processor_thermal_send_mbox_write_cmd (struct pci_dev * pdev , u16 id , u32 data )
112+ {
113+ return send_mbox_write_cmd (pdev , id , data );
114+ }
115+ EXPORT_SYMBOL_NS_GPL (processor_thermal_send_mbox_write_cmd , INT340X_THERMAL );
95116
96117/* List of workload types */
97118static const char * const workload_types [] = {
@@ -104,7 +125,6 @@ static const char * const workload_types[] = {
104125 NULL
105126};
106127
107-
108128static ssize_t workload_available_types_show (struct device * dev ,
109129 struct device_attribute * attr ,
110130 char * buf )
@@ -146,7 +166,7 @@ static ssize_t workload_type_store(struct device *dev,
146166
147167 data |= ret ;
148168
149- ret = send_mbox_cmd (pdev , MBOX_CMD_WORKLOAD_TYPE_WRITE , data , NULL );
169+ ret = send_mbox_write_cmd (pdev , MBOX_CMD_WORKLOAD_TYPE_WRITE , data );
150170 if (ret )
151171 return false;
152172
@@ -161,7 +181,7 @@ static ssize_t workload_type_show(struct device *dev,
161181 u64 cmd_resp ;
162182 int ret ;
163183
164- ret = send_mbox_cmd (pdev , MBOX_CMD_WORKLOAD_TYPE_READ , 0 , & cmd_resp );
184+ ret = send_mbox_read_cmd (pdev , MBOX_CMD_WORKLOAD_TYPE_READ , & cmd_resp );
165185 if (ret )
166186 return false;
167187
@@ -186,8 +206,6 @@ static const struct attribute_group workload_req_attribute_group = {
186206 .name = "workload_request"
187207};
188208
189-
190-
191209static bool workload_req_created ;
192210
193211int proc_thermal_mbox_add (struct pci_dev * pdev , struct proc_thermal_device * proc_priv )
@@ -196,7 +214,7 @@ int proc_thermal_mbox_add(struct pci_dev *pdev, struct proc_thermal_device *proc
196214 int ret ;
197215
198216 /* Check if there is a mailbox support, if fails return success */
199- ret = send_mbox_cmd (pdev , MBOX_CMD_WORKLOAD_TYPE_READ , 0 , & cmd_resp );
217+ ret = send_mbox_read_cmd (pdev , MBOX_CMD_WORKLOAD_TYPE_READ , & cmd_resp );
200218 if (ret )
201219 return 0 ;
202220
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