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The module uses the +ESP32-C2 SoC and integrates Wi-Fi and Bluetooth LE. You can find the board +schematic +`here `_ +and the vendor user guide +`here `_. + +Most of the I/O pins are broken out to the pin headers on both sides for easy +interfacing. Developers can either connect peripherals with jumper wires or +mount ESP8684-DevKitM-1 on a breadboard. + +Toolchain, flashing and the serial console are described in the +:doc:`ESP32-C2 chip documentation <../../index>`. + +.. figure:: esp8684-devkitm-1-v1.1-isometric.png + :alt: ESP8684-DevKitM-1 Board Layout + :figclass: align-center + + ESP8684-DevKitM-1 with ESP8684-MINI-1 module + +The block diagram below presents the main components of the ESP8684-DevKitM-1. + +.. figure:: esp8684-devkitm-1-v0.1-block-diagram.png + :alt: ESP8684-DevKitM-1 Electrical Block Diagram + :figclass: align-center + + ESP8684-DevKitM-1 Electrical Block Diagram + +Hardware Components +------------------- + +.. figure:: esp8684-devkitm-1-v1.1-annotated-photo.png + :alt: ESP8684-DevKitM-1 Hardware Components + :figclass: align-center + + ESP8684-DevKitM-1 Hardware Components + +===================== ======================================================== +Key Component Description +===================== ======================================================== +ESP8684-MINI-1 Wi-Fi and Bluetooth LE module with PCB antenna and + on-board SPI flash (1 MB/2 MB/4 MB). Typical XTAL is + 26 MHz. +5 V to 3.3 V LDO Converts USB or 5 V header power to 3.3 V. +5 V Power On LED Turns on when USB power is connected. +Pin Headers All available GPIO pins broken out on J1 and J3. +Boot Button Download button. Hold **Boot** and press **Reset** to + enter Firmware Download mode. +Micro-USB Port Power supply and USB-to-UART communication. +Reset Button Restarts the system (connected to CHIP_EN). +USB-to-UART Bridge Single USB-to-UART bridge, up to 3 Mbps. +RGB LED On v1.1: discrete RGB LED on GPIO0 (R), GPIO1 (G) and + GPIO8 (B). On v1.0: addressable RGB LED on GPIO8 only. +===================== ======================================================== + +This board has no USB-Serial-JTAG port on the SoC. Console and flashing use +the on-board USB-to-UART bridge. + +Buttons and LEDs +================ + +Board Buttons +------------- + +There are two buttons labeled Boot and RST. The RST button is not available +to software. It pulls the chip enable line that doubles as a reset line. + +The BOOT button is connected to GPIO9. On reset it is used as a strapping +pin to determine whether the chip boots normally or into the serial +bootloader. After reset, however, the BOOT button can be used for software +input. + +Board LEDs +---------- + +There is one on-board LED that indicates the presence of USB power. + +The RGB LED mapping depends on the hardware revision: + +* **v1.1 (current):** discrete RGB LED driven by GPIO0 (red), GPIO1 (green) + and GPIO8 (blue). This is the mapping used by NuttX + (``LED_RED``, ``LED_GREEN`` and ``LED_BLUE`` in ``board.h``). +* **v1.0:** addressable RGB LED driven only by GPIO8. + +Both revisions are available on the market. See +`Hardware Revision Details `_. +GPIO8 and GPIO9 are also strapping pins of the ESP8684 chip. + +Power Supply +============ + +There are three mutually exclusive ways to provide power to the board: + +* Micro-USB port (default, recommended) +* 5V and G (GND) pins +* 3V3 and G (GND) pins + +Use a USB 2.0 cable (Standard-A to Micro-B) that carries data lines. +Charge-only cables will not enumerate the USB-to-UART bridge and cannot be +used to flash the board. + +Pin Mapping +=========== + +.. figure:: esp8684-devkitm-1-pinout_v1.1.png + :alt: ESP8684-DevKitM-1 pin layout + :figclass: align-center + + ESP8684-DevKitM-1 Pin Layout + +Default NuttX pin assignments for this board: + +============= ========== ========================================= +ESP8684 Pin Signal Notes +============= ========== ========================================= +GPIO20 U0TXD UART0 TX (serial console) +GPIO19 U0RXD UART0 RX (serial console) +GPIO9 BOOT Strapping pin; user button after reset +GPIO0 LED Red RGB LED (v1.1); ADC1_CH0 +GPIO1 LED Green RGB LED (v1.1); ADC1_CH1 +GPIO8 LED Blue RGB LED (v1.1) / WS2812 (v1.0); strapping +GPIO6 I2C0 SCL Default I2C clock +GPIO5 I2C0 SDA Default I2C data; ADC2_CH0 +GPIO7 SPI2 MOSI Default SPI2 MOSI (FSPID) +GPIO2 SPI2 MISO Default SPI2 MISO (FSPIQ); LEDC PWM ch0 +GPIO10 SPI2 CS Default SPI2 chip select +GPIO6 SPI2 CLK Default SPI2 clock (shared with I2C SCL) +============= ========== ========================================= + +**J1** + +===== ========== ========================================= +Pin Signal Notes +===== ========== ========================================= +1 G Ground +2 3V3 3.3 V power supply +3 3V3 3.3 V power supply +4 GPIO2 ADC1_CH2, FSPIQ +5 GPIO3 ADC1_CH3 +6 G Ground +7 RST CHIP_EN; High: enable; Low: power off +8 G Ground +9 GPIO0 ADC1_CH0, LED Red (v1.1) +10 GPIO1 ADC1_CH1, LED Green (v1.1) +11 GPIO10 FSPICS0 +12 G Ground +13 5V 5 V power supply +14 5V 5 V power supply +15 G Ground +===== ========== ========================================= + +**J3** + +===== ========== ========================================= +Pin Signal Notes +===== ========== ========================================= +1 G Ground +2 TX GPIO20, U0TXD +3 RX GPIO19, U0RXD +4 G Ground +5 GPIO9 Strapping pin, BOOT button +6 GPIO8 Strapping pin, LED Blue (v1.1) +7 G Ground +8 GPIO7 FSPID, MTDO +9 GPIO6 FSPICLK, MTCK +10 GPIO5 ADC2_CH0, FSPIWP, MTDI +11 GPIO4 ADC1_CH4, FSPIHD, MTMS +12 G Ground +13 GPIO18 +14 G Ground +15 G Ground +===== ========== ========================================= + +GPIO8 and GPIO9 are strapping pins. Their level at reset selects boot and +download mode. See the +`ESP8684 Datasheet `_ +section *Strapping Pins*. + +Configurations +============== + +All of the configurations presented below can be tested by running the following commands:: + + $ ./tools/configure.sh esp8684-devkitm: + $ make flash ESPTOOL_PORT=/dev/ttyUSB0 -j + +Where ```` is the name of board configuration you want to use, +i.e.: nsh, buttons, wifi... +Then use a serial console terminal like ``picocom`` configured to 115200 8N1. + +adc +--- + +The ``adc`` configuration enables the ADC driver and the ADC example application. +ADC Unit 1 is registered to ``/dev/adc0`` with channels 0, 1, 2 and 3 enabled by default. +Currently, the ADC operates in oneshot mode. + +More ADC channels can be enabled or disabled in ``ADC Configuration`` menu. + +This example shows channels 0 and 1 connected to 3.3 V and channels 2 and 3 to GND (all readings +show in units of mV):: + + nsh> adc -n 1 + adc_main: g_adcstate.count: 1 + adc_main: Hardware initialized. Opening the ADC device: /dev/adc0 + Sample: + 1: channel: 0 value: 2900 + 2: channel: 1 value: 2900 + 3: channel: 2 value: 0 + 4: channel: 3 value: 0 + +autopm +------ + +This configuration makes the device automatically enter the low power consumption mode +when in the idle state, powering off the cpu and other peripherals. + +In minimum power save mode, the station wakes up every DTIM to receive a beacon. The broadcast +data will not be lost because it is transmitted after DTIM. However, it can not save much more +power if DTIM is short as the DTIM is determined by the access point. + +ble +--- + +This configuration is used to enable the Bluetooth Low Energy (BLE) of +the ESP32-C2 chip. + +To test it, just run the following commands below. + +Confirm that bnep interface exist:: + + nsh> ifconfig + bnep0 Link encap:UNSPEC at DOWN + inet addr:0.0.0.0 DRaddr:0.0.0.0 Mask:0.0.0.0 + +Get basic information from it:: + + nsh> bt bnep0 info + Device: bnep0 + BDAddr: 86:f7:03:09:41:4d + Flags: 0000 + Free: 20 + ACL: 20 + SCO: 0 + Max: + ACL: 24 + SCO: 0 + MTU: + ACL: 70 + SCO: 0 + Policy: 0 + Type: 0 + +Start the scanning process:: + + nsh> bt bnep0 scan start + +Wait a little bit before stopping it. + +Then after some minutes stop it:: + + nsh> bt bnep0 scan stop + +Get the list of BLE devices found around you:: + + nsh> bt bnep0 scan get + Scan result: + 1. addr: d7:c4:e6:xx:xx:xx type: 0 + rssi: -62 + response type: 4 + advertiser data: 10 09 4d 69 20 XX XX XX XX XX XX XX XX XX XX 20 e + nsh> + +bmp180 +------ + +This configuration enables the use of the BMP180 pressure sensor over I2C. +You can check that the sensor is working by using the ``bmp180`` application:: + + nsh> bmp180 + Pressure value = 91531 + Pressure value = 91526 + Pressure value = 91525 + +buttons +------- + +This configuration shows the use of the buttons subsystem. It can be used by executing +the ``buttons`` application and pressing the ``BOOT`` button on the board:: + + nsh> buttons + buttons_main: Starting the button_daemon + buttons_main: button_daemon started + button_daemon: Running + button_daemon: Opening /dev/buttons + button_daemon: Supported BUTTONs 0x01 + nsh> Sample = 1 + Sample = 0 + +crypto +------ + +This configuration enables support for the cryptographic hardware and +the ``/dev/crypto`` device file. Currently, we are supporting SHA-1, +SHA-224 and SHA-256 algorithms using hardware. +To test hardware acceleration, you can use `hmac` example and following output +should look like this:: + + nsh> hmac + ... + hmac sha1 success + hmac sha1 success + hmac sha1 success + hmac sha256 success + hmac sha256 success + hmac sha256 success + +efuse +----- + +This configuration demonstrates the use of the eFuse driver. It can be accessed +through the ``/dev/efuse`` device file. +Virtual eFuse mode can be used by enabling `CONFIG_ESPRESSIF_EFUSE_VIRTUAL` +option to prevent possible damages on chip. + +The following snippet demonstrates how to read MAC address: + +.. code-block:: C + + int fd; + int ret; + uint8_t mac[6]; + struct efuse_param_s param; + struct efuse_desc_s mac_addr = + { + .bit_offset = 1, + .bit_count = 48 + }; + + const efuse_desc_t* desc[] = + { + &mac_addr, + NULL + }; + param.field = desc; + param.size = 48; + param.data = mac; + + fd = open("/dev/efuse", O_RDONLY); + ret = ioctl(fd, EFUSEIOC_READ_FIELD, ¶m); + +To find offset and count variables for related eFuse, +please refer to Espressif's Technical Reference Manuals. + +gpio +---- + +This is a test for the GPIO driver. It uses GPIO1 and GPIO2 as outputs and +GPIO9 as an interrupt pin. + +At the nsh, we can turn the outputs on and off with the following:: + + nsh> gpio -o 1 /dev/gpio0 + nsh> gpio -o 1 /dev/gpio1 + + nsh> gpio -o 0 /dev/gpio0 + nsh> gpio -o 0 /dev/gpio1 + +We can use the interrupt pin to send a signal when the interrupt fires:: + + nsh> gpio -w 14 /dev/gpio2 + +The pin is configured as a rising edge interrupt, so after issuing the +above command, connect it to 3.3V. + +To use dedicated gpio for controlling multiple gpio pin at the same time +or having better response time, you need to enable +`CONFIG_ESPRESSIF_DEDICATED_GPIO` option. Dedicated GPIO is suitable +for faster response times required applications like simulate serial/parallel +interfaces in a bit-banging way. +After this option enabled GPIO4 and GPIO5 pins are ready to used as dedicated GPIO pins +as input/output mode. These pins are for example, you can use any pin up to 8 pins for +input and 8 pins for output for dedicated gpio. +To write and read data from dedicated gpio, you need to use +`write` and `read` calls. + +The following snippet demonstrates how to read/write to dedicated GPIO pins: + +.. code-block:: C + + int fd = open("/dev/dedic_gpio0", O_RDWR); + int rd_val = 0; + int wr_mask = 0xffff; + int wr_val = 3; + + while(1) + { + write(fd, &wr_val, wr_mask); + if (wr_val == 0) + { + wr_val = 3; + } + else + { + wr_val = 0; + } + read(fd, &rd_val, sizeof(uint32_t)); + printf("rd_val: %d", rd_val); + } + +i2c +--- + +This configuration can be used to scan and manipulate I2C devices. +You can scan for all I2C devices using the following command:: + + nsh> i2c dev 0x00 0x7f + +Default pins are GPIO6 (SCL) and GPIO5 (SDA). + +To use slave mode, you can enable `ESPRESSIF_I2C0_SLAVE_MODE` option. +To use slave mode driver following snippet demonstrates how write to i2c bus +using slave driver: + +.. code-block:: C + + #define ESP_I2C_SLAVE_PATH "/dev/i2cslv0" + int main(int argc, char *argv[]) + { + int i2c_slave_fd; + int ret; + uint8_t buffer[5] = {0xAA}; + i2c_slave_fd = open(ESP_I2C_SLAVE_PATH, O_RDWR); + ret = write(i2c_slave_fd, buffer, 5); + close(i2c_slave_fd); + } + +mcuboot_nsh +----------- + +This configuration is the same as the ``nsh`` configuration, but it generates the application +image in a format that can be used by MCUboot. It also makes the ``make bootloader`` command to +build the MCUboot bootloader image using the Espressif HAL. + +See :ref:`MCUBoot C2` for flash-layout limits on 2 MB modules. NuttX MCUBoot +support for ESP32-C2 is still in progress; there is no ``mcuboot_update_agent`` +configuration for this board. + +nsh +--- + +Basic configuration to run the NuttShell (nsh). + +ostest +------ + +This is the NuttX test at ``apps/testing/ostest`` that is run against all new +architecture ports to assure a correct implementation of the OS. + +pm +-- + +This config demonstrate the use of power management. +You can use the ``pmconfig`` command to check current power state and time spent in other power states. +Also you can define time will spend in standby and sleep modes:: + + $ make menuconfig + -> Board Selection + -> (15) PM_STANDBY delay (seconds) + (0) PM_STANDBY delay (nanoseconds) + (20) PM_SLEEP delay (seconds) + (0) PM_SLEEP delay (nanoseconds) + +Before switching PM status, you need to query the current PM status to call correct number of relax command to correct modes:: + + nsh> pmconfig + Last state 0, Next state 0 + + /proc/pm/state0: + DOMAIN0 WAKE SLEEP TOTAL + normal 0s 00% 0s 00% 0s 00% + idle 0s 00% 0s 00% 0s 00% + standby 0s 00% 0s 00% 0s 00% + sleep 0s 00% 0s 00% 0s 00% + + /proc/pm/wakelock0: + DOMAIN0 STATE COUNT TIME + system normal 2 1s + system idle 1 1s + system standby 1 1s + system sleep 1 1s + +In this case, needed commands to switch the system into PM idle mode:: + + nsh> pmconfig relax normal + nsh> pmconfig relax normal + +pwm +--- + +This configuration demonstrates the use of PWM through LEDC channel 0, +which defaults to GPIO2. To test it, just execute the ``pwm`` application:: + + nsh> pwm + pwm_main: starting output with frequency: 10000 duty: 00008000 + pwm_main: stopping output + +random +------ + +This configuration shows the use of the ESP32-C2's True Random Number Generator. +To test it, just run ``rand`` to get 32 randomly generated bytes:: + + nsh> rand + Reading 8 random numbers + Random values (0x3ffe0b00): + 0000 98 b9 66 a2 a2 c0 a2 ae 09 70 93 d1 b5 91 86 c8 ..f......p...... + 0010 8f 0e 0b 04 29 64 21 72 01 92 7c a2 27 60 6f 90 ....)d!r..|.'`o. + +romfs +----- + +This configuration demonstrates the use of ROMFS (Read-Only Memory File System) to provide +automated system initialization and startup scripts. ROMFS allows embedding a read-only +filesystem directly into the NuttX binary, which is mounted at ``/etc`` during system startup. + +**What ROMFS provides:** + +* **System initialization script** (``/etc/init.d/rc.sysinit``): Executed after board bring-up +* **Startup script** (``/etc/init.d/rcS``): Executed after system init, typically used to start applications + +**Default behavior:** + +When this configuration is used, NuttX will: + +1. Create a read-only RAM disk containing the ROMFS filesystem +2. Mount the ROMFS at ``/etc`` +3. Execute ``/etc/init.d/rc.sysinit`` during system initialization +4. Execute ``/etc/init.d/rcS`` for application startup + +**Customizing startup scripts:** + +The startup scripts are located in: +``boards/risc-v/esp32c2/common/src/etc/init.d/`` + +* ``rc.sysinit`` - System initialization script +* ``rcS`` - Application startup script + +To customize these scripts: + +1. **Edit the script files** in ``boards/risc-v/esp32c2/common/src/etc/init.d/`` +2. **Add your initialization commands** using any NSH-compatible commands + +**Example customizations:** + +* **rc.sysinit** - Set up system services, mount additional filesystems, configure network. +* **rcS** - Start your application, launch daemons, configure peripherals. This is executed after the rc.sysinit script. + +Example output:: + + *** Booting NuttX *** + [...] + rc.sysinit is called! + rcS file is called! + NuttShell (NSH) NuttX-12.8.0 + nsh> ls /etc/init.d + /etc/init.d: + . + .. + rc.sysinit + rcS + +rtc +--- + +This configuration demonstrates the use of the RTC driver through alarms. +You can set an alarm, check its progress and receive a notification after it expires:: + + nsh> alarm 10 + alarm_daemon started + alarm_daemon: Running + Opening /dev/rtc0 + Alarm 0 set in 10 seconds + nsh> alarm -r + Opening /dev/rtc0 + Alarm 0 is active with 10 seconds to expiration + nsh> alarm_daemon: alarm 0 received + +The ESP32-C2 has no RTC retention memory, so the saved time does not +survive deep sleep. + +sdmmc_spi +--------- + +This configuration is used to mount a FAT/FAT32 SD Card into the OS' filesystem. +It uses SPI to communicate with the SD Card, defaulting to SPI2. + +The SD slot number, SPI port number and minor number can be modified in ``Application Configuration → NSH Library``. + +To access the card's files, make sure ``/dev/mmcsd0`` exists and then execute the following commands:: + + nsh> ls /dev + /dev: + console + mmcsd0 + null + ttyS0 + zero + nsh> mount -t vfat /dev/mmcsd0 /mnt + +This will mount the SD Card to ``/mnt``. Now, you can use the SD Card as a normal filesystem. +For example, you can read a file and write to it:: + + nsh> ls /mnt + /mnt: + hello.txt + nsh> cat /mnt/hello.txt + Hello World + nsh> echo 'NuttX RTOS' >> /mnt/hello.txt + nsh> cat /mnt/hello.txt + Hello World! + NuttX RTOS + nsh> + +spi +--- + +This configuration enables the support for the SPI driver. +You can test it by connecting MOSI and MISO pins which are GPIO7 and GPIO2 +by default to each other and running the ``spi`` example:: + + nsh> spi exch -b 2 "AB" + Sending: AB + Received: AB + +If SPI peripherals are already in use you can also use bitbang driver which is a +software implemented SPI peripheral by enabling `CONFIG_ESPRESSIF_SPI_BITBANG` +option. + +spiflash +-------- + +This config tests the external SPI that comes with the ESP8684-MINI-1 module +connected through SPI1. + +By default a SmartFS file system is selected. +Once booted you can use the following commands to mount the file system:: + + nsh> mksmartfs /dev/smart0 + nsh> mount -t smartfs /dev/smart0 /mnt + +The storage partition defaults to offset ``0x110000`` and size ``0xf0000`` +on 2 MB flash so that it fits after the application image. + +temperature_sensor +------------------ + +This configuration enables the on-chip temperature sensor driver. The sensor is +exposed through the uORB interface and can be read with the ``sensortest`` +utility:: + + nsh> sensortest temp + +tickless +-------- + +This configuration enables the support for tickless scheduler mode. + +timers +------ + +This configuration tests the general purpose timer. The ESP32-C2 has a +single timer group. It adds driver support, registers the timer as a device +and includes the timer example. + +To test it, just run the following:: + + nsh> timer -d /dev/timer0 + +watchdog +-------- + +This configuration tests the watchdog timers. It includes the MWDT of the +single timer group, adds driver support, registers the WDT as a device and +includes the watchdog example application. + +To test it, just run the following command:: + + nsh> wdog -i /dev/watchdog0 + +wifi +---- + +Enables Wi-Fi support. You can define your credentials this way:: + + $ make menuconfig + -> Application Configuration + -> Network Utilities + -> Network initialization (NETUTILS_NETINIT [=y]) + -> WAPI Configuration + +Or if you don't want to keep it saved in the firmware you can do it +at runtime:: + + nsh> wapi psk wlan0 mypasswd 3 + nsh> wapi essid wlan0 myssid 1 + nsh> renew wlan0 + +.. tip:: Please refer to :ref:`ESP32 Wi-Fi Station Mode ` + for more information. diff --git a/Documentation/platforms/risc-v/esp32c2/index.rst b/Documentation/platforms/risc-v/esp32c2/index.rst new file mode 100644 index 0000000000000..1e9e106b7102f --- /dev/null +++ b/Documentation/platforms/risc-v/esp32c2/index.rst @@ -0,0 +1,635 @@ +.. _esp32c2: + +================== +Espressif ESP32-C2 +================== + +The ESP32-C2 (also sold as ESP8684) is a highly integrated, low-power SoC +with a RISC-V core. It supports 2.4 GHz Wi-Fi 4 (802.11b/g/n) and +Bluetooth 5 (LE). + +* Internal Memory + - 576 KB ROM + - 272 KB SRAM (16 KB can be configured as cache) + - No RTC retention SRAM (saved RTC time does not survive deep sleep) +* External Memory + - SPI flash in the module (typically 1 MB, 2 MB or 4 MB) +* Connectivity + - 2.4 GHz Wi-Fi + - Bluetooth Low Energy 5 +* GPIO + - 14 user GPIOs (GPIO0–GPIO10, GPIO18–GPIO20) +* Clock + - Main XTAL is 26 MHz on ESP8684-MINI-1 modules (40 MHz is also supported) + +ESP32-C2 Toolchain +================== + +A generic RISC-V toolchain can be used to build ESP32-C2 projects. It's recommended to use the same +toolchain used by NuttX CI. Please refer to the Docker +`container `_ and +check for the current compiler version being used. For instance: + +.. code-block:: + + ############################################################################### + # Build image for tool required by RISCV builds + ############################################################################### + FROM nuttx-toolchain-base AS nuttx-toolchain-riscv + # Download the latest RISCV GCC toolchain prebuilt by xPack + RUN mkdir riscv-none-elf-gcc && \ + curl -s -L "https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/releases/download/v13.2.0-2/xpack-riscv-none-elf-gcc-13.2.0-2-linux-x64.tar.gz" \ + | tar -C riscv-none-elf-gcc --strip-components 1 -xz + +It uses the xPack's prebuilt toolchain based on GCC 13.2.0-2. + +Installing +---------- + +First, create a directory to hold the toolchain: + +.. code-block:: console + + $ mkdir -p /path/to/your/toolchain/riscv-none-elf-gcc + +Download and extract toolchain: + +.. code-block:: console + + $ curl -s -L "https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/releases/download/v13.2.0-2/xpack-riscv-none-elf-gcc-13.2.0-2-linux-x64.tar.gz" \ + | tar -C /path/to/your/toolchain/riscv-none-elf-gcc --strip-components 1 -xz + +Add the toolchain to your `PATH`: + +.. code-block:: console + + $ echo "export PATH=/path/to/your/toolchain/riscv-none-elf-gcc/bin:$PATH" >> ~/.bashrc + +You can edit your shell's rc files if you don't use bash. + +Building and flashing NuttX +=========================== + +Installing esptool +------------------ + +Make sure that ``esptool.py`` is installed and up-to-date. +This tool is used to convert the ELF to a compatible ESP32-C2 image and to flash the image into the board. + +It can be installed with: ``pip install esptool>=4.8.1``. + +.. warning:: + Installing ``esptool.py`` may required a Python virtual environment on newer systems. + This will be the case if the ``pip install`` command throws an error such as: + ``error: externally-managed-environment``. + + If you are not familiar with virtual environments, refer to `Managing esptool on virtual environment`_ for instructions on how to install ``esptool.py``. + +Bootloader and partitions +------------------------- + +NuttX can boot the ESP32-C2 directly using the so-called "Simple Boot". +An externally-built 2nd stage bootloader is not required in this case as all +functions required to boot the device are built within NuttX. Simple boot does not +require any specific configuration (it is selectable by default if no other +2nd stage bootloader is used). + +If features like `Flash Encryption`_ are required, an externally-built +2nd stage bootloader is needed. The MCUBoot bootloader is built using +the ``make bootloader`` command. This command generates the firmware in the +``nuttx`` folder. The ``ESPTOOL_BINDIR`` is used in the ``make flash`` command +to specify the path to the bootloader. For compatibility among other SoCs and +future options of 2nd stage bootloaders, the commands ``make bootloader`` and +the ``ESPTOOL_BINDIR`` option (for the ``make flash``) can be used even if no +externally-built 2nd stage bootloader is being built (they will be ignored if +Simple Boot is used, for instance):: + + $ make bootloader + +.. note:: + MCUBoot support for ESP32-C2 on NuttX is still in progress. The + ``mcuboot_nsh`` board configuration can build an MCUBoot-format image, + but there is no ``mcuboot_update_agent`` configuration yet. The default + MCUBoot slot map in Kconfig assumes at least 4 MB of flash and does + **not** fit the 2 MB modules used on many ESP8684-DevKitM-1 boards. + +.. note:: It is recommended that if this is the first time you are using the board with NuttX to + perform a complete SPI FLASH erase. + + .. code-block:: console + + $ esptool.py erase_flash + +Building and Flashing +--------------------- + +This is a two-step process where the first step converts the ELF file into an ESP32-C2 compatible binary +and the second step flashes it to the board. These steps are included in the build system and it is +possible to build and flash the NuttX firmware simply by running:: + + $ make flash ESPTOOL_PORT= ESPTOOL_BINDIR=./ + +where: + +* ``ESPTOOL_PORT`` is typically ``/dev/ttyUSB0`` or similar. +* ``ESPTOOL_BINDIR=./`` is the path of the externally-built 2nd stage bootloader and the partition table (if applicable): when built using the ``make bootloader``, these files are placed into ``nuttx`` folder. +* ``ESPTOOL_BAUD`` is able to change the flash baud rate if desired. + +The ESP32-C2 port defaults to **2 MB** flash and **60 MHz** flash clock. + +Flashing NSH Example +-------------------- + +This example shows how to build and flash the ``nsh`` defconfig for the ESP8684-DevKitM-1 board:: + + $ cd nuttx + $ make distclean + $ ./tools/configure.sh esp8684-devkitm:nsh + $ make -j$(nproc) + +When the build is complete, the firmware can be flashed to the board using the command:: + + $ make -j$(nproc) flash ESPTOOL_PORT= ESPTOOL_BINDIR=./ + +where ```` is the serial port where the board is connected:: + + $ make flash ESPTOOL_PORT=/dev/ttyUSB0 ESPTOOL_BINDIR=./ + CP: nuttx.hex + MKIMAGE: NuttX binary + esptool.py -c esp32c2 elf2image --ram-only-header -fs 2MB -fm dio -ff 60m -o nuttx.bin nuttx + [...] + Generated: nuttx.bin + esptool.py -c esp32c2 -p /dev/ttyUSB0 -b 921600 write_flash -fs 2MB -fm dio -ff 60m 0x0000 nuttx.bin + [...] + Hard resetting via RTS pin... + +Now opening the serial port with a terminal emulator should show the NuttX console:: + + $ picocom -b 115200 /dev/ttyUSB0 + NuttShell (NSH) NuttX-12.8.0 + nsh> uname -a + NuttX 12.8.0 ... risc-v esp8684-devkitm + +The USB-to-UART bridge on the DevKit exposes UART0. The default UART0 pins +are GPIO20 (TX) and GPIO19 (RX). Use a USB cable that carries data lines; +charge-only cables will not enumerate the bridge. + +Building with CMake +------------------- + +General CMake usage (out-of-tree build, ``menuconfig`` target, and so on) is described in +:doc:`/quickstart/compiling_cmake`. The ESP32-C2 common arch enables post-build steps that +produce ``nuttx.bin`` (and related images) under the **CMake binary directory**; the build +log also prints suggested ``esptool.py`` command lines for your layout. + +Example (NuttX shell defconfig, Ninja generator):: + + $ cd nuttx + $ cmake -B build -DBOARD_CONFIG=esp8684-devkitm:nsh -GNinja + $ cmake --build build + +To reconfigure the tree after changing options (same as other NuttX CMake boards):: + + $ cmake --build build -t menuconfig + $ cmake --build build + +Persistent HAL cache (``NXTMPDIR``) +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Pass ``-DNXTMPDIR=ON`` at **configure** time to reuse a persistent clone of the +``esp-hal-3rdparty`` repository under ``nuttx/../nxtmpdir/esp-hal-3rdparty``. CMake checks +the expected revision; if it does not match, the cache directory is refreshed. This cuts +repeat configure/build time when the HAL checkout would otherwise be re-fetched into the +binary directory. + +Example:: + + $ cmake -B build -DBOARD_CONFIG=esp8684-devkitm:nsh -DNXTMPDIR=ON -GNinja + $ cmake --build build + +MCUBoot: building the 2nd-stage bootloader (``-t bootloader``) +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +For configurations that use MCUboot, build the bootloader the same way as +with Make, but via the CMake target:: + + $ cmake --build build -t bootloader + +The image is installed as ``mcuboot-esp32c2.bin`` in the NuttX **source** directory (not +inside ``build/``). + +.. note:: + + Flashing paths differ from the pure-Make flow: the application image is under your CMake + build directory (for example ``build/nuttx.bin``), while MCUboot binaries live next to + ``nuttx`` sources. + +Target flashing (``-t flash``) +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +After a successful CMake build, you can flash the chip with the ``flash`` custom target. +This is the CMake-side equivalent of the Make ``FLASH`` logic in +``tools/espressif/Config.mk``. + +**Serial port:** you must set ``ESPTOOL_PORT`` to a non-empty value (for example +``/dev/ttyUSB0``). If it is unset or empty, the flash step fails. + +Example:: + + $ export ESPTOOL_PORT=/dev/ttyUSB0 + $ cmake --build build -t flash + +Or for a single invocation:: + + $ ESPTOOL_PORT=/dev/ttyUSB0 cmake --build build -t flash + +Debugging +========= + +This section describes debugging techniques for the ESP32-C2. + +Debugging with ``openocd`` and ``gdb`` +-------------------------------------- + +Espressif uses a specific version of OpenOCD to support ESP32-C2: `openocd-esp32 `_. + +Please check `Building OpenOCD from Sources `_ +for more information on how to build OpenOCD for ESP32-C2. + +The ESP32-C2 does **not** integrate a USB-to-JTAG adapter. An external JTAG +adapter is required and can be connected as follows: + +============ =========== +ESP32-C2 Pin JTAG Signal +============ =========== +GPIO4 TMS +GPIO5 TDI +GPIO6 TCK +GPIO7 TDO +============ =========== + +These pins are also the default MTMS / MTDI / MTCK / MTDO strapping functions +on the ESP8684-DevKitM-1 header. + +OpenOCD can then be used:: + + openocd -c 'set ESP_RTOS hwthread; set ESP_FLASH_SIZE 0' -f board/esp32c2-ftdi.cfg + +Once OpenOCD is running, you can use GDB to connect to it and debug your application:: + + riscv-none-elf-gdb -x gdbinit nuttx + +whereas the content of the ``gdbinit`` file is:: + + target remote :3333 + set remote hardware-watchpoint-limit 2 + mon reset halt + flushregs + monitor reset halt + thb nsh_main + c + +.. note:: ``nuttx`` is the ELF file generated by the build process. Please note that ``CONFIG_DEBUG_SYMBOLS`` must be enabled in the ``menuconfig``. + +.. note:: + ``appimage_offset`` should be set to ``0x0`` when ``Simple Boot`` is used. For MCUboot, this value should be set to + ``CONFIG_ESPRESSIF_OTA_PRIMARY_SLOT_OFFSET`` (``0x20000`` by default). + +Please refer to :doc:`/quickstart/debugging` for more information about debugging techniques. + +Stack Dump and Backtrace Dump +----------------------------- + +NuttX has a feature to dump the stack of a task and to dump the backtrace of it (and of all +the other tasks). This feature is useful to debug the system when it is not behaving as expected, +especially when it is crashing. + +In order to enable this feature, the following options must be enabled in the NuttX configuration: +``CONFIG_SCHED_BACKTRACE``, ``CONFIG_DEBUG_SYMBOLS`` and, optionally, ``CONFIG_ALLSYMS``. + +.. note:: + The first two options enable the backtrace dump. The third option enables the backtrace dump + with the associated symbols, but increases the size of the generated NuttX binary. + +Espressif also provides a tool to translate the backtrace dump into a human-readable format. +This tool is called ``btdecode.sh`` and is available at ``tools/espressif/btdecode.sh`` of NuttX +repository. + +.. note:: + This tool is not necessary if ``CONFIG_ALLSYMS`` is enabled. In this case, the backtrace dump + contains the function names. + +Save a crash dump that contains ``sched_dumpstack`` lines to a file and decode it with:: + + ./tools/espressif/btdecode.sh esp32c2 /tmp/backtrace.txt + +Peripheral Support +================== + +The following list indicates the state of peripherals' support in NuttX: + +=========== ======= ==================== +Peripheral Support NOTES +=========== ======= ==================== +ADC Yes Oneshot +AES Yes +Bluetooth Yes +CAN/TWAI No +DMA Yes +eFuse Yes Also virtual mode supported +GPIO Yes Dedicated GPIO supported +HMAC No +I2C Yes Master and Slave mode supported +I2S Yes +LED/PWM Yes +RMT Yes +RNG Yes +RSA No +RTC Yes No RTC retention SRAM +SHA Yes +SPI Yes +SPIFLASH Yes +SPIRAM No +Timers Yes One timer group +UART Yes +USB Serial No No USB-Serial-JTAG on this SoC +Watchdog Yes +Wi-Fi Yes WPA3-SAE supported +=========== ======= ==================== + +Analog-to-digital converter (ADC) +--------------------------------- + +Two ADC units are available for the ESP32-C2: + +* ADC1 with 5 channels. +* ADC2 with 1 channel. **This unit is not implemented.** + +Those units are independent and can be used simultaneously. During bringup, GPIOs for selected channels are +configured automatically to be used as ADC inputs. +If available, ADC calibration is automatically applied (see +`this page `__ for more details). +Otherwise, a simple conversion is applied based on the attenuation and resolution. + +The ADC unit is accessible using the ADC character driver, which returns data for the enabled channels. + +The ADC1 unit can be enabled in the menu :menuselection:`System Type --> Peripheral Support --> Analog-to-digital converter (ADC)`. + +Then, it can be customized in the menu :menuselection:`System Type --> ADC Configuration`, which includes operating mode, gain and channels. + +========== =========== + Channel ADC1 GPIO +========== =========== +0 0 +1 1 +2 2 +3 3 +4 4 +========== =========== + +ADC2 channel 0 is GPIO5. + +.. warning:: Maximum measurable voltage may saturate around 2900 mV. + +.. _MCUBoot C2: + +MCUBoot +======= + +The ESP32-C2 can use MCUBoot as a 2nd stage bootloader. NuttX integration is +still marked as in progress upstream (see +`MCUBoot Espressif port `__). + +The ``esp8684-devkitm:mcuboot_nsh`` configuration produces an MCUBoot-compatible +application image and enables ``make bootloader``. There is no +``mcuboot_update_agent`` defconfig for this board yet. + +.. warning:: + Default MCUBoot Kconfig offsets (primary ``0x20000``, secondary ``0x170000``, + scratch ``0x2C0000``, optional storage ``0x300000``) assume **4 MB or more** + of flash. ESP8684-DevKitM-1 boards commonly ship with **2 MB**. Using those + defaults on 2 MB flash will place partitions past the end of the device. + Override ``ESPRESSIF_OTA_*`` and ``ESPRESSIF_STORAGE_MTD_*`` before enabling + MCUBoot on 2 MB parts. + +For Simple Boot on 2 MB flash, the storage MTD defaults to offset ``0x110000`` +and size ``0xf0000``. + +Flash Encryption +---------------- + +Flash encryption is intended for encrypting the contents of the ESP32-C2's off-chip flash memory. Once this feature is enabled, +firmware is flashed as plaintext, and then the data is encrypted in place on the first boot. As a result, physical readout +of flash will not be sufficient to recover most flash contents. + +The current state of flash encryption for ESP32-C2 allows the use of Virtual E-Fuses and development mode, which permit users to evaluate and test the firmware before making definitive changes such as burning E-Fuses. + +Flash encryption supports the following features: + + .. list-table:: + :header-rows: 1 + + * - Feature + - Description + * - **Flash Encryption with Virtual E-Fuses** + - Use flash encryption without burning E-Fuses. Default selection when flash encryption is enabled. + * - **Flash Encryption in Development mode** + - Allows reflashing an encrypted device by appending the ``--encrypt`` argument to the ``esptool.py write_flash`` command. This is done automatically if ``ESPRESSIF_SECURE_FLASH_ENC_FLASH_DEVICE_ENCRYPTED`` is set. + * - **Flash Encryption in Release mode** + - Does not allow reflashing the device. This is a permanent setting. + * - **Flash Encryption key** + - A user-generated key is required by default. Alternatively, a device-generated key is possible, but it will not be recoverable by the user (not recommended). See ``ESPRESSIF_SECURE_FLASH_ENC_USE_HOST_KEY``. + * - **Encrypted MTD Partition** + - If SPI Flash is enabled, an empty user MTD partition will be automatically encrypted on first flash. + +.. note:: + + It is **strongly suggested** to read the following before working on flash encryption: + + - `MCUBoot Flash Encryption `_ + - `General E-Fuse documentation `_ + - `Flash Encryption Relevant E-Fuses `_ + + ESP32-C2 Secure Boot V2 uses **ECDSA**, not RSA. + +Flash Encryption Requirements +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Flash encryption requires burning E-Fuses to enable it on chip. This is not a reversible operation and should be done with caution. +There is, however, a way to test the flash encryption by simulating them on flash. + +Build System Features +''''''''''''''''''''' + +The build system contains some safeguards to avoid accidentally burning E-Fuses and automations for convenience. Those are summarized below: + + 1. A yellow warning will show up during build alerting that flash encryption is enabled (same for Virtual E-Fuses). + 2. If ``ESPRESSIF_SECURE_FLASH_ENC_USE_HOST_KEY`` is set, build will fail if the flash encryption key is not found. + 3. If SPI Flash is enabled, the user MTD partition is automatically encrypted with the provided encryption key. + 4. ``make flash`` command will prompt the user for confirmation before burning the E-Fuse, if Virtual E-Fuses are disabled. + +Simulating Flash Encryption with Virtual E-Fuses +''''''''''''''''''''''''''''''''''''''''''''''''' + +It is highly recommended to use this method for testing the flash encryption before actually burning the E-Fuses. +The E-Fuses are stored in flash and persist between reboots. No real E-Fuses are changed. + +To enable virtual E-Fuses for flash encryption testing, open ``menuconfig`` and: + 1. Enable flash encryption on boot on: :menuselection:`System Type --> Bootloader and Image Configuration` + 2. Verify Virtual E-Fuses are enabled (this is done by default): :menuselection:`System Type --> Peripheral Support --> E-Fuse support` + +Actual encryption and burning E-Fuses +''''''''''''''''''''''''''''''''''''' + +E-Fuses are burned by esptool and the bootloader on the first boot after flashing with encryption enabled. +This process is automated on NuttX build system. + +.. warning:: Burning E-Fuses is NOT a reversible operation and should be done with caution. + +To build a firmware with E-Fuse support and flash encryption enabled, open ``menuconfig`` and: + 1. Enable flash encryption on boot on: :menuselection:`System Type --> Bootloader and Image Configuration` + 2. Disable Virtual E-Fuses :menuselection:`System Type --> Peripheral Support --> E-Fuse support` + 3. Check usage mode is Development (this allows reflashing, while Release mode does not). + +.. note:: If using development mode of flash encryption (see menuconfig and documentation above), it is still possible to re-flash the device with esptool by + setting ``ESPRESSIF_SECURE_FLASH_ENC_FLASH_DEVICE_ENCRYPTED`` which adds ``--encrypt`` argument to the ``esptool.py write_flash`` command. + This will apply the burned encryption key to the image while flashing. + +Flash Allocation for MCUBoot +---------------------------- + +When MCUBoot is enabled, the **default** Kconfig layout is the same as on other +Espressif RISC-V chips (4 MB class). Do not use it unchanged on 2 MB flash. + +**Default flash layout (MCUBoot enabled, 4 MB+)** + +.. list-table:: + :header-rows: 1 + :widths: 40 20 20 + :align: left + + * - Region + - Offset + - Size + * - Bootloader + - 0x000000 + - 64KB + * - E-Fuse Virtual (see Note) + - 0x010000 + - 64KB + * - Primary Application Slot (/dev/ota0) + - 0x020000 + - 1.4MB + * - Secondary Application Slot (/dev/ota1) + - 0x170000 + - 1.4MB + * - Scratch Partition (/dev/otascratch) + - 0x2C0000 + - 256KB + * - Storage MTD (optional) + - 0x300000 + - 1MB + * - Available Flash + - 0x400000+ + - Remaining + +.. raw:: html + +
+ +**Note**: The E-Fuse Virtual region is optional and only used when +``ESPRESSIF_EFUSE_VIRTUAL_KEEP_IN_FLASH`` is enabled. However, this 64KB +location is always allocated in the memory layout to prevent accidental +erasure during board flashing operations, ensuring data preservation if +virtual E-Fuses are later enabled. + +The key KConfig options that control this layout: + +- ``ESPRESSIF_OTA_PRIMARY_SLOT_OFFSET`` (default: 0x20000) +- ``ESPRESSIF_OTA_SECONDARY_SLOT_OFFSET`` (default: 0x170000) +- ``ESPRESSIF_OTA_SLOT_SIZE`` (default: 0x150000) +- ``ESPRESSIF_OTA_SCRATCH_OFFSET`` (default: 0x2C0000) +- ``ESPRESSIF_OTA_SCRATCH_SIZE`` (default: 0x40000) +- ``ESPRESSIF_STORAGE_MTD_OFFSET`` (default: 0x300000 when MCUBoot enabled) +- ``ESPRESSIF_STORAGE_MTD_SIZE`` (default: 0x100000) + +For MCUBoot operation: + +- The **Primary Slot** contains the currently running application +- The **Secondary Slot** receives OTA updates +- The **Scratch Partition** is used by MCUBoot for image swapping during updates +- MCUBoot manages image validation, confirmation, and rollback functionality + +_`Managing esptool on virtual environment` +========================================== + +This section describes how to install ``esptool``, ``imgtool`` or any other Python packages in a +proper environment. + +Normally, a Linux-based OS would already have Python 3 installed by default. Up to a few years ago, +you could simply call ``pip install`` to install packages globally. However, this is no longer recommended +as it can lead to conflicts between packages and versions. The recommended way to install Python packages +is to use a virtual environment. + +A virtual environment is a self-contained directory that contains a Python installation for a particular +version of Python, plus a number of additional packages. You can create a virtual environment for each +project you are working on, and install the required packages in that environment. + +Two alternatives are explained below, you can select any one of those. + +Using pipx (recommended) +------------------------ + +``pipx`` is a tool that makes it easy to install Python packages in a virtual environment. To install +``pipx``, you can run the following command (using apt as example):: + + $ apt install pipx + +Once you have installed ``pipx``, you can use it to install Python packages in a virtual environment. For +example, to install the ``esptool`` package, you can run the following command:: + + $ pipx install esptool + +This will create a new virtual environment in the ``~/.local/pipx/venvs`` directory, which contains the +``esptool`` package. You can now use the ``esptool`` command as normal, and so will the build system. + +Make sure to run ``pipx ensurepath`` to add the ``~/.local/bin`` directory to your ``PATH``. This will +allow you to run the ``esptool`` command from any directory. + +Using venv (alternative) +------------------------ +To create a virtual environment, you can use the ``venv`` module, which is included in the Python standard +library. To create a virtual environment, you can run the following command:: + + $ python3 -m venv myenv + +This will create a new directory called ``myenv`` in the current directory, which contains a Python +installation and a copy of the Python standard library. To activate the virtual environment, you can run +the following command:: + + $ source myenv/bin/activate + +This will change your shell prompt to indicate that you are now working in the virtual environment. You can +now install packages using ``pip``. For example, to install the ``esptool`` package, you can run the following +command:: + + $ pip install esptool + +This will install the ``esptool`` package in the virtual environment. You can now use the ``esptool`` command as +normal. When you are finished working in the virtual environment, you can deactivate it by running the following +command:: + + $ deactivate + +This will return your shell prompt to its normal state. You can reactivate the virtual environment at any time by +running the ``source myenv/bin/activate`` command again. You can also delete the virtual environment by deleting +the directory that contains it. + +Supported Boards +================ + +.. toctree:: + :glob: + :maxdepth: 1 + + boards/*/* diff --git a/arch/risc-v/Kconfig b/arch/risc-v/Kconfig index 3e4eec577dac5..810636166f7e5 100644 --- a/arch/risc-v/Kconfig +++ b/arch/risc-v/Kconfig @@ -116,6 +116,40 @@ config ARCH_CHIP_ESP32C3_LEGACY ---help--- Espressif ESP32-C3 (RV32IMC). Legacy implementation. +config ARCH_CHIP_ESP32C2 + bool "ESP32-C2" + select ARCH_RV32 + select ARCH_RV_ISA_M + select ARCH_RV_ISA_C + select ARCH_VECNOTIRQ + select ARCH_HAVE_BOOTLOADER if !ESPRESSIF_SIMPLE_BOOT + select ARCH_HAVE_I2CRESET + select ARCH_HAVE_MPU + select ARCH_HAVE_RESET + select ARCH_HAVE_RNG + select ARCH_HAVE_TICKLESS + select LIBC_ARCH_MEMCPY + select LIBC_ARCH_MEMCHR + select LIBC_ARCH_MEMCMP + select LIBC_ARCH_MEMMOVE + select LIBC_ARCH_MEMSET + select LIBC_ARCH_STRCHR + select LIBC_ARCH_STRCMP + select LIBC_ARCH_STRCPY + select LIBC_ARCH_STRLCPY + select LIBC_ARCH_STRNCPY + select LIBC_ARCH_STRLEN + select LIBC_ARCH_STRNLEN + select ESPRESSIF_SOC_RTC_MEM_SUPPORTED + select ARCH_HAVE_DEBUG + select ARCH_HAVE_RAMFUNCS + select ONESHOT_COUNT if ONESHOT + select ONESHOT_FAST_DIVISION if ONESHOT + select ARCH_MINIMAL_VECTORTABLE + select LIBC_ATOMIC_IRQ + ---help--- + ESP32-C2 chip (ESP8684) with a single RISC-V IMC core @ 120 MHz + config ARCH_CHIP_ESP32C3 bool "ESP32-C3" select ARCH_RV32 @@ -667,6 +701,7 @@ config ARCH_CHIP default "gd32vw55x" if ARCH_CHIP_GD32VW55X default "bl602" if ARCH_CHIP_BL602 default "esp32c3-legacy" if ARCH_CHIP_ESP32C3_LEGACY + default "esp32c2" if ARCH_CHIP_ESP32C2 default "esp32c3" if ARCH_CHIP_ESP32C3 default "esp32c6" if ARCH_CHIP_ESP32C6 default "esp32h2" if ARCH_CHIP_ESP32H2 @@ -915,6 +950,9 @@ endif if ARCH_CHIP_ESP32C3_LEGACY source "arch/risc-v/src/esp32c3-legacy/Kconfig" endif +if ARCH_CHIP_ESP32C2 +source "arch/risc-v/src/esp32c2/Kconfig" +endif if ARCH_CHIP_ESP32C3 source "arch/risc-v/src/esp32c3/Kconfig" endif diff --git a/arch/risc-v/include/esp32c2/.gitignore b/arch/risc-v/include/esp32c2/.gitignore new file mode 100644 index 0000000000000..a9e61e717ee17 --- /dev/null +++ b/arch/risc-v/include/esp32c2/.gitignore @@ -0,0 +1,2 @@ +/gpio_sig_map.h +/irq.h diff --git a/arch/risc-v/include/esp32c2/chip.h b/arch/risc-v/include/esp32c2/chip.h new file mode 100644 index 0000000000000..c4a28a705c22c --- /dev/null +++ b/arch/risc-v/include/esp32c2/chip.h @@ -0,0 +1,34 @@ +/**************************************************************************** + * arch/risc-v/include/esp32c2/chip.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_RISCV_INCLUDE_ESP32C2_CHIP_H +#define __ARCH_RISCV_INCLUDE_ESP32C2_CHIP_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#endif /* __ARCH_RISCV_INCLUDE_ESP32C2_CHIP_H */ diff --git a/arch/risc-v/src/common/espressif/CMakeLists.txt b/arch/risc-v/src/common/espressif/CMakeLists.txt index 350a7beede9bc..69e8b78afdb57 100644 --- a/arch/risc-v/src/common/espressif/CMakeLists.txt +++ b/arch/risc-v/src/common/espressif/CMakeLists.txt @@ -233,7 +233,7 @@ if(DEFINED ENV{ESP_HAL_3RDPARTY_VERSION}) CACHE STRING "ESP HAL 3rdparty version") else() set(ESP_HAL_3RDPARTY_VERSION - 8d0a898910084206721a0892ab093021bca1496a + 772738e470cbf64b7c0e481fe17b03c922cc6fb5 CACHE STRING "ESP HAL 3rdparty version") endif() diff --git a/arch/risc-v/src/common/espressif/Kconfig b/arch/risc-v/src/common/espressif/Kconfig index 5cb80562ed0bf..2ab5704a2f60b 100644 --- a/arch/risc-v/src/common/espressif/Kconfig +++ b/arch/risc-v/src/common/espressif/Kconfig @@ -3,10 +3,11 @@ # see the file kconfig-language.txt in the NuttX tools repository. # -if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32P4 +if ARCH_CHIP_ESP32C2 || ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32P4 config ESPRESSIF_CHIP_SERIES string + default "esp32c2" if ARCH_CHIP_ESP32C2 default "esp32c3" if ARCH_CHIP_ESP32C3 default "esp32c6" if ARCH_CHIP_ESP32C6 default "esp32h2" if ARCH_CHIP_ESP32H2 @@ -15,6 +16,7 @@ config ESPRESSIF_CHIP_SERIES choice ESPRESSIF_FLASH prompt "Flash Size" + default ESPRESSIF_FLASH_2M if ARCH_CHIP_ESP32C2 default ESPRESSIF_FLASH_4M if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32P4 config ESPRESSIF_FLASH_2M @@ -152,13 +154,14 @@ config ESPRESSIF_FLASH_DETECT config ESPRESSIF_NUM_CPUS int - default 1 if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 + default 1 if ARCH_CHIP_ESP32C2 || ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 default 2 if ARCH_CHIP_ESP32P4 choice ESPRESSIF_CPU_FREQ prompt "CPU frequency" default ESPRESSIF_CPU_FREQ_40 if ARCH_CHIP_ESP32P4 && ESPRESSIF_IDF_ENV_FPGA default ESPRESSIF_CPU_FREQ_96 if ARCH_CHIP_ESP32H2 + default ESPRESSIF_CPU_FREQ_120 if ARCH_CHIP_ESP32C2 default ESPRESSIF_CPU_FREQ_160 if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 default ESPRESSIF_CPU_FREQ_360 if ARCH_CHIP_ESP32P4 && ESP32P4_SELECTS_REV_LESS_V3 default ESPRESSIF_CPU_FREQ_400 if ARCH_CHIP_ESP32P4 && !ESP32P4_SELECTS_REV_LESS_V3 @@ -185,7 +188,7 @@ config ESPRESSIF_CPU_FREQ_64 config ESPRESSIF_CPU_FREQ_80 bool "80 MHz" - depends on ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 + depends on ARCH_CHIP_ESP32C2 || ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 ---help--- Set the CPU frequency to 80 MHz. @@ -195,6 +198,12 @@ config ESPRESSIF_CPU_FREQ_96 ---help--- Set the CPU frequency to 96 MHz. +config ESPRESSIF_CPU_FREQ_120 + bool "120 MHz" + depends on ARCH_CHIP_ESP32C2 + ---help--- + Set the CPU frequency to 120 MHz. + config ESPRESSIF_CPU_FREQ_160 bool "160 MHz" depends on ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 @@ -222,10 +231,30 @@ config ESPRESSIF_CPU_FREQ_MHZ default 64 if ESPRESSIF_CPU_FREQ_64 default 80 if ESPRESSIF_CPU_FREQ_80 default 96 if ESPRESSIF_CPU_FREQ_96 + default 120 if ESPRESSIF_CPU_FREQ_120 default 160 if ESPRESSIF_CPU_FREQ_160 default 360 if ESPRESSIF_CPU_FREQ_360 default 400 if ESPRESSIF_CPU_FREQ_400 +if ARCH_CHIP_ESP32C2 + +choice ESPRESSIF_XTAL_FREQ + prompt "Main XTAL frequency" + default ESPRESSIF_XTAL_FREQ_26M + ---help--- + Operating frequency of the main crystal (XTAL) clock. + Must match the hardware crystal. ESP8684-MINI-1 modules use 26 MHz. + +config ESPRESSIF_XTAL_FREQ_26M + bool "26 MHz" + +config ESPRESSIF_XTAL_FREQ_40M + bool "40 MHz" + +endchoice # ESPRESSIF_XTAL_FREQ + +endif # ARCH_CHIP_ESP32C2 + config ESPRESSIF_DFS bool "Enable DFS (Dynamic Frequency Scaling)" select PM @@ -1516,23 +1545,23 @@ endchoice # PM_UART_WAKEUP_UART_NUM choice PM_UART_WAKEUP_MODE prompt "PM UART Wakeup Mode" - default PM_UART_WAKEUP_START_BIT_MODE if !ARCH_CHIP_ESP32C3 - default PM_UART_WAKEUP_ACTIVE_EDGE_THRESHOLD_MODE if ARCH_CHIP_ESP32C3 + default PM_UART_WAKEUP_START_BIT_MODE if !ARCH_CHIP_ESP32C2 && !ARCH_CHIP_ESP32C3 + default PM_UART_WAKEUP_ACTIVE_EDGE_THRESHOLD_MODE if ARCH_CHIP_ESP32C2 || ARCH_CHIP_ESP32C3 config PM_UART_WAKEUP_ACTIVE_EDGE_THRESHOLD_MODE bool "Wake-up triggered by active edge threshold" config PM_UART_WAKEUP_FIFO_THRESHOLD_MODE bool "Wake-up triggered by the number of bytes received in the RX FIFO" - depends on !ARCH_CHIP_ESP32C3 + depends on !ARCH_CHIP_ESP32C2 && !ARCH_CHIP_ESP32C3 config PM_UART_WAKEUP_START_BIT_MODE bool "Wake-up triggered by the detection of a start bit" - depends on !ARCH_CHIP_ESP32C3 + depends on !ARCH_CHIP_ESP32C2 && !ARCH_CHIP_ESP32C3 config PM_UART_WAKEUP_CHAR_SEQ_MODE bool "Wake-up triggered by detecting a specific character sequence" - depends on !ARCH_CHIP_ESP32C3 + depends on !ARCH_CHIP_ESP32C2 && !ARCH_CHIP_ESP32C3 endchoice # PM_UART_WAKEUP_MODE @@ -1916,6 +1945,7 @@ config ESPRESSIF_EFUSE_VIRTUAL_KEEP_IN_FLASH_OFFSET hex "E-Fuses offset in flash" depends on ESPRESSIF_EFUSE_VIRTUAL_KEEP_IN_FLASH default 0x10000 if ESPRESSIF_BOOTLOADER_MCUBOOT + default 0x100000 if ESPRESSIF_FLASH_2M default 0x250000 if !ESPRESSIF_BOOTLOADER_MCUBOOT ---help--- Offset in flash where the E-Fuses will be stored when using the "E-Fuses size to keep in flash" option. @@ -2062,7 +2092,7 @@ config ESPRESSIF_WIRELESS config ESPRESSIF_WIFI bool "Wi-Fi" - depends on ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 + depends on ARCH_CHIP_ESP32C2 || ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 default n select ESPRESSIF_WIRELESS ---help--- @@ -3274,10 +3304,12 @@ config ESPRESSIF_UART0_RS485_DIR_POLARITY config ESPRESSIF_UART0_TXPIN int "UART0 TX Pin" + default 20 if ARCH_CHIP_ESP32C2 default 21 if ARCH_CHIP_ESP32C3 default 16 if ARCH_CHIP_ESP32C6 default 24 if ARCH_CHIP_ESP32H2 default 37 if ARCH_CHIP_ESP32P4 + range 0 20 if ARCH_CHIP_ESP32C2 range 0 21 if ARCH_CHIP_ESP32C3 range 0 30 if ARCH_CHIP_ESP32C6 range 0 27 if ARCH_CHIP_ESP32H2 @@ -3285,10 +3317,12 @@ config ESPRESSIF_UART0_TXPIN config ESPRESSIF_UART0_RXPIN int "UART0 RX Pin" + default 19 if ARCH_CHIP_ESP32C2 default 20 if ARCH_CHIP_ESP32C3 default 17 if ARCH_CHIP_ESP32C6 default 23 if ARCH_CHIP_ESP32H2 default 38 if ARCH_CHIP_ESP32P4 + range 0 20 if ARCH_CHIP_ESP32C2 range 0 21 if ARCH_CHIP_ESP32C3 range 0 30 if ARCH_CHIP_ESP32C6 range 0 27 if ARCH_CHIP_ESP32H2 @@ -3297,10 +3331,12 @@ config ESPRESSIF_UART0_RXPIN config ESPRESSIF_UART0_RTSPIN int "UART0 RTS Pin" depends on SERIAL_IFLOWCONTROL + default 18 if ARCH_CHIP_ESP32C2 default 16 if ARCH_CHIP_ESP32C3 default 15 if ARCH_CHIP_ESP32C6 default 22 if ARCH_CHIP_ESP32H2 default 35 if ARCH_CHIP_ESP32P4 + range 0 20 if ARCH_CHIP_ESP32C2 range 0 21 if ARCH_CHIP_ESP32C3 range 0 30 if ARCH_CHIP_ESP32C6 range 0 27 if ARCH_CHIP_ESP32H2 @@ -3309,10 +3345,12 @@ config ESPRESSIF_UART0_RTSPIN config ESPRESSIF_UART0_CTSPIN int "UART0 CTS Pin" depends on SERIAL_OFLOWCONTROL + default 19 if ARCH_CHIP_ESP32C2 default 15 if ARCH_CHIP_ESP32C3 default 14 if ARCH_CHIP_ESP32C6 default 21 if ARCH_CHIP_ESP32H2 default 36 if ARCH_CHIP_ESP32P4 + range 0 20 if ARCH_CHIP_ESP32C2 range 0 21 if ARCH_CHIP_ESP32C3 range 0 30 if ARCH_CHIP_ESP32C6 range 0 27 if ARCH_CHIP_ESP32H2 @@ -3352,16 +3390,27 @@ config ESPRESSIF_UART1_RS485_DIR_POLARITY config ESPRESSIF_UART1_TXPIN int "UART1 TX Pin" - default 8 if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32P4 + default 8 if ARCH_CHIP_ESP32C2 || ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32P4 + range 0 20 if ARCH_CHIP_ESP32C2 + range 0 21 if ARCH_CHIP_ESP32C3 + range 0 30 if ARCH_CHIP_ESP32C6 + range 0 27 if ARCH_CHIP_ESP32H2 + range 0 54 if ARCH_CHIP_ESP32P4 config ESPRESSIF_UART1_RXPIN int "UART1 RX Pin" - default 9 if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32P4 + default 9 if ARCH_CHIP_ESP32C2 || ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32P4 + range 0 20 if ARCH_CHIP_ESP32C2 + range 0 21 if ARCH_CHIP_ESP32C3 + range 0 30 if ARCH_CHIP_ESP32C6 + range 0 27 if ARCH_CHIP_ESP32H2 + range 0 54 if ARCH_CHIP_ESP32P4 config ESPRESSIF_UART1_RTSPIN int "UART1 RTS Pin" depends on SERIAL_IFLOWCONTROL - default 1 if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32P4 + default 1 if ARCH_CHIP_ESP32C2 || ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32P4 + range 0 20 if ARCH_CHIP_ESP32C2 range 0 21 if ARCH_CHIP_ESP32C3 range 0 30 if ARCH_CHIP_ESP32C6 range 0 27 if ARCH_CHIP_ESP32H2 @@ -3370,7 +3419,8 @@ config ESPRESSIF_UART1_RTSPIN config ESPRESSIF_UART1_CTSPIN int "UART1 CTS Pin" depends on SERIAL_OFLOWCONTROL - default 2 if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 + default 2 if ARCH_CHIP_ESP32C2 || ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 + range 0 20 if ARCH_CHIP_ESP32C2 range 0 21 if ARCH_CHIP_ESP32C3 range 0 30 if ARCH_CHIP_ESP32C6 range 0 27 if ARCH_CHIP_ESP32H2 @@ -3622,10 +3672,12 @@ config ESPRESSIF_SPI2_SLAVE_BUFSIZE config ESPRESSIF_SPI2_CSPIN int "SPI2 CS Pin" + default 10 if ARCH_CHIP_ESP32C2 default 10 if ARCH_CHIP_ESP32C3 default 16 if ARCH_CHIP_ESP32C6 default 1 if ARCH_CHIP_ESP32H2 default 28 if ARCH_CHIP_ESP32P4 + range 0 20 if ARCH_CHIP_ESP32C2 range 0 21 if ARCH_CHIP_ESP32C3 range 0 30 if ARCH_CHIP_ESP32C6 range 0 27 if ARCH_CHIP_ESP32H2 @@ -3633,10 +3685,12 @@ config ESPRESSIF_SPI2_CSPIN config ESPRESSIF_SPI2_CLKPIN int "SPI2 CLK Pin" + default 6 if ARCH_CHIP_ESP32C2 default 6 if ARCH_CHIP_ESP32C3 default 6 if ARCH_CHIP_ESP32C6 default 4 if ARCH_CHIP_ESP32H2 default 30 if ARCH_CHIP_ESP32P4 + range 0 20 if ARCH_CHIP_ESP32C2 range 0 21 if ARCH_CHIP_ESP32C3 range 0 30 if ARCH_CHIP_ESP32C6 range 0 27 if ARCH_CHIP_ESP32H2 @@ -3644,10 +3698,12 @@ config ESPRESSIF_SPI2_CLKPIN config ESPRESSIF_SPI2_MOSIPIN int "SPI2 MOSI Pin" + default 7 if ARCH_CHIP_ESP32C2 default 7 if ARCH_CHIP_ESP32C3 default 7 if ARCH_CHIP_ESP32C6 default 5 if ARCH_CHIP_ESP32H2 default 29 if ARCH_CHIP_ESP32P4 + range 0 20 if ARCH_CHIP_ESP32C2 range 0 21 if ARCH_CHIP_ESP32C3 range 0 30 if ARCH_CHIP_ESP32C6 range 0 27 if ARCH_CHIP_ESP32H2 @@ -3655,10 +3711,12 @@ config ESPRESSIF_SPI2_MOSIPIN config ESPRESSIF_SPI2_MISOPIN int "SPI2 MISO Pin" + default 2 if ARCH_CHIP_ESP32C2 default 2 if ARCH_CHIP_ESP32C3 default 2 if ARCH_CHIP_ESP32C6 default 0 if ARCH_CHIP_ESP32H2 default 31 if ARCH_CHIP_ESP32P4 + range 0 20 if ARCH_CHIP_ESP32C2 range 0 21 if ARCH_CHIP_ESP32C3 range 0 30 if ARCH_CHIP_ESP32C6 range 0 27 if ARCH_CHIP_ESP32H2 @@ -3883,6 +3941,7 @@ choice ESPRESSIF_FLASH_FREQ default ESPRESSIF_FLASH_FREQ_40M if ESP32P4_REV_MIN_0 default ESPRESSIF_FLASH_FREQ_40M if ARCH_CHIP_ESP32P4 && ESPRESSIF_IDF_ENV_FPGA default ESPRESSIF_FLASH_FREQ_80M if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32P4 + default ESPRESSIF_FLASH_FREQ_60M if ARCH_CHIP_ESP32C2 default ESPRESSIF_FLASH_FREQ_64M if ARCH_CHIP_ESP32H2 ---help--- SPI Flash frequency. @@ -3896,6 +3955,14 @@ config ESPRESSIF_FLASH_FREQ_64M bool "64 MHz" depends on ARCH_CHIP_ESP32H2 +config ESPRESSIF_FLASH_FREQ_60M + bool "60 MHz" + depends on ARCH_CHIP_ESP32C2 + +config ESPRESSIF_FLASH_FREQ_30M + bool "30 MHz" + depends on ARCH_CHIP_ESP32C2 + config ESPRESSIF_FLASH_FREQ_40M bool "40 MHz" depends on ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32P4 @@ -3906,7 +3973,11 @@ config ESPRESSIF_FLASH_FREQ_26M config ESPRESSIF_FLASH_FREQ_20M bool "20 MHz" - depends on ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32P4 + depends on ARCH_CHIP_ESP32C2 || ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32P4 + +config ESPRESSIF_FLASH_FREQ_15M + bool "15 MHz" + depends on ARCH_CHIP_ESP32C2 endchoice # ESPRESSIF_FLASH_FREQ @@ -3925,6 +3996,7 @@ config ESPRESSIF_FLASH_FREQ default '40m' if ESPRESSIF_FLASH_FREQ_40M default '26m' if ESPRESSIF_FLASH_FREQ_26M default '20m' if ESPRESSIF_FLASH_FREQ_20M + default '15m' if ESPRESSIF_FLASH_FREQ_15M default '12m' if ESPRESSIF_FLASH_FREQ_16M default '20m' # if no clock can match in bin headers, go with minimal. @@ -3977,14 +4049,16 @@ config ESPRESSIF_STORAGE_MTD_DEBUG config ESPRESSIF_STORAGE_MTD_OFFSET hex "Storage MTD base address in SPI Flash" - default 0x180000 if !ESPRESSIF_BOOTLOADER_MCUBOOT default 0x300000 if ESPRESSIF_BOOTLOADER_MCUBOOT + default 0x110000 if ESPRESSIF_FLASH_2M + default 0x180000 if !ESPRESSIF_BOOTLOADER_MCUBOOT depends on ESPRESSIF_MTD ---help--- MTD base address in SPI Flash. config ESPRESSIF_STORAGE_MTD_SIZE hex "Storage MTD size in SPI Flash" + default 0xf0000 if ESPRESSIF_FLASH_2M default 0x100000 depends on ESPRESSIF_MTD ---help--- diff --git a/arch/risc-v/src/common/espressif/Make.defs b/arch/risc-v/src/common/espressif/Make.defs index 5216b98a9eebe..badfb809cb74f 100644 --- a/arch/risc-v/src/common/espressif/Make.defs +++ b/arch/risc-v/src/common/espressif/Make.defs @@ -243,7 +243,7 @@ endif ESP_HAL_3RDPARTY_REPO = esp-hal-3rdparty ifndef ESP_HAL_3RDPARTY_VERSION - ESP_HAL_3RDPARTY_VERSION = 8d0a898910084206721a0892ab093021bca1496a + ESP_HAL_3RDPARTY_VERSION = 772738e470cbf64b7c0e481fe17b03c922cc6fb5 endif ifndef ESP_HAL_3RDPARTY_URL @@ -293,7 +293,7 @@ endif ifeq ($(CONFIG_ESPRESSIF_WIRELESS),y) ifneq ($(USE_NXTMPDIR_ESP_REPO_DIRECTLY),y) $(Q) echo "Espressif HAL for 3rd Party Platforms: initializing submodules..." - $(Q) git -C chip/$(ESP_HAL_3RDPARTY_REPO) submodule --quiet update --init $(GIT_DEPTH_PARAMETER) components/esp_phy/lib components/esp_wifi/lib components/bt/controller/lib_esp32c3_family components/bt/controller/lib_esp32c6/esp32c6-bt-lib components/bt/controller/lib_esp32h2/esp32h2-bt-lib components/esp_coex/lib + $(Q) git -C chip/$(ESP_HAL_3RDPARTY_REPO) submodule --quiet update --init $(GIT_DEPTH_PARAMETER) components/esp_phy/lib components/esp_wifi/lib components/bt/controller/lib_esp32c2/esp32c2-bt-lib components/bt/controller/lib_esp32c3_family components/bt/controller/lib_esp32c6/esp32c6-bt-lib components/bt/controller/lib_esp32h2/esp32h2-bt-lib components/esp_coex/lib $(Q) git -C chip/$(ESP_HAL_3RDPARTY_REPO)/components/mbedtls/mbedtls reset --quiet --hard endif $(Q) echo "Applying patches..." diff --git a/arch/risc-v/src/common/espressif/Wireless.cmake b/arch/risc-v/src/common/espressif/Wireless.cmake index cfd6a486b6539..c1ae6aabcd826 100644 --- a/arch/risc-v/src/common/espressif/Wireless.cmake +++ b/arch/risc-v/src/common/espressif/Wireless.cmake @@ -42,17 +42,21 @@ nuttx_add_extra_library( ${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/lib/${CHIP_SERIES}/libphy.a ${ESP_HAL_3RDPARTY_REPO}/components/esp_coex/lib/${CHIP_SERIES}/libcoexist.a) -if(NOT CONFIG_ARCH_CHIP_ESP32H2) +if(CONFIG_ESPRESSIF_WIFI AND NOT CONFIG_ARCH_CHIP_ESP32H2) + if(NOT CONFIG_ARCH_CHIP_ESP32C2) + nuttx_add_extra_library( + ${ESP_HAL_3RDPARTY_REPO}/components/esp_wifi/lib/${CHIP_SERIES}/libmesh.a) + endif() + nuttx_add_extra_library( - ${ESP_HAL_3RDPARTY_REPO}/components/esp_wifi/lib/${CHIP_SERIES}/libmesh.a ${ESP_HAL_3RDPARTY_REPO}/components/esp_wifi/lib/${CHIP_SERIES}/libespnow.a) endif() # ############################################################################## -# ESP32-C6 / ESP32-H2 BLE host and controller sources +# ESP32-C2 / ESP32-C6 / ESP32-H2 BLE host and controller sources # ############################################################################## -if((CONFIG_ARCH_CHIP_ESP32C6 OR CONFIG_ARCH_CHIP_ESP32H2) +if((CONFIG_ARCH_CHIP_ESP32C2 OR CONFIG_ARCH_CHIP_ESP32C6 OR CONFIG_ARCH_CHIP_ESP32H2) AND CONFIG_ESPRESSIF_BLE) target_include_directories( arch @@ -91,6 +95,12 @@ if((CONFIG_ARCH_CHIP_ESP32C6 OR CONFIG_ARCH_CHIP_ESP32H2) target_compile_definitions(arch PRIVATE ESP_PLATFORM=1) + if(CONFIG_ARCH_CHIP_ESP32C2) + target_sources( + arch + PRIVATE ${ESP_HAL_3RDPARTY_REPO}/components/bt/controller/${CHIP_SERIES}/dummy.c) + endif() + if(CONFIG_ARCH_CHIP_ESP32H2) target_sources( arch @@ -109,7 +119,11 @@ if(CONFIG_ESPRESSIF_BLE) nuttx_add_extra_library( ${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/lib/${CHIP_SERIES}/libbtbb.a) - if(CONFIG_ARCH_CHIP_ESP32C3) + if(CONFIG_ARCH_CHIP_ESP32C2) + nuttx_add_extra_library( + ${ESP_HAL_3RDPARTY_REPO}/components/bt/controller/lib_esp32c2/esp32c2-bt-lib/libble_app.a + ) + elseif(CONFIG_ARCH_CHIP_ESP32C3) nuttx_add_extra_library( ${ESP_HAL_3RDPARTY_REPO}/components/bt/controller/lib_esp32c3_family/${CHIP_SERIES}/libbtdm_app.a ) @@ -233,10 +247,19 @@ if(CONFIG_ESPRESSIF_WIFI) ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/esp_hardware.c ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/esp_mem.c ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/esp_timing.c - ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/psa_driver/esp_mac/psa_crypto_driver_esp_hmac_opaque.c ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/psa_driver/esp_md/psa_crypto_driver_esp_md5.c ) + # The HMAC peripheral is not available on the ESP32-C2 + + if(NOT CONFIG_ARCH_CHIP_ESP32C2) + list( + APPEND + MBEDTLS_PORT_SRCS + ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/psa_driver/esp_mac/psa_crypto_driver_esp_hmac_opaque.c + ) + endif() + target_sources(arch PRIVATE ${MBEDTLS_SRCS} ${TF_PSA_CORE_SRCS} ${MBEDTLS_PORT_SRCS}) diff --git a/arch/risc-v/src/common/espressif/Wireless.mk b/arch/risc-v/src/common/espressif/Wireless.mk index d3c1389d31a82..74faf5b958b25 100644 --- a/arch/risc-v/src/common/espressif/Wireless.mk +++ b/arch/risc-v/src/common/espressif/Wireless.mk @@ -30,7 +30,7 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY ifeq ($(CONFIG_ARCH_CHIP_ESP32C3),y) EXTRA_LIBPATHS += -L $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bt$(DELIM)controller$(DELIM)lib_esp32c3_family$(DELIM)$(CHIP_SERIES) endif -ifneq ($(filter y,$(CONFIG_ARCH_CHIP_ESP32C6) $(CONFIG_ARCH_CHIP_ESP32H2)),) +ifneq ($(filter y,$(CONFIG_ARCH_CHIP_ESP32C2) $(CONFIG_ARCH_CHIP_ESP32C6) $(CONFIG_ARCH_CHIP_ESP32H2)),) ifeq ($(CONFIG_ESPRESSIF_BLE),y) INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bt$(DELIM)common$(DELIM)osi$(DELIM)include INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bt$(DELIM)common$(DELIM)tinycrypt$(DELIM)include @@ -63,6 +63,12 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELI CFLAGS += $(DEFINE_PREFIX)ESP_PLATFORM=1 +ifeq ($(CONFIG_ARCH_CHIP_ESP32C2),y) +EXTRA_LIBPATHS += -L $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bt$(DELIM)controller$(DELIM)lib_esp32c2$(DELIM)esp32c2-bt-lib + +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bt$(DELIM)controller$(DELIM)$(CHIP_SERIES)$(DELIM)dummy.c +endif + ifeq ($(CONFIG_ARCH_CHIP_ESP32C6),y) EXTRA_LIBPATHS += -L $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bt$(DELIM)controller$(DELIM)lib_esp32c6$(DELIM)esp32c6-bt-lib$(DELIM)esp32c6 endif @@ -83,11 +89,14 @@ EXTRA_LIBPATHS += -L $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$ EXTRA_LIBS += -lphy -lcoexist +ifeq ($(CONFIG_ESPRESSIF_WIFI),y) + ifneq ($(CONFIG_ARCH_CHIP_ESP32H2),y) -EXTRA_LIBS += -lmesh -lespnow +ifneq ($(CONFIG_ARCH_CHIP_ESP32C2),y) +EXTRA_LIBS += -lmesh +endif +EXTRA_LIBS += -lespnow endif - -ifeq ($(CONFIG_ESPRESSIF_WIFI),y) ifeq ($(CONFIG_WPA_WAPI_PSK),y) EXTRA_LIBS += -lwapi @@ -178,8 +187,10 @@ CHIP_CSRCS += esp_timing.c LDFLAGS += -u mbedtls_psa_crypto_init_include_impl +ifneq ($(CONFIG_ARCH_CHIP_ESP32C2),y) VPATH += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)port$(DELIM)psa_driver$(DELIM)esp_mac CHIP_CSRCS += psa_crypto_driver_esp_hmac_opaque.c +endif VPATH += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)port$(DELIM)psa_driver$(DELIM)esp_md CHIP_CSRCS += psa_crypto_driver_esp_md5.c diff --git a/arch/risc-v/src/common/espressif/esp_gptimer.c b/arch/risc-v/src/common/espressif/esp_gptimer.c index ce9060c9ad2c1..13296d08bdf5e 100644 --- a/arch/risc-v/src/common/espressif/esp_gptimer.c +++ b/arch/risc-v/src/common/espressif/esp_gptimer.c @@ -134,6 +134,8 @@ static struct esp_timer_lowerhalf_s g_timer0_lowerhalf = #endif }; +#if TIMG_LL_GET(INST_NUM) > 1 + /* TIMER1 lower-half */ static struct esp_timer_lowerhalf_s g_timer1_lowerhalf = @@ -144,6 +146,7 @@ static struct esp_timer_lowerhalf_s g_timer1_lowerhalf = .pm_lock = NULL, #endif }; +#endif /**************************************************************************** * Private Functions @@ -297,6 +300,7 @@ static int esp_timer_stop(struct timer_lowerhalf_s *lower) } timer_hal_context_t *hal = &(priv->hal); + timer_ll_enable_intr(hal->dev, TIMER_LL_EVENT_ALARM(hal->timer_id), false); timer_ll_enable_counter(hal->dev, hal->timer_id, false); @@ -371,6 +375,7 @@ static int esp_timer_getstatus(struct timer_lowerhalf_s *lower, volatile timg_hwtimer_reg_t *hw_timer = &(hal->dev->hw_timer[hal->timer_id]); + alarm_value = ((uint64_t)hw_timer->alarmhi.tx_alarm_hi << 32) | (hw_timer->alarmlo.tx_alarm_lo); @@ -547,8 +552,8 @@ IRAM_ATTR static int esp_timer_isr(int irq, void *context, void *arg) * * Description: * Initialize a timer device. - * Important: ESP32-C3|C6|H2 each has two timer groups. - * Each group has one timer and one watchdog timer. + * Important: ESP32-C3|C6|H2 each has two timer groups, while ESP32-C2 has + * a single one. Each group has one timer and one watchdog timer. * This initialization function is used to initialize the timer 0 of the * specified group. * @@ -582,12 +587,14 @@ int esp_timer_initialize(int group_id) lower->hal.timer_id = timer_id; } break; +#if TIMG_LL_GET(INST_NUM) > 1 case 1: { lower = &g_timer1_lowerhalf; lower->hal.timer_id = timer_id; } break; +#endif default: { return -ENODEV; diff --git a/arch/risc-v/src/common/espressif/esp_irq.c b/arch/risc-v/src/common/espressif/esp_irq.c index 991ac89e47250..151a86b9db162 100644 --- a/arch/risc-v/src/common/espressif/esp_irq.c +++ b/arch/risc-v/src/common/espressif/esp_irq.c @@ -57,7 +57,7 @@ #include "esp_private/vectors_const.h" -#ifndef CONFIG_ARCH_CHIP_ESP32C3 +#if !defined(CONFIG_ARCH_CHIP_ESP32C3) && !defined(CONFIG_ARCH_CHIP_ESP32C2) # include "soc/hp_system_reg.h" #endif diff --git a/arch/risc-v/src/common/espressif/esp_oneshot.c b/arch/risc-v/src/common/espressif/esp_oneshot.c index 8c3567c5e909e..b6bed9cbc6869 100644 --- a/arch/risc-v/src/common/espressif/esp_oneshot.c +++ b/arch/risc-v/src/common/espressif/esp_oneshot.c @@ -55,9 +55,9 @@ * Pre-processor Definitions ****************************************************************************/ -/* Oneshot Timer is assigned to the Timer 0 of TimerGroup 1 */ +/* Oneshot Timer is assigned to the Timer 0 of the last TimerGroup */ -#define GROUP_ID 1 +#define GROUP_ID (TIMG_LL_GET(INST_NUM) - 1) #define TIMER_ID 0 /* Resolution of 1 microsecond */ @@ -309,6 +309,7 @@ static void esp_oneshot_cancel(struct oneshot_lowerhalf_s *lower) else { timer_hal_context_t *hal = &(priv->hal); + timer_ll_enable_intr(hal->dev, TIMER_LL_EVENT_ALARM(hal->timer_id), false); timer_ll_enable_counter(hal->dev, hal->timer_id, false); @@ -546,6 +547,7 @@ int esp_oneshot_initialize(void) { struct oneshot_lowerhalf_s *lower = oneshot_initialize(0, ONESHOT_RESOLUTION); + if (lower == NULL) { tmrerr("Failed to initialize oneshot timer\n"); @@ -560,6 +562,7 @@ int esp_oneshot_initialize(void) #else int ret = oneshot_register("/dev/oneshot", lower); + if (ret < 0) { tmrerr("Failed to register oneshot: %d\n", ret); diff --git a/arch/risc-v/src/common/espressif/esp_pm.c b/arch/risc-v/src/common/espressif/esp_pm.c index 9b114b988de5e..faea3ce513de5 100644 --- a/arch/risc-v/src/common/espressif/esp_pm.c +++ b/arch/risc-v/src/common/espressif/esp_pm.c @@ -960,3 +960,18 @@ int esp_pmconfigure(void) return ret; } + +#ifdef CONFIG_ARCH_CHIP_ESP32C2 + +/* The ESP32-C2 HAL has no port/esp32c2/sleep_cpu.c. pm_impl.c still + * calls sleep_cpu_configure() when CONFIG_PM_ESP_SLEEP_POWER_DOWN_CPU + * is set. Light sleep does not use CPU retention on this SoC. + */ + +esp_err_t sleep_cpu_configure(bool light_sleep_enable) +{ + UNUSED(light_sleep_enable); + return ESP_OK; +} + +#endif /* CONFIG_ARCH_CHIP_ESP32C2 */ diff --git a/arch/risc-v/src/common/espressif/esp_rtc.c b/arch/risc-v/src/common/espressif/esp_rtc.c index 16c10abe401b0..fdddd98c7647e 100644 --- a/arch/risc-v/src/common/espressif/esp_rtc.c +++ b/arch/risc-v/src/common/espressif/esp_rtc.c @@ -164,9 +164,15 @@ static bool g_hr_timer_enabled = false; #endif /* CONFIG_RTC_DRIVER */ -/* Saved data for persistent RTC time */ +/* Saved data for persistent RTC time. Chips without RTC retention memory + * keep it in DRAM, so the saved time does not survive deep sleep. + */ +#ifdef SOC_RTC_MEM_SUPPORTED static RTC_DATA_ATTR struct esp_rtc_backup_s g_rtc_saved_data; +#else +static struct esp_rtc_backup_s g_rtc_saved_data; +#endif static struct esp_rtc_backup_s *g_rtc_save; /**************************************************************************** @@ -326,6 +332,7 @@ static int esp_rtc_rdtime(struct rtc_lowerhalf_s *lower, if (gmtime_r(&timer, (struct tm *)rtctime) == 0) { int errcode = get_errno(); + DEBUGASSERT(errcode > 0); rtcerr("gmtime_r failed: %d\n", errcode); @@ -949,6 +956,7 @@ int esp_rtc_driverinit(void) struct rtc_lowerhalf_s *lower = (struct rtc_lowerhalf_s *)&g_rtc_lowerhalf; int ret = rtc_initialize(0, lower); + if (ret < 0) { return ret; diff --git a/arch/risc-v/src/common/espressif/esp_spi.c b/arch/risc-v/src/common/espressif/esp_spi.c index 1a80e473de1a4..d74a6e279327c 100644 --- a/arch/risc-v/src/common/espressif/esp_spi.c +++ b/arch/risc-v/src/common/espressif/esp_spi.c @@ -93,7 +93,12 @@ # define MISO_PIN_ATTR (INPUT_FUNCTION_2 | PULLUP) #endif -#if defined(CONFIG_ARCH_CHIP_ESP32C3) +#if defined(CONFIG_ARCH_CHIP_ESP32C2) +#define SPI2_IOMUX_MISOPIN 2 +#define SPI2_IOMUX_MOSIPIN 7 +#define SPI2_IOMUX_CLKPIN 6 +#define SPI2_IOMUX_CSPIN 10 +#elif defined(CONFIG_ARCH_CHIP_ESP32C3) #define SPI2_IOMUX_MISOPIN 2 #define SPI2_IOMUX_MOSIPIN 7 #define SPI2_IOMUX_CLKPIN 6 @@ -1068,6 +1073,7 @@ static void esp_spi_dma_exchange(struct esp_spi_priv_s *priv, #if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE esp_err_t ret = esp_cache_msync((void *)txbuffer_temp, tx_byte_len, ESP_CACHE_MSYNC_FLAG_DIR_C2M); + assert(ret == ESP_OK); #endif diff --git a/arch/risc-v/src/esp32c2/.gitignore b/arch/risc-v/src/esp32c2/.gitignore new file mode 100644 index 0000000000000..d40b86f3a0dce --- /dev/null +++ b/arch/risc-v/src/esp32c2/.gitignore @@ -0,0 +1,4 @@ +/bootloader +/esp-nuttx-bootloader +/*.zip +/esp-hal-3rdparty diff --git a/arch/risc-v/src/esp32c2/CMakeLists.txt b/arch/risc-v/src/esp32c2/CMakeLists.txt new file mode 100644 index 0000000000000..aa50654a1df54 --- /dev/null +++ b/arch/risc-v/src/esp32c2/CMakeLists.txt @@ -0,0 +1,41 @@ +# ############################################################################## +# arch/risc-v/src/esp32c2/CMakeLists.txt +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more contributor +# license agreements. See the NOTICE file distributed with this work for +# additional information regarding copyright ownership. The ASF licenses this +# file to you under the Apache License, Version 2.0 (the "License"); you may not +# use this file except in compliance with the License. You may obtain a copy of +# the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations under +# the License. +# +# ############################################################################## + +add_subdirectory(${CMAKE_CURRENT_SOURCE_DIR}/../common/espressif espressif) + +set(SRCS esp_chip_rev.c) + +if(CONFIG_ESPRESSIF_WIFI) + list(APPEND SRCS esp_coex_adapter.c esp_wifi_adapter.c) + target_compile_definitions(arch PRIVATE ESP_PLATFORM) +endif() + +if(CONFIG_ESPRESSIF_BLE) + list(APPEND SRCS esp_ble.c) + target_compile_definitions(arch PRIVATE ESP_PLATFORM) +endif() + +target_compile_definitions(arch PRIVATE _RETARGETABLE_LOCKING) + +if(SRCS) + target_sources(arch PRIVATE ${SRCS}) +endif() diff --git a/arch/risc-v/src/esp32c2/Kconfig b/arch/risc-v/src/esp32c2/Kconfig new file mode 100644 index 0000000000000..482098862d42b --- /dev/null +++ b/arch/risc-v/src/esp32c2/Kconfig @@ -0,0 +1,10 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_CHIP_ESP32C2 + +source "arch/risc-v/src/common/espressif/Kconfig" + +endif # ARCH_CHIP_ESP32C2 diff --git a/arch/risc-v/src/esp32c2/Make.defs b/arch/risc-v/src/esp32c2/Make.defs new file mode 100644 index 0000000000000..aba8f2f587c1a --- /dev/null +++ b/arch/risc-v/src/esp32c2/Make.defs @@ -0,0 +1,38 @@ +############################################################################ +# arch/risc-v/src/esp32c2/Make.defs +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################ + +include common/Make.defs +include common/espressif/Make.defs + +CHIP_CSRCS += esp_chip_rev.c + +ifeq ($(CONFIG_ESPRESSIF_WIFI),y) +CHIP_CSRCS += esp_coex_adapter.c esp_wifi_adapter.c +EXTRA_LIBS += -lcore -lnet80211 -lpp +endif + +ifeq ($(CONFIG_ESPRESSIF_BLE),y) +CHIP_CSRCS += esp_ble.c +EXTRA_LIBS += -lbtbb -lble_app +endif + +CFLAGS += ${DEFINE_PREFIX}_RETARGETABLE_LOCKING diff --git a/arch/risc-v/src/esp32c2/esp_ble.c b/arch/risc-v/src/esp32c2/esp_ble.c new file mode 100644 index 0000000000000..e03dad6248a9d --- /dev/null +++ b/arch/risc-v/src/esp32c2/esp_ble.c @@ -0,0 +1,333 @@ +/**************************************************************************** + * arch/risc-v/src/esp32c2/esp_ble.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#if defined(CONFIG_UART_BTH4) +# include +#endif + +#include "esp_bt.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* BLE packet buffer max size */ + +#define BLE_BUF_SIZE 1024 + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct esp_ble_priv_s +{ + struct bt_driver_s drv; /* NuttX BT/BLE driver data */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static int esp_ble_open(struct bt_driver_s *drv); +static int esp_ble_send(struct bt_driver_s *drv, + enum bt_buf_type_e type, + void *data, size_t len); +static void esp_ble_close(struct bt_driver_s *drv); +static void esp_ble_send_ready(void); +static int esp_ble_recv_cb(uint8_t *data, uint16_t len); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static struct esp_ble_priv_s g_ble_priv = +{ + .drv = + { + .head_reserve = H4_HEADER_SIZE, + .open = esp_ble_open, + .send = esp_ble_send, + .close = esp_ble_close + } +}; + +static esp_vhci_host_callback_t vhci_host_cb = +{ + .notify_host_send_available = esp_ble_send_ready, + .notify_host_recv = esp_ble_recv_cb +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp_ble_send_ready + * + * Description: + * If the controller could send HCI command will callback this function. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void esp_ble_send_ready(void) +{ +} + +/**************************************************************************** + * Name: esp_ble_recv_cb + * + * Description: + * BLE receive callback function when BLE hardware receive packet + * + * Input Parameters: + * data - BLE packet data pointer + * len - BLE packet length + * + * Returned Value: + * 0 on success or a negated value on failure. + * + ****************************************************************************/ + +static int esp_ble_recv_cb(uint8_t *data, uint16_t len) +{ + int ret; + bool valid; + enum bt_buf_type_e type; + struct esp_ble_priv_s *priv = &g_ble_priv; + + switch (data[0]) + { + case H4_EVT: + type = BT_EVT; + valid = true; + break; + case H4_ACL: + type = BT_ACL_IN; + valid = true; + break; + case H4_ISO: + type = BT_ISO_IN; + valid = true; + break; + default: + valid = false; + break; + } + + if (!valid) + { + ret = ERROR; + } + else + { + /* send packet to host */ + + ret = bt_netdev_receive(&priv->drv, type, + &data[H4_HEADER_SIZE], + len - H4_HEADER_SIZE); + if (ret < 0) + { + wlerr("Failed to receive ret=%d\n", ret); + } + } + + return ret; +} + +/**************************************************************************** + * Name: esp_ble_send + * + * Description: + * ESP32-C2 BLE send callback function for BT driver. + * + * Input Parameters: + * drv - BT driver pointer + * type - BT packet type + * data - BT packet data buffer pointer + * len - BT packet length + * + * Returned Value: + * Sent bytes on success or a negated value on failure. + * + ****************************************************************************/ + +static int esp_ble_send(struct bt_driver_s *drv, + enum bt_buf_type_e type, + void *data, size_t len) +{ + uint8_t *hdr = (uint8_t *)data - drv->head_reserve; + + if ((len + H4_HEADER_SIZE) > BLE_BUF_SIZE) + { + return -EINVAL; + } + + if (type == BT_CMD) + { + *hdr = H4_CMD; + } + else if (type == BT_ACL_OUT) + { + *hdr = H4_ACL; + } + else if (type == BT_ISO_OUT) + { + *hdr = H4_ISO; + } + else + { + return -EINVAL; + } + + if (esp_vhci_host_check_send_available()) + { + esp_vhci_host_send_packet(hdr, len + drv->head_reserve); + } + + return len; +} + +/**************************************************************************** + * Name: esp_ble_close + * + * Description: + * ESP32-C2 BLE close callback function for BT driver. + * + * Input Parameters: + * drv - BT driver pointer + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void esp_ble_close(struct bt_driver_s *drv) +{ +} + +/**************************************************************************** + * Name: esp_ble_open + * + * Description: + * ESP32-C2 BLE open callback function for BT driver. + * + * Input Parameters: + * drv - BT driver pointer + * + * Returned Value: + * OK on success or a negated value on failure. + * + ****************************************************************************/ + +static int esp_ble_open(struct bt_driver_s *drv) +{ + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp_ble_initialize + * + * Description: + * Init BT controller + * + * Input Parameters: + * None + * + * Returned Value: + * success or fail + * + ****************************************************************************/ + +int esp_ble_initialize(void) +{ + int ret; + esp_bt_controller_config_t cfg = BT_CONTROLLER_INIT_CONFIG_DEFAULT(); + + cfg.controller_task_stack_size = CONFIG_ESPRESSIF_BLE_TASK_STACK_SIZE; + cfg.controller_task_prio = CONFIG_ESPRESSIF_BLE_TASK_PRIORITY; + cfg.controller_run_cpu = CONFIG_BT_CTRL_PINNED_TO_CORE; + + if (esp_bt_controller_init(&cfg) != ESP_OK) + { + wlerr("Failed to initialize BLE\n"); + return ERROR; + } + + if (esp_bt_controller_enable(ESP_BT_MODE_BLE) != ESP_OK) + { + wlerr("Failed to Enable BLE\n"); + return ERROR; + } + + ret = esp_vhci_host_register_callback(&vhci_host_cb); + if (ret != ESP_OK) + { + esp_bt_controller_disable(); + wlerr("Failed to register BLE callback ret=%d\n", ret); + return ERROR; + } + +#if defined(CONFIG_UART_BTH4) + ret = uart_bth4_register(CONFIG_ESPRESSIF_BLE_TTY_NAME, &g_ble_priv.drv); +#else + ret = bt_netdev_register(&g_ble_priv.drv); +#endif + if (ret < 0) + { + wlerr("bt_netdev_register error: %d\n", ret); + return ret; + } + + return OK; +} diff --git a/arch/risc-v/src/esp32c2/esp_ble.h b/arch/risc-v/src/esp32c2/esp_ble.h new file mode 100644 index 0000000000000..dcf256a77d4b6 --- /dev/null +++ b/arch/risc-v/src/esp32c2/esp_ble.h @@ -0,0 +1,52 @@ +/**************************************************************************** + * arch/risc-v/src/esp32c2/esp_ble.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_RISCV_SRC_ESP32C2_ESP_BLE_H +#define __ARCH_RISCV_SRC_ESP32C2_ESP_BLE_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: esp_ble_initialize + * + * Description: + * Init BT controller + * + * Input Parameters: + * None + * + * Returned Value: + * success or fail + * + ****************************************************************************/ + +int esp_ble_initialize(void); + +#endif /* __ARCH_RISCV_SRC_ESP32C2_ESP_BLE_H */ diff --git a/arch/risc-v/src/esp32c2/esp_chip_rev.c b/arch/risc-v/src/esp32c2/esp_chip_rev.c new file mode 100644 index 0000000000000..2730b63d29bc9 --- /dev/null +++ b/arch/risc-v/src/esp32c2/esp_chip_rev.c @@ -0,0 +1,50 @@ +/**************************************************************************** + * arch/risc-v/src/esp32c2/esp_chip_rev.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp_chip_revision_check + * + * Description: + * Checks if the current chip revision is greater than the minimum + * revision supported by NuttX. If the chip revision is not supported, an + * error or warning message is printed, and the system may halt unless + * the configuration allows ignoring the chip revision check. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +void esp_chip_revision_check(void) +{ +} diff --git a/arch/risc-v/src/esp32c2/esp_coex_adapter.c b/arch/risc-v/src/esp32c2/esp_coex_adapter.c new file mode 100644 index 0000000000000..f9e3d7a87955d --- /dev/null +++ b/arch/risc-v/src/esp32c2/esp_coex_adapter.c @@ -0,0 +1,592 @@ +/**************************************************************************** + * arch/risc-v/src/esp32c2/esp_coex_adapter.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "esp_hr_timer.h" + +#include "esp_attr.h" +#include "esp_timer.h" +#include "soc/rtc.h" +#include "esp_private/esp_clk.h" +#include "private/esp_coexist_adapter.h" +#include "rom/ets_sys.h" +#include "soc/soc_caps.h" +#include "soc/system_reg.h" +#include "private/esp_modem_wrapper.h" + +#include "espressif/esp_wifi_utils.h" + +#include "esp_coex_adapter.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define OSI_FUNCS_TIME_BLOCKING 0xffffffff + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static IRAM_ATTR int64_t esp_coex_esp_timer_get_time_wrapper(void); +static int32_t esp_coex_semphr_take_from_isr_wrapper(void *semphr, + void *hptw); +static int32_t esp_coex_semphr_give_from_isr_wrapper(void *semphr, + void *hptw); +static int esp_coex_is_in_isr_wrapper(void); + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +coex_adapter_funcs_t g_coex_adapter_funcs = +{ + ._version = COEX_ADAPTER_VERSION, + ._task_yield_from_isr = esp_coex_common_task_yield_from_isr_wrapper, + ._semphr_create = esp_coex_common_semphr_create_wrapper, + ._semphr_delete = esp_coex_common_semphr_delete_wrapper, + ._semphr_take_from_isr = esp_coex_semphr_take_from_isr_wrapper, + ._semphr_give_from_isr = esp_coex_semphr_give_from_isr_wrapper, + ._semphr_take = esp_coex_common_semphr_take_wrapper, + ._semphr_give = esp_coex_common_semphr_give_wrapper, + ._is_in_isr = esp_coex_is_in_isr_wrapper, + ._malloc_internal = esp_coex_common_malloc_internal_wrapper, + ._free = free, + ._esp_timer_get_time = esp_coex_esp_timer_get_time_wrapper, + ._timer_disarm = esp_coex_common_timer_disarm_wrapper, + ._timer_done = esp_coex_common_timer_done_wrapper, + ._timer_setfn = esp_coex_common_timer_setfn_wrapper, + ._timer_arm_us = esp_coex_common_timer_arm_us_wrapper, + ._magic = COEX_ADAPTER_MAGIC, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp_coex_esp_timer_get_time_wrapper + * + * Description: + * This function retrieves the current time of the High Resolution Timer + * in microseconds. It is a wrapper around the esp_hr_timer_time_us + * function, providing a consistent interface for the coexistence module. + * + * Input Parameters: + * None. + * + * Returned Value: + * The current time of the High Resolution Timer in microseconds, as a + * 64-bit integer. + * + ****************************************************************************/ + +static IRAM_ATTR int64_t esp_coex_esp_timer_get_time_wrapper(void) +{ + return esp_hr_timer_time_us(); +} + +/**************************************************************************** + * Name: esp_coex_semphr_take_from_isr_wrapper + * + * Description: + * Take a semaphore from an ISR + * + * Input Parameters: + * semphr - Semaphore data pointer. + * hptw - Unused. + * + * Returned Value: + * True if success or false if fail + * + ****************************************************************************/ + +static int32_t IRAM_ATTR esp_coex_semphr_take_from_isr_wrapper(void *semphr, + void *hptw) +{ + *(int *)hptw = 0; + + return nuttx_err_to_common_err(nxsem_trywait(semphr)); +} + +/**************************************************************************** + * Name: esp_coex_semphr_give_from_isr_wrapper + * + * Description: + * Post semaphore + * + * Input Parameters: + * semphr - Semaphore data pointer + * hptw - Unused. + * + * Returned Value: + * True if success or false if fail + * + ****************************************************************************/ + +static int32_t IRAM_ATTR esp_coex_semphr_give_from_isr_wrapper(void *semphr, + void *hptw) +{ + *(int *)hptw = 0; + + return esp_coex_common_semphr_give_wrapper(semphr); +} + +/**************************************************************************** + * Name: esp_coex_is_in_isr_wrapper + * + * Description: + * This function checks if the current context is an interrupt service + * routine (ISR). It is a wrapper around the NuttX up_interrupt_context + * function. + * + * Input Parameters: + * None + * + * Returned Value: + * Returns 1 if the current context is an ISR, 0 otherwise. + * + ****************************************************************************/ + +static int IRAM_ATTR esp_coex_is_in_isr_wrapper(void) +{ + return (int)up_interrupt_context(); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp_coex_common_env_is_chip_wrapper + * + * Description: + * This function checks if the environment is a chip or FPGA. + * + * Input Parameters: + * None + * + * Returned Value: + * Returns true if the environment is a chip, false if it's an FPGA. + * + ****************************************************************************/ + +bool IRAM_ATTR esp_coex_common_env_is_chip_wrapper(void) +{ +#ifdef CONFIG_IDF_ENV_FPGA + return false; +#else + return true; +#endif +} + +/**************************************************************************** + * Name: esp_coex_common_spin_lock_create_wrapper + * + * Description: + * Create spin lock in SMP mode + * + * Input Parameters: + * None + * + * Returned Value: + * Spin lock data pointer + * + ****************************************************************************/ + +void *esp_coex_common_spin_lock_create_wrapper(void) +{ + spinlock_t *lock; + int tmp; + + tmp = sizeof(*lock); + lock = kmm_malloc(tmp); + if (!lock) + { + wlerr("Failed to alloc %d memory\n", tmp); + DEBUGPANIC(); + } + + spin_lock_init(lock); + + return lock; +} + +/**************************************************************************** + * Name: esp_coex_common_int_disable_wrapper + * + * Description: + * Enter critical section by disabling interrupts and taking the spin lock + * if in SMP mode. + * + * Input Parameters: + * wifi_int_mux - Spin lock data pointer + * + * Returned Value: + * CPU PS value. + * + ****************************************************************************/ + +uint32_t IRAM_ATTR esp_coex_common_int_disable_wrapper(void *wifi_int_mux) +{ + irqstate_t flags; + + flags = spin_lock_irqsave((spinlock_t *)wifi_int_mux); + + return (uint32_t)flags; +} + +/**************************************************************************** + * Name: esp_coex_common_int_restore_wrapper + * + * Description: + * Exit from critical section by enabling interrupts and releasing the spin + * lock if in SMP mode. + * + * Input Parameters: + * wifi_int_mux - Spin lock data pointer + * tmp - CPU PS value. + * + * Returned Value: + * None + * + ****************************************************************************/ + +void IRAM_ATTR esp_coex_common_int_restore_wrapper(void *wifi_int_mux, + uint32_t tmp) +{ + irqstate_t flags = (irqstate_t)tmp; + + spin_unlock_irqrestore((spinlock_t *)wifi_int_mux, flags); +} + +/**************************************************************************** + * Name: esp_task_yield_from_isr + * + * Description: + * Perform a solicited context switch on FreeRTOS. Do nothing in NuttX. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +void IRAM_ATTR esp_coex_common_task_yield_from_isr_wrapper(void) +{ +} + +/**************************************************************************** + * Name: esp_coex_common_semphr_create_wrapper + * + * Description: + * Create and initialize semaphore + * + * Input Parameters: + * max - No meaning for NuttX + * init - semaphore initialization value + * + * Returned Value: + * Semaphore data pointer + * + ****************************************************************************/ + +void *esp_coex_common_semphr_create_wrapper(uint32_t max, uint32_t init) +{ + int ret; + sem_t *sem; + int tmp; + + tmp = sizeof(sem_t); + sem = kmm_malloc(tmp); + if (!sem) + { + wlerr("Failed to alloc %d memory\n", tmp); + return NULL; + } + + ret = nxsem_init(sem, 0, init); + if (ret) + { + wlerr("Failed to initialize sem error=%d\n", ret); + kmm_free(sem); + return NULL; + } + + return sem; +} + +/**************************************************************************** + * Name: esp_coex_common_semphr_delete_wrapper + * + * Description: + * Delete semaphore + * + * Input Parameters: + * semphr - Semaphore data pointer + * + * Returned Value: + * None + * + ****************************************************************************/ + +void esp_coex_common_semphr_delete_wrapper(void *semphr) +{ + sem_t *sem = (sem_t *)semphr; + + nxsem_destroy(sem); + kmm_free(sem); +} + +/**************************************************************************** + * Name: esp_coex_common_semphr_take_wrapper + * + * Description: + * This function attempts to take (wait for) a semaphore within a certain + * period of time. It is a wrapper around the NuttX nxsem_wait and + * nxsem_tickwait functions, providing error handling and translation + * between NuttX and ESP-IDF error codes. + * + * Input Parameters: + * semphr - Pointer to the semaphore data structure. + * block_time_tick - The maximum number of system ticks to wait. + * + * Returned Value: + * Returns 0 if the semaphore was successfully taken, or a negative error + * code if the operation failed or the timeout expired. + * + ****************************************************************************/ + +int32_t esp_coex_common_semphr_take_wrapper(void *semphr, + uint32_t block_time_tick) +{ + int ret; + sem_t *sem = (sem_t *)semphr; + + if (block_time_tick == OSI_FUNCS_TIME_BLOCKING) + { + ret = nxsem_wait(sem); + } + else + { + if (block_time_tick > 0) + { + ret = nxsem_tickwait(sem, block_time_tick); + } + else + { + ret = nxsem_trywait(sem); + } + } + + if (ret) + { + wlerr("ERROR: Failed to wait sem in %lu ticks. Error=%d\n", + block_time_tick, ret); + } + + return nuttx_err_to_common_err(ret); +} + +/**************************************************************************** + * Name: esp_coex_common_semphr_give_wrapper + * + * Description: + * This function posts (releases) a semaphore. It is a wrapper around the + * NuttX nxsem_post function, providing error handling and translation + * between NuttX and ESP-IDF error codes. + * + * Input Parameters: + * semphr - Pointer to the semaphore data structure. + * + * Returned Value: + * Returns 0 if the semaphore was successfully posted, or a negative error + * code if the operation failed. + * + ****************************************************************************/ + +int32_t esp_coex_common_semphr_give_wrapper(void *semphr) +{ + int ret; + sem_t *sem = (sem_t *)semphr; + + ret = nxsem_post(sem); + if (ret) + { + wlerr("Failed to post sem error=%d\n", ret); + } + + return nuttx_err_to_common_err(ret); +} + +/**************************************************************************** + * Name: esp_coex_common_timer_disarm_wrapper + * + * Description: + * Disable timer + * + * Input Parameters: + * timer - timer data pointer + * + * Returned Value: + * None + * + ****************************************************************************/ + +void IRAM_ATTR esp_coex_common_timer_disarm_wrapper(void *timer) +{ + ets_timer_disarm(timer); +} + +/**************************************************************************** + * Name: esp_coex_common_timer_done_wrapper + * + * Description: + * Disable and free timer + * + * Input Parameters: + * ptimer - timer data pointer + * + * Returned Value: + * None + * + ****************************************************************************/ + +void esp_coex_common_timer_done_wrapper(void *ptimer) +{ + ets_timer_done(ptimer); +} + +/**************************************************************************** + * Name: esp_coex_common_timer_setfn_wrapper + * + * Description: + * Set timer callback function and private data + * + * Input Parameters: + * ptimer - Timer data pointer + * pfunction - Callback function + * parg - Callback function private data + * + * Returned Value: + * None + * + ****************************************************************************/ + +void esp_coex_common_timer_setfn_wrapper(void *ptimer, + void *pfunction, + void *parg) +{ + ets_timer_setfn(ptimer, pfunction, parg); +} + +/**************************************************************************** + * Name: esp_coex_common_timer_arm_us_wrapper + * + * Description: + * Set timer timeout period and repeat flag + * + * Input Parameters: + * ptimer - timer data pointer + * us - micro seconds + * repeat - true: run cycle, false: run once + * + * Returned Value: + * None + * + ****************************************************************************/ + +void IRAM_ATTR esp_coex_common_timer_arm_us_wrapper(void *ptimer, + uint32_t us, + bool repeat) +{ + ets_timer_arm_us(ptimer, us, repeat); +} + +/**************************************************************************** + * Name: esp_coex_common_malloc_internal_wrapper + * + * Description: + * Drivers allocate a block of memory + * + * Input Parameters: + * size - memory size + * + * Returned Value: + * Memory pointer + * + ****************************************************************************/ + +IRAM_ATTR void *esp_coex_common_malloc_internal_wrapper(size_t size) +{ + return kmm_malloc(size); +} + +/**************************************************************************** + * Name: esp_coex_common_clk_slowclk_cal_get_wrapper + * + * Description: + * Get the calibration value of RTC slow clock + * + * Input Parameters: + * None + * + * Returned Value: + * The calibration value obtained using rtc_clk_cal + * + ****************************************************************************/ + +uint32_t esp_coex_common_clk_slowclk_cal_get_wrapper(void) +{ + /* The bit width of WiFi light sleep clock calibration is 12 while the one + * of system is 19. It should shift 19 - 12 = 7. + */ + + if (GET_PERI_REG_MASK(SYSTEM_BT_LPCK_DIV_FRAC_REG, SYSTEM_LPCLK_SEL_XTAL)) + { + uint64_t time_per_us = 1000000ULL; + return (((time_per_us << RTC_CLK_CAL_FRACT) / (MHZ)) >> + (RTC_CLK_CAL_FRACT - SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH)); + } + else + { + return (esp_clk_slowclk_cal_get() >> + (RTC_CLK_CAL_FRACT - SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH)); + } +} diff --git a/arch/risc-v/src/esp32c2/esp_coex_adapter.h b/arch/risc-v/src/esp32c2/esp_coex_adapter.h new file mode 100644 index 0000000000000..2fc38b4c33912 --- /dev/null +++ b/arch/risc-v/src/esp32c2/esp_coex_adapter.h @@ -0,0 +1,82 @@ +/**************************************************************************** + * arch/risc-v/src/esp32c2/esp_coex_adapter.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_RISCV_SRC_ESP32C2_ESP_COEX_ADAPTER_H +#define __ARCH_RISCV_SRC_ESP32C2_ESP_COEX_ADAPTER_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include "esp_attr.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +bool IRAM_ATTR esp_coex_common_env_is_chip_wrapper(void); +void *esp_coex_common_spin_lock_create_wrapper(void); +uint32_t IRAM_ATTR esp_coex_common_int_disable_wrapper(void *wifi_int_mux); +void IRAM_ATTR esp_coex_common_int_restore_wrapper(void *wifi_int_mux, + uint32_t tmp); +void IRAM_ATTR esp_coex_common_task_yield_from_isr_wrapper(void); +void *esp_coex_common_semphr_create_wrapper(uint32_t max, uint32_t init); +void esp_coex_common_semphr_delete_wrapper(void *semphr); +int32_t esp_coex_common_semphr_take_wrapper(void *semphr, + uint32_t block_time_tick); +int32_t esp_coex_common_semphr_give_wrapper(void *semphr); +void IRAM_ATTR esp_coex_common_timer_disarm_wrapper(void *timer); +void esp_coex_common_timer_done_wrapper(void *ptimer); +void esp_coex_common_timer_setfn_wrapper(void *ptimer, + void *pfunction, + void *parg); +void IRAM_ATTR esp_coex_common_timer_arm_us_wrapper(void *ptimer, + uint32_t us, + bool repeat); +IRAM_ATTR void *esp_coex_common_malloc_internal_wrapper(size_t size); +uint32_t esp_coex_common_clk_slowclk_cal_get_wrapper(void); + +#ifdef __cplusplus +} +#endif +#undef EXTERN + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_RISCV_SRC_ESP32C2_ESP_COEX_ADAPTER_H */ diff --git a/arch/risc-v/src/esp32c2/esp_wifi_adapter.c b/arch/risc-v/src/esp32c2/esp_wifi_adapter.c new file mode 100644 index 0000000000000..df9c830286483 --- /dev/null +++ b/arch/risc-v/src/esp32c2/esp_wifi_adapter.c @@ -0,0 +1,2991 @@ +/**************************************************************************** + * arch/risc-v/src/esp32c2/esp_wifi_adapter.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "esp_irq.h" +#include "esp_hr_timer.h" + +#include "esp_log.h" +#include "esp_intr_alloc.h" +#include "esp_mac.h" +#include "esp_random.h" +#include "esp_private/wifi_os_adapter.h" +#include "esp_phy_init.h" +#include "esp_private/periph_ctrl.h" +#include "os.h" +#include "platform/os.h" +#include "private/esp_coexist_internal.h" +#include "rom/ets_sys.h" +#include "riscv/interrupt.h" + +#include "espressif/esp_wifi_utils.h" +#include "esp_coex_adapter.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define ets_timer _ETSTIMER_ + +#define ESP_MAX_PRIORITIES (25) + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +typedef struct shared_vector_desc_t shared_vector_desc_t; +typedef struct vector_desc_t vector_desc_t; + +typedef struct intr_handle_data_t +{ + vector_desc_t *vector_desc; + shared_vector_desc_t *shared_vector_desc; +} intr_handle_data_t; + +struct vector_desc_t +{ + int flags: 16; + unsigned int cpu: 1; + unsigned int intno: 5; + int source: 16; + shared_vector_desc_t *shared_vec_info; + vector_desc_t *next; +}; + +/* From esp_hw_support/intr_alloc.c: returns a pointer to a HAL-owned + * vector descriptor for some intno and cpu. + */ + +extern vector_desc_t *get_desc_for_int(int intno, int cpu); + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* Private functions order is defined as: + * - A first block containing the functions in the same order as of the + * ESP-IDF' corresponding `esp_adapter.c` to ease comparison; + * - A second block of auxiliary functions block ordered by ascending; + */ + +/* First block of functions */ + +static void *wifi_zalloc_wrapper(size_t size); +static void *wifi_create_queue(int queue_len, int item_size); +static void wifi_delete_queue(wifi_static_queue_t *queue); +static void *wifi_create_queue_wrapper(int queue_len, int item_size); +static void wifi_delete_queue_wrapper(void *queue); +static void set_intr_wrapper(int32_t cpu_no, uint32_t intr_source, + uint32_t intr_num, int32_t intr_prio); +static void clear_intr_wrapper(uint32_t intr_source, uint32_t intr_num); +static void set_isr_wrapper(int32_t n, void *f, void *arg); +static void enable_intr_wrapper(uint32_t intr_mask); +static void disable_intr_wrapper(uint32_t intr_mask); +static bool is_from_isr_wrapper(void); +static void wifi_thread_semphr_free(void *data); +static void *wifi_thread_semphr_get_wrapper(void); +static void *recursive_mutex_create_wrapper(void); +static void *mutex_create_wrapper(void); +static void mutex_delete_wrapper(void *mutex); +static int32_t mutex_lock_wrapper(void *mutex); +static int32_t mutex_unlock_wrapper(void *mutex); +static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size); +static int32_t queue_send_wrapper(void *queue, + void *item, + uint32_t block_time_tick); +static int32_t queue_send_from_isr_wrapper(void *queue, + void *item, + void *hptw); +static int32_t queue_send_to_back_wrapper(void *queue, + void *item, + uint32_t block_time_tick); +static int32_t queue_send_to_front_wrapper(void *queue, + void *item, + uint32_t block_time_tick); +static int32_t queue_recv_wrapper(void *queue, + void *item, + uint32_t block_time_tick); +static uint32_t event_group_wait_bits_wrapper(void *event, + uint32_t bits_to_wait_for, + int clear_on_exit, + int wait_for_all_bits, + uint32_t block_time_tick); +static int32_t task_create_pinned_to_core_wrapper(void *task_func, + const char *name, + uint32_t stack_depth, + void *param, + uint32_t prio, + void *task_handle, + uint32_t core_id); +static int32_t task_create_wrapper(void *task_func, + const char *name, + uint32_t stack_depth, + void *param, + uint32_t prio, + void *task_handle); +static int32_t task_ms_to_tick_wrapper(uint32_t ms); +static int32_t task_get_max_priority_wrapper(void); +int32_t esp_event_post_wrapper(const char *event_base, + int32_t event_id, + void *event_data, + size_t event_data_size, + uint32_t ticks); +static void wifi_apb80m_request_wrapper(void); +static void wifi_apb80m_release_wrapper(void); +static void esp_phy_enable_wrapper(void); +static void esp_phy_disable_wrapper(void); +static void timer_arm_wrapper(void *timer, uint32_t tmout, bool repeat); +static void wifi_reset_mac_wrapper(void); +static void wifi_rtc_enable_iso_wrapper(void); +static void IRAM_ATTR wifi_rtc_disable_iso_wrapper(void); +static void wifi_clock_enable_wrapper(void); +static void wifi_clock_disable_wrapper(void); +static int get_time_wrapper(void *t); +static void *realloc_internal_wrapper(void *ptr, size_t size); +static void *calloc_internal_wrapper(size_t n, size_t size); +static void *zalloc_internal_wrapper(size_t size); +static int nvs_open_wrapper(const char *name, unsigned int open_mode, + uint32_t *out_handle); +static void esp_log_writev_wrapper(unsigned int level, + const char *tag, + const char *format, + va_list args); +static void esp_log_write_wrapper(unsigned int level, + const char *tag, + const char *format, ...); +static int esp_read_mac_wrapper(uint8_t *mac, unsigned int type); +static int coex_init_wrapper(void); +static void coex_deinit_wrapper(void); +static int coex_enable_wrapper(void); +static void coex_disable_wrapper(void); +static uint32_t coex_status_get_wrapper(void); +static int coex_wifi_request_wrapper(uint32_t event, + uint32_t latency, + uint32_t duration); +static int coex_wifi_release_wrapper(uint32_t event); +static int coex_wifi_channel_set_wrapper(uint8_t primary, + uint8_t secondary); +static int coex_event_duration_get_wrapper(uint32_t event, + uint32_t *duration); +static int coex_pti_get_wrapper(uint32_t event, uint8_t *pti); +static void coex_schm_status_bit_clear_wrapper(uint32_t type, + uint32_t status); +static void coex_schm_status_bit_set_wrapper(uint32_t type, + uint32_t status); +static int coex_schm_interval_set_wrapper(uint32_t interval); +static uint32_t coex_schm_interval_get_wrapper(void); +static uint8_t coex_schm_curr_period_get_wrapper(void); +static void *coex_schm_curr_phase_get_wrapper(void); +static int coex_register_start_cb_wrapper(int (* cb)(void)); +static int coex_schm_process_restart_wrapper(void); +static int coex_schm_register_cb_wrapper(int type, int(*cb)(int)); +static int coex_schm_flexible_period_set_wrapper(uint8_t period); +static uint8_t coex_schm_flexible_period_get_wrapper(void); +static void esp_empty_wrapper(void); + +/* Second block of functions + * These functions are auxiliary functions that are used by the first block + * of functions or software adapters for the Wi-Fi driver + */ + +static uint32_t esp_get_free_heap_size(void); +static void *event_group_create_wrapper(void); +static void event_group_delete_wrapper(void *event); +static uint32_t event_group_set_bits_wrapper(void *event, uint32_t bits); +static uint32_t event_group_clear_bits_wrapper(void *event, uint32_t bits); +static int esp_nvs_commit(uint32_t handle); +static int esp_nvs_erase_key(uint32_t handle, const char *key); +static int esp_nvs_get_blob(uint32_t handle, + const char *key, + void *out_value, + size_t *length); +static int esp_nvs_set_blob(uint32_t handle, + const char *key, + const void *value, + size_t length); +static int esp_nvs_get_i8(uint32_t handle, + const char *key, + int8_t *out_value); +static int esp_nvs_set_i8(uint32_t handle, const char *key, int8_t value); +static int esp_nvs_get_u8(uint32_t handle, + const char *key, + uint8_t *out_value); +static int esp_nvs_set_u8(uint32_t handle, const char *key, uint8_t value); +static int esp_nvs_get_u16(uint32_t handle, + const char *key, + uint16_t *out_value); +static int esp_nvs_set_u16(uint32_t handle, const char *key, uint16_t value); +static void esp_nvs_close(uint32_t handle); +static void esp_update_time(struct timespec *timespec, uint32_t ticks); +static uint32_t queue_msg_waiting_wrapper(void *queue); +static void task_delay_wrapper(uint32_t tick); +static void task_delete_wrapper(void *task_handle); +static void *task_get_current_task_wrapper(void); +static void vqueue_delete_adapter(void *queue); +static void vsemaphore_delete_adapter(void *semphr); +static void *xqueue_create_adapter(uint32_t queue_len, uint32_t item_size); +static int32_t xqueue_send_adapter(void *queue, + void *item, + uint32_t ticks, + int prio); +void *xsemaphore_create_counting_adapter(uint32_t max, uint32_t init); + +#ifdef CONFIG_PM +extern void wifi_apb80m_request(void); +extern void wifi_apb80m_release(void); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/* Wi-Fi OS adapter data */ + +wifi_osi_funcs_t g_wifi_osi_funcs = +{ + ._version = ESP_WIFI_OS_ADAPTER_VERSION, + ._env_is_chip = esp_coex_common_env_is_chip_wrapper, + ._set_intr = set_intr_wrapper, + ._clear_intr = clear_intr_wrapper, + ._set_isr = set_isr_wrapper, + ._ints_on = enable_intr_wrapper, + ._ints_off = disable_intr_wrapper, + ._is_from_isr = is_from_isr_wrapper, + ._spin_lock_create = esp_coex_common_spin_lock_create_wrapper, + ._spin_lock_delete = free, + ._wifi_int_disable = esp_coex_common_int_disable_wrapper, + ._wifi_int_restore = esp_coex_common_int_restore_wrapper, + ._task_yield_from_isr = esp_coex_common_task_yield_from_isr_wrapper, + ._semphr_create = esp_coex_common_semphr_create_wrapper, + ._semphr_delete = esp_coex_common_semphr_delete_wrapper, + ._semphr_take = esp_coex_common_semphr_take_wrapper, + ._semphr_give = esp_coex_common_semphr_give_wrapper, + ._wifi_thread_semphr_get = wifi_thread_semphr_get_wrapper, + ._mutex_create = mutex_create_wrapper, + ._recursive_mutex_create = recursive_mutex_create_wrapper, + ._mutex_delete = mutex_delete_wrapper, + ._mutex_lock = mutex_lock_wrapper, + ._mutex_unlock = mutex_unlock_wrapper, + ._queue_create = queue_create_wrapper, + ._queue_delete = vqueue_delete_adapter, + ._queue_send = queue_send_wrapper, + ._queue_send_from_isr = queue_send_from_isr_wrapper, + ._queue_send_to_back = queue_send_to_back_wrapper, + ._queue_send_to_front = queue_send_to_front_wrapper, + ._queue_recv = queue_recv_wrapper, + ._queue_msg_waiting = queue_msg_waiting_wrapper, + ._event_group_create = event_group_create_wrapper, + ._event_group_delete = event_group_delete_wrapper, + ._event_group_set_bits = event_group_set_bits_wrapper, + ._event_group_clear_bits = event_group_clear_bits_wrapper, + ._event_group_wait_bits = event_group_wait_bits_wrapper, + ._task_create_pinned_to_core = task_create_pinned_to_core_wrapper, + ._task_create = task_create_wrapper, + ._task_delete = task_delete_wrapper, + ._task_delay = task_delay_wrapper, + ._task_ms_to_tick = task_ms_to_tick_wrapper, + ._task_get_current_task = task_get_current_task_wrapper, + ._task_get_max_priority = task_get_max_priority_wrapper, + ._malloc = malloc, + ._free = free, + ._event_post = esp_event_post_wrapper, + ._get_free_heap_size = esp_get_free_heap_size, + ._rand = esp_random, + ._dport_access_stall_other_cpu_start_wrap = + esp_empty_wrapper, + ._dport_access_stall_other_cpu_end_wrap = + esp_empty_wrapper, + ._wifi_apb80m_request = wifi_apb80m_request_wrapper, + ._wifi_apb80m_release = wifi_apb80m_release_wrapper, + ._phy_disable = esp_phy_disable_wrapper, + ._phy_enable = esp_phy_enable_wrapper, + ._phy_update_country_info = esp_phy_update_country_info, + ._read_mac = esp_read_mac_wrapper, + ._timer_arm = timer_arm_wrapper, + ._timer_disarm = esp_coex_common_timer_disarm_wrapper, + ._timer_done = esp_coex_common_timer_done_wrapper, + ._timer_setfn = esp_coex_common_timer_setfn_wrapper, + ._timer_arm_us = esp_coex_common_timer_arm_us_wrapper, + ._wifi_reset_mac = wifi_reset_mac_wrapper, + ._wifi_clock_enable = wifi_clock_enable_wrapper, + ._wifi_clock_disable = wifi_clock_disable_wrapper, + ._wifi_rtc_enable_iso = wifi_rtc_enable_iso_wrapper, + ._wifi_rtc_disable_iso = wifi_rtc_disable_iso_wrapper, + ._esp_timer_get_time = (int64_t(*)(void))esp_hr_timer_time_us, + ._nvs_set_i8 = esp_nvs_set_i8, + ._nvs_get_i8 = esp_nvs_get_i8, + ._nvs_set_u8 = esp_nvs_set_u8, + ._nvs_get_u8 = esp_nvs_get_u8, + ._nvs_set_u16 = esp_nvs_set_u16, + ._nvs_get_u16 = esp_nvs_get_u16, + ._nvs_open = nvs_open_wrapper, + ._nvs_close = esp_nvs_close, + ._nvs_commit = esp_nvs_commit, + ._nvs_set_blob = esp_nvs_set_blob, + ._nvs_get_blob = esp_nvs_get_blob, + ._nvs_erase_key = esp_nvs_erase_key, + ._get_random = os_get_random, + ._get_time = get_time_wrapper, + ._random = os_random, + ._slowclk_cal_get = esp_coex_common_clk_slowclk_cal_get_wrapper, + ._log_write = esp_log_write_wrapper, + ._log_writev = esp_log_writev_wrapper, + ._log_timestamp = esp_log_timestamp, + ._malloc_internal = esp_coex_common_malloc_internal_wrapper, + ._realloc_internal = realloc_internal_wrapper, + ._calloc_internal = calloc_internal_wrapper, + ._zalloc_internal = zalloc_internal_wrapper, + ._wifi_malloc = wifi_malloc, + ._wifi_realloc = wifi_realloc, + ._wifi_calloc = wifi_calloc, + ._wifi_zalloc = wifi_zalloc_wrapper, + ._wifi_create_queue = wifi_create_queue_wrapper, + ._wifi_delete_queue = wifi_delete_queue_wrapper, + ._coex_init = coex_init_wrapper, + ._coex_deinit = coex_deinit_wrapper, + ._coex_enable = coex_enable_wrapper, + ._coex_disable = coex_disable_wrapper, + ._coex_status_get = coex_status_get_wrapper, + ._coex_wifi_request = coex_wifi_request_wrapper, + ._coex_wifi_release = coex_wifi_release_wrapper, + ._coex_wifi_channel_set = coex_wifi_channel_set_wrapper, + ._coex_event_duration_get = coex_event_duration_get_wrapper, + ._coex_pti_get = coex_pti_get_wrapper, + ._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper, + ._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper, + ._coex_schm_interval_set = coex_schm_interval_set_wrapper, + ._coex_schm_interval_get = coex_schm_interval_get_wrapper, + ._coex_schm_curr_period_get = coex_schm_curr_period_get_wrapper, + ._coex_schm_curr_phase_get = coex_schm_curr_phase_get_wrapper, + ._coex_register_start_cb = coex_register_start_cb_wrapper, + ._coex_schm_process_restart = coex_schm_process_restart_wrapper, + ._coex_schm_register_cb = coex_schm_register_cb_wrapper, + ._coex_schm_flexible_period_set = coex_schm_flexible_period_set_wrapper, + ._coex_schm_flexible_period_get = coex_schm_flexible_period_get_wrapper, + ._magic = ESP_WIFI_OS_ADAPTER_MAGIC, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* Private functions order is defined as: + * - A first block containing the functions in the same order as of the + * ESP-IDF' corresponding `esp_adapter.c` to ease comparison; + * - A second block of auxiliary functions block ordered by ascending; + */ + +/* First block of functions */ + +/**************************************************************************** + * Name: wifi_zalloc_wrapper + * + * Description: + * Applications allocate a block of memory and clear it with 0 + * + * Input Parameters: + * size - memory size + * + * Returned Value: + * New memory pointer + * + ****************************************************************************/ + +static IRAM_ATTR void *wifi_zalloc_wrapper(size_t size) +{ + return zalloc(size); +} + +/**************************************************************************** + * Name: wifi_create_queue + * + * Description: + * Create Wi-Fi static message queue + * + * Input Parameters: + * queue_len - queue message number + * item_size - message size + * + * Returned Value: + * Wi-Fi static message queue data pointer + * + ****************************************************************************/ + +static void *wifi_create_queue(int queue_len, int item_size) +{ + wifi_static_queue_t *wifi_queue; + + wifi_queue = kmm_malloc(sizeof(wifi_static_queue_t)); + if (!wifi_queue) + { + wlerr("Failed to kmm_malloc\n"); + return NULL; + } + + wifi_queue->handle = xqueue_create_adapter(queue_len, item_size); + if (!wifi_queue->handle) + { + wlerr("Failed to create queue\n"); + kmm_free(wifi_queue); + return NULL; + } + + return wifi_queue; +} + +/**************************************************************************** + * Name: wifi_delete_queue + * + * Description: + * Delete message queue + * + * Input Parameters: + * queue - Message queue data pointer + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void wifi_delete_queue(wifi_static_queue_t *queue) +{ + if (queue) + { + vqueue_delete_adapter(queue->handle); + kmm_free(queue); + } +} + +/**************************************************************************** + * Name: wifi_create_queue_wrapper + * + * Description: + * This function creates a new queue for Wi-Fi operations. It is a wrapper + * around the wifi_create_queue function, providing a consistent interface + * for the Wi-Fi module. + * + * Input Parameters: + * queue_len - The maximum number of items that the queue can hold. + * item_size - The size of each item in the queue. + * + * Returned Value: + * A pointer to the newly created queue, or NULL if the operation failed. + * + ****************************************************************************/ + +static void *wifi_create_queue_wrapper(int queue_len, int item_size) +{ + return wifi_create_queue(queue_len, item_size); +} + +/**************************************************************************** + * Name: wifi_delete_queue_wrapper + * + * Description: + * Delete Wi-Fi static message queue + * + * Input Parameters: + * queue - Wi-Fi static message queue data pointer + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void wifi_delete_queue_wrapper(void *queue) +{ + wifi_delete_queue(queue); +} + +/**************************************************************************** + * Name: set_intr_wrapper + * + * Description: + * Route the Wi-Fi interrupt source and attach a handle that uses the HAL + * global vector descriptor list. Mark the CPU line as non-IRAM so + * esp_intr_noniram_disable() masks it while SPI flash holds the cache off. + * + * Input Parameters: + * cpu_no - The CPU which the interrupt number belongs. + * intr_source - The interrupt hardware source number. + * intr_num - The interrupt number CPU. + * intr_prio - The interrupt priority. + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void set_intr_wrapper(int32_t cpu_no, uint32_t intr_source, + uint32_t intr_num, int32_t intr_prio) +{ + intr_handle_t handle; + int irq = ESP_SOURCE2IRQ(intr_source); + esp_err_t err; + + wlinfo("cpu_no=%" PRId32 ", intr_source=%" PRIu32 + ", intr_num=%" PRIu32 ", intr_prio=%" PRId32 "\n", + cpu_no, intr_source, intr_num, intr_prio); + + esp_rom_route_intr_matrix(cpu_no, intr_source, intr_num); + esprv_int_set_priority(intr_num, intr_prio); + esprv_int_set_type(intr_num, INTR_TYPE_LEVEL); + + handle = kmm_calloc(1, sizeof(intr_handle_data_t)); + if (handle == NULL) + { + wlerr("Failed to kmm_calloc\n"); + return; + } + + handle->vector_desc = get_desc_for_int(intr_num, cpu_no); + if (handle->vector_desc == NULL) + { + wlerr("get_desc_for_int failed\n"); + kmm_free(handle); + return; + } + + handle->vector_desc->source = intr_source; + handle->shared_vector_desc = NULL; + + esp_set_handle(cpu_no, irq, handle); + + err = esp_intr_set_in_iram(handle, false); + if (err != ESP_OK) + { + wlerr("esp_intr_set_in_iram failed: %d\n", err); + } +} + +/**************************************************************************** + * Name: clear_intr_wrapper + * + * Description: + * This function is intended to clear a specific interrupt. However, this + * functionality is not supported in the current implementation. + * + * Input Parameters: + * intr_source - The source of the interrupt. + * intr_num - The number of the interrupt. + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void IRAM_ATTR clear_intr_wrapper(uint32_t intr_source, + uint32_t intr_num) +{ +} + +/**************************************************************************** + * Name: set_isr_wrapper + * + * Description: + * Register interrupt function + * + * Input Parameters: + * n - CPU interrupt number + * f - Interrupt function + * arg - Function private data + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void set_isr_wrapper(int32_t n, void *f, void *arg) +{ + intr_handler_set(n, (intr_handler_t)f, arg); +} + +/**************************************************************************** + * Name: enable_intr_wrapper + * + * Description: + * Enable a specific Wi-Fi interrupt. + * + * Input Parameters: + * intr_mask - A mask where the bit corresponding to the interrupt to be + * enabled is set. + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void enable_intr_wrapper(uint32_t intr_mask) +{ + int cpuint = __builtin_ffs(intr_mask) - 1; + int irq = esp_cpuint_to_irq(cpuint, this_cpu()); + + wlinfo("intr_mask=%08lx cpuint=%d irq=%d\n", intr_mask, cpuint, irq); + + esprv_int_enable(intr_mask); +} + +/**************************************************************************** + * Name: disable_intr_wrapper + * + * Description: + * Disable a specific Wi-Fi interrupt. + * + * Input Parameters: + * intr_mask - A mask where the bit corresponding to the interrupt to be + * disabled is set. + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void disable_intr_wrapper(uint32_t intr_mask) +{ + int cpuint = __builtin_ffs(intr_mask) - 1; + int irq = esp_cpuint_to_irq(cpuint, this_cpu()); + + wlinfo("intr_mask=%08lx cpuint=%d irq=%d\n", intr_mask, cpuint, irq); + + up_disable_irq(irq); +} + +/**************************************************************************** + * Name: is_from_isr_wrapper + * + * Description: + * Check current is in interrupt + * + * Input Parameters: + * None + * + * Returned Value: + * true if in interrupt or false if not + * + ****************************************************************************/ + +static bool IRAM_ATTR is_from_isr_wrapper(void) +{ + return up_interrupt_context(); +} + +/**************************************************************************** + * Name: wifi_thread_semphr_free + * + * Description: + * Delete thread self's semaphore + * + * Input Parameters: + * data - Semaphore data pointer + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void wifi_thread_semphr_free(void *data) +{ + void *sem = (void *)data; + + if (sem) + { + vsemaphore_delete_adapter(sem); + } +} + +/**************************************************************************** + * Name: wifi_thread_semphr_get_wrapper + * + * Description: + * Get thread self's semaphore + * + * Input Parameters: + * None + * + * Returned Value: + * Semaphore data pointer + * + ****************************************************************************/ + +static void *wifi_thread_semphr_get_wrapper(void) +{ + static int wifi_task_key = -1; + int ret; + void *sem; + + if (wifi_task_key < 0) + { + ret = task_tls_alloc(wifi_thread_semphr_free); + if (ret < 0) + { + wlerr("Failed to create task local key\n"); + return NULL; + } + + wifi_task_key = ret; + } + + sem = (void *)task_tls_get_value(wifi_task_key); + if (sem == NULL) + { + sem = xsemaphore_create_counting_adapter(1, 0); + if (!sem) + { + wlerr("Failed to create semaphore\n"); + return NULL; + } + + ret = task_tls_set_value(wifi_task_key, (uintptr_t)sem); + if (ret != OK) + { + wlerr("Failed to save semaphore on task local storage: %d\n", ret); + vsemaphore_delete_adapter(sem); + return NULL; + } + } + + return sem; +} + +/**************************************************************************** + * Name: recursive_mutex_create_wrapper + * + * Description: + * Create recursive mutex + * + * Input Parameters: + * None + * + * Returned Value: + * Recursive mutex data pointer + * + ****************************************************************************/ + +static void *recursive_mutex_create_wrapper(void) +{ + int ret; + pthread_mutex_t *mutex; + pthread_mutexattr_t attr; + int tmp; + + ret = pthread_mutexattr_init(&attr); + if (ret) + { + wlerr("Failed to initialize attr error=%d\n", ret); + return NULL; + } + + ret = pthread_mutexattr_settype(&attr, PTHREAD_MUTEX_RECURSIVE); + if (ret) + { + wlerr("Failed to set attr type error=%d\n", ret); + return NULL; + } + + tmp = sizeof(pthread_mutex_t); + mutex = kmm_malloc(tmp); + if (!mutex) + { + wlerr("Failed to alloc %d memory\n", tmp); + return NULL; + } + + ret = pthread_mutex_init(mutex, &attr); + if (ret) + { + wlerr("Failed to initialize mutex error=%d\n", ret); + kmm_free(mutex); + return NULL; + } + + return mutex; +} + +/**************************************************************************** + * Name: mutex_create_wrapper + * + * Description: + * Create mutex + * + * Input Parameters: + * None + * + * Returned Value: + * Mutex data pointer + * + ****************************************************************************/ + +static void *mutex_create_wrapper(void) +{ + int ret; + pthread_mutex_t *mutex; + int tmp; + + tmp = sizeof(pthread_mutex_t); + mutex = kmm_malloc(tmp); + if (!mutex) + { + wlerr("Failed to alloc %d memory\n", tmp); + return NULL; + } + + ret = pthread_mutex_init(mutex, NULL); + if (ret) + { + wlerr("Failed to initialize mutex error=%d\n", ret); + kmm_free(mutex); + return NULL; + } + + return mutex; +} + +/**************************************************************************** + * Name: mutex_delete_wrapper + * + * Description: + * Delete mutex + * + * Input Parameters: + * mutex - mutex data pointer + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void mutex_delete_wrapper(void *mutex) +{ + pthread_mutex_t *mutex_data = (pthread_mutex_t *)mutex; + + pthread_mutex_destroy(mutex_data); + kmm_free(mutex_data); +} + +/**************************************************************************** + * Name: mutex_lock_wrapper + * + * Description: + * Lock mutex + * + * Input Parameters: + * mutex - mutex data pointer + * + * Returned Value: + * True if success or false if fail + * + ****************************************************************************/ + +static int32_t IRAM_ATTR mutex_lock_wrapper(void *mutex) +{ + int ret; + pthread_mutex_t *mutex_data = (pthread_mutex_t *)mutex; + + ret = pthread_mutex_lock(mutex_data); + if (ret) + { + wlerr("Failed to lock mutex error=%d\n", ret); + } + + return nuttx_err_to_common_err(ret); +} + +/**************************************************************************** + * Name: mutex_unlock_wrapper + * + * Description: + * Unlock mutex + * + * Input Parameters: + * mutex - mutex data pointer + * + * Returned Value: + * True if success or false if fail + * + ****************************************************************************/ + +static int32_t IRAM_ATTR mutex_unlock_wrapper(void *mutex) +{ + int ret; + pthread_mutex_t *mutex_data = (pthread_mutex_t *)mutex; + + ret = pthread_mutex_unlock(mutex_data); + if (ret) + { + wlerr("Failed to unlock mutex error=%d\n", ret); + } + + return nuttx_err_to_common_err(ret); +} + +/**************************************************************************** + * Name: queue_create_wrapper + * + * Description: + * This function creates a new queue adapter with the specified length and + * item size. It is a wrapper around the xqueue_create_adapter function. + * + * Input Parameters: + * queue_len - The maximum number of items that the queue can hold. + * item_size - The size of each item in the queue. + * + * Returned Value: + * A pointer to the newly created queue adapter, or NULL if the operation + * failed. + * + ****************************************************************************/ + +static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size) +{ + return xqueue_create_adapter(queue_len, item_size); +} + +/**************************************************************************** + * Name: queue_send_wrapper + * + * Description: + * Send message of low priority to queue within a certain period of time + * + * Input Parameters: + * queue - Message queue data pointer + * item - Message data pointer + * ticks - Wait ticks + * + * Returned Value: + * True if success or false if fail + * + ****************************************************************************/ + +static int32_t queue_send_wrapper(void *queue, void *item, uint32_t ticks) +{ + return xqueue_send_adapter(queue, item, ticks, 0); +} + +/**************************************************************************** + * Name: queue_send_from_isr_wrapper + * + * Description: + * Send message of low priority to queue in ISR within + * a certain period of time + * + * Input Parameters: + * queue - Message queue data pointer + * item - Message data pointer + * hptw - Unused. + * + * Returned Value: + * True if success or false if fail + * + ****************************************************************************/ + +static int32_t IRAM_ATTR queue_send_from_isr_wrapper(void *queue, + void *item, + void *hptw) +{ + *(int *)hptw = 0; + + return xqueue_send_adapter(queue, item, 0, 0); +} + +/**************************************************************************** + * Name: queue_send_to_back_wrapper + * + * Description: + * Send message of low priority to queue within a certain period of time + * + * Input Parameters: + * queue - Message queue data pointer + * item - Message data pointer + * ticks - Wait ticks + * + * Returned Value: + * True if success or false if fail + * + ****************************************************************************/ + +static int32_t queue_send_to_back_wrapper(void *queue, + void *item, + uint32_t ticks) +{ + return xqueue_send_adapter(queue, item, ticks, 0); +} + +/**************************************************************************** + * Name: queue_send_to_front_wrapper + * + * Description: + * Send message of high priority to queue within a certain period of time + * + * Input Parameters: + * queue - Message queue data pointer + * item - Message data pointer + * ticks - Wait ticks + * + * Returned Value: + * True if success or false if fail + * + ****************************************************************************/ + +static int32_t queue_send_to_front_wrapper(void *queue, + void *item, + uint32_t ticks) +{ + return xqueue_send_adapter(queue, item, ticks, 1); +} + +/**************************************************************************** + * Name: queue_recv_wrapper + * + * Description: + * Receive message from queue within a certain period of time + * + * Input Parameters: + * queue - Message queue data pointer + * item - Message data pointer + * ticks - Wait ticks + * + * Returned Value: + * True if success or false if fail + * + ****************************************************************************/ + +static int32_t queue_recv_wrapper(void *queue, void *item, uint32_t ticks) +{ + ssize_t ret; + struct timespec timeout; + unsigned int prio; + struct mq_adpt *mq_adpt = (struct mq_adpt *)queue; + + if (ticks == OSI_FUNCS_TIME_BLOCKING) + { + ret = file_mq_receive(&mq_adpt->mq, (char *)item, + mq_adpt->msgsize, &prio); + if (ret < 0) + { + wlerr("Failed to receive from mqueue error=%d\n", ret); + } + } + else + { + ret = clock_gettime(CLOCK_REALTIME, &timeout); + if (ret < 0) + { + wlerr("Failed to get time\n"); + return false; + } + + if (ticks) + { + esp_update_time(&timeout, ticks); + } + + ret = file_mq_timedreceive(&mq_adpt->mq, (char *)item, + mq_adpt->msgsize, &prio, &timeout); + if (ret < 0) + { + wlerr("Failed to timedreceive from mqueue error=%d\n", + ret); + } + } + + return ret > 0 ? true : false; +} + +/**************************************************************************** + * Name: event_group_wait_bits_wrapper + * + * Description: + * Don't support + * + ****************************************************************************/ + +static uint32_t event_group_wait_bits_wrapper(void *event, + uint32_t bits_to_wait_for, + int clear_on_exit, + int wait_for_all_bits, + uint32_t block_time_tick) +{ + DEBUGPANIC(); + + return false; +} + +/**************************************************************************** + * Name: task_create_pinned_to_core_wrapper + * + * Description: + * Create task and bind it to target CPU, the task will run when it + * is created + * + * Input Parameters: + * entry - Task entry + * name - Task name + * stack_depth - Task stack size + * param - Task private data + * prio - Task priority + * task_handle - Task handle pointer which is used to pause, resume + * and delete the task + * core_id - CPU which the task runs in + * + * Returned Value: + * True if success or false if fail + * + ****************************************************************************/ + +static int32_t task_create_pinned_to_core_wrapper(void *entry, + const char *name, + uint32_t stack_depth, + void *param, + uint32_t prio, + void *task_handle, + uint32_t core_id) +{ + int pid; +#ifdef CONFIG_SMP + int ret; + cpu_set_t cpuset; +#endif + uint32_t target_prio = prio; + + if (target_prio < ESP_MAX_PRIORITIES) + { + target_prio += task_get_max_priority_wrapper() - ESP_MAX_PRIORITIES; + } + + pid = kthread_create(name, target_prio, stack_depth, entry, + (char * const *)param); + if (pid > 0) + { + if (task_handle != NULL) + { + *((int *)task_handle) = pid; + } + +#ifdef CONFIG_SMP + if (core_id < CONFIG_SMP_NCPUS) + { + CPU_ZERO(&cpuset); + CPU_SET(core_id, &cpuset); + ret = nxsched_set_affinity(pid, sizeof(cpuset), &cpuset); + if (ret) + { + wlerr("Failed to set affinity error=%d\n", ret); + return false; + } + } +#endif + } + else + { + wlerr("Failed to create task\n"); + } + + return pid > 0; +} + +/**************************************************************************** + * Name: task_create_wrapper + * + * Description: + * Create task and the task will run when it is created + * + * Input Parameters: + * entry - Task entry + * name - Task name + * stack_depth - Task stack size + * param - Task private data + * prio - Task priority + * task_handle - Task handle pointer which is used to pause, resume + * and delete the task + * + * Returned Value: + * True if success or false if fail + * + ****************************************************************************/ + +static int32_t task_create_wrapper(void *entry, + const char *name, + uint32_t stack_depth, + void *param, + uint32_t prio, + void *task_handle) +{ + return task_create_pinned_to_core_wrapper(entry, + name, + stack_depth, + param, + prio, + task_handle, + UINT32_MAX); +} + +/**************************************************************************** + * Name: task_ms_to_tick_wrapper + * + * Description: + * This function converts a duration from milliseconds to system ticks. + * It is a wrapper around the NuttX MSEC2TICK macro. + * + * Input Parameters: + * ms - The duration in milliseconds. + * + * Returned Value: + * The duration in system ticks. + * + ****************************************************************************/ + +static int32_t task_ms_to_tick_wrapper(uint32_t ms) +{ + return MSEC2TICK(ms); +} + +/**************************************************************************** + * Name: task_get_max_priority_wrapper + * + * Description: + * Get OS task maximum priority + * + * Input Parameters: + * None + * + * Returned Value: + * Task maximum priority + * + ****************************************************************************/ + +static int32_t task_get_max_priority_wrapper(void) +{ + return SCHED_PRIORITY_MAX; +} + +/**************************************************************************** + * Name: esp_event_post_wrapper + * + * Description: + * Active work queue and let the work to process the cached event + * + * Input Parameters: + * event_base - Event set name + * event_id - Event ID + * event_data - Event private data + * event_data_size - Event data size + * ticks - Waiting system ticks + * + * Returned Value: + * 0 if success or -1 if fail + * + ****************************************************************************/ + +int32_t esp_event_post_wrapper(const char *event_base, + int32_t event_id, + void *event_data, + size_t event_data_size, + uint32_t ticks) +{ + return (int32_t)esp_event_post(event_base, + event_id, + event_data, + event_data_size, + ticks); +} + +/**************************************************************************** + * Name: wifi_apb80m_request_wrapper + * + * Description: + * This function acquires the Wi-Fi lock in auto-sleep mode. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void IRAM_ATTR wifi_apb80m_request_wrapper(void) +{ +#ifdef CONFIG_PM + wifi_apb80m_request(); +#endif +} + +/**************************************************************************** + * Name: wifi_apb80m_release_wrapper + * + * Description: + * This function releases the Wi-Fi lock in auto-sleep mode. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void IRAM_ATTR wifi_apb80m_release_wrapper(void) +{ +#ifdef CONFIG_PM + wifi_apb80m_release(); +#endif +} + +/**************************************************************************** + * Name: esp_phy_enable_wrapper + * + * Description: + * This function enables the WiFi PHY. It first enables the PHY for the + * WiFi modem, then sets the WiFi PHY enable flag to 1. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void esp_phy_enable_wrapper(void) +{ + esp_phy_enable(PHY_MODEM_WIFI); + phy_wifi_enable_set(1); +} + +/**************************************************************************** + * Name: esp_phy_disable_wrapper + * + * Description: + * This function disables the WiFi PHY. It first sets the WiFi PHY enable + * flag to 0, then disables the PHY for the WiFi modem. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void esp_phy_disable_wrapper(void) +{ + phy_wifi_enable_set(0); + esp_phy_disable(PHY_MODEM_WIFI); +} + +/**************************************************************************** + * Name: timer_arm_wrapper + * + * Description: + * Set timer timeout period and repeat flag + * + * Input Parameters: + * ptimer - timer data pointer + * ms - millim seconds + * repeat - true: run cycle, false: run once + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void IRAM_ATTR timer_arm_wrapper(void *ptimer, + uint32_t tmout, + bool repeat) +{ + ets_timer_arm(ptimer, tmout, repeat); +} + +/**************************************************************************** + * Name: wifi_reset_mac_wrapper + * + * Description: + * Reset Wi-Fi hardware MAC + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void wifi_reset_mac_wrapper(void) +{ + periph_module_reset(PERIPH_WIFI_MODULE); +} + +/**************************************************************************** + * Name: wifi_rtc_enable_iso_wrapper + * + * Description: + * This function is a wrapper for enabling the isolation of the Wi-Fi + * Real-Time Clock (RTC). If the MAC/BB power down configuration option + * is set, it powers down the MAC/BB. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void IRAM_ATTR wifi_rtc_enable_iso_wrapper(void) +{ +#if CONFIG_MAC_BB_PD + esp_mac_bb_power_down(); +#endif +} + +/**************************************************************************** + * Name: wifi_rtc_disable_iso_wrapper + * + * Description: + * This function is a wrapper for disabling the isolation of the Wi-Fi + * Real-Time Clock (RTC). If the MAC/BB power down configuration option + * is set, it powers up the MAC/BB. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void IRAM_ATTR wifi_rtc_disable_iso_wrapper(void) +{ +#if CONFIG_MAC_BB_PD + esp_mac_bb_power_up(); +#endif +} + +/**************************************************************************** + * Name: wifi_clock_enable_wrapper + * + * Description: + * Enable Wi-Fi clock + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void wifi_clock_enable_wrapper(void) +{ + wifi_module_enable(); +} + +/**************************************************************************** + * Name: wifi_clock_disable_wrapper + * + * Description: + * Disable Wi-Fi clock + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void wifi_clock_disable_wrapper(void) +{ + wifi_module_disable(); +} + +/**************************************************************************** + * Name: get_time_wrapper + * + * Description: + * Get std C time + * + * Input Parameters: + * t - buffer to store time of type timeval + * + * Returned Value: + * Zero (OK) on success; -1 is returned on failure with the errno variable + * set appropriately. + * + ****************************************************************************/ + +static int get_time_wrapper(void *t) +{ + return os_get_time(t); +} + +/**************************************************************************** + * Name: realloc_internal_wrapper + * + * Description: + * Drivers allocate a block of memory by old memory block + * + * Input Parameters: + * ptr - old memory pointer + * size - memory size + * + * Returned Value: + * New memory pointer + * + ****************************************************************************/ + +static IRAM_ATTR void *realloc_internal_wrapper(void *ptr, size_t size) +{ + return kmm_realloc(ptr, size); +} + +/**************************************************************************** + * Name: calloc_internal_wrapper + * + * Description: + * Drivers allocate some continuous blocks of memory + * + * Input Parameters: + * n - memory block number + * size - memory block size + * + * Returned Value: + * New memory pointer + * + ****************************************************************************/ + +static IRAM_ATTR void *calloc_internal_wrapper(size_t n, size_t size) +{ + return kmm_calloc(n, size); +} + +/**************************************************************************** + * Name: zalloc_internal_wrapper + * + * Description: + * Drivers allocate a block of memory and clear it with 0 + * + * Input Parameters: + * size - memory size + * + * Returned Value: + * New memory pointer + * + ****************************************************************************/ + +static IRAM_ATTR void *zalloc_internal_wrapper(size_t size) +{ + return kmm_zalloc(size); +} + +/**************************************************************************** + * Name: nvs_open_wrapper + * + * Description: + * Create a file system storage data object + * + * Input Parameters: + * name - Storage index + * open_mode - Storage mode + * out_handle - Storage handle + * + * Returned Value: + * 0 if success or -1 if fail + * + ****************************************************************************/ + +static int nvs_open_wrapper(const char *name, + unsigned int open_mode, + uint32_t *out_handle) +{ + DEBUGPANIC(); + + return -1; +} + +/**************************************************************************** + * Name: esp_log_writev_wrapper + * + * Description: + * Output log with by format string and its arguments + * + * Input Parameters: + * level - log level, no mean here + * tag - log TAG, no mean here + * format - format string + * args - arguments list + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void esp_log_writev_wrapper(unsigned int level, + const char *tag, + const char *format, + va_list args) +{ + esp_log_level_t max_level; + +#if defined (CONFIG_DEBUG_WIRELESS_INFO) + max_level = ESP_LOG_VERBOSE; +#elif defined (CONFIG_DEBUG_WIRELESS_WARN) + max_level = ESP_LOG_WARN; +#elif defined (CONFIG_DEBUG_WIRELESS_ERROR) + max_level = ESP_LOG_ERROR; +#else + max_level = ESP_LOG_NONE; +#endif + + if (level <= max_level) + { + esp_log_writev(level, tag, format, args); + } +} + +/**************************************************************************** + * Name: esp_log_write_wrapper + * + * Description: + * Output log with by format string and its arguments + * + * Input Parameters: + * level - log level, no mean here + * tag - log TAG, no mean here + * format - format string + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void esp_log_write_wrapper(unsigned int level, + const char *tag, + const char *format, ...) +{ + esp_log_level_t max_level; + +#if defined (CONFIG_DEBUG_WIRELESS_INFO) + max_level = ESP_LOG_VERBOSE; +#elif defined (CONFIG_DEBUG_WIRELESS_WARN) + max_level = ESP_LOG_WARN; +#elif defined (CONFIG_DEBUG_WIRELESS_ERROR) + max_level = ESP_LOG_ERROR; +#else + max_level = ESP_LOG_NONE; +#endif + + if (level <= max_level) + { + va_list list; + va_start(list, format); + esp_log_writev(level, tag, format, list); + va_end(list); + } +} + +/**************************************************************************** + * Name: esp_read_mac_wrapper + * + * Description: + * Read MAC address from efuse + * + * Input Parameters: + * mac - MAC address buffer pointer + * type - MAC address type + * + * Returned Value: + * 0 if success or -1 if fail + * + ****************************************************************************/ + +static int esp_read_mac_wrapper(uint8_t *mac, unsigned int type) +{ + return esp_read_mac(mac, type); +} + +/**************************************************************************** + * Name: coex_init_wrapper + * + * Description: + * Init software coexist + * + * Input Parameters: + * None + * + * Returned Value: + * Zero (OK) is returned on success. A negated errno value is returned + * on failure. + * + ****************************************************************************/ + +static int coex_init_wrapper(void) +{ +#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE + return coex_init(); +#else + return 0; +#endif +} + +/**************************************************************************** + * Name: coex_deinit_wrapper + * + * Description: + * De-init software coexist + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void coex_deinit_wrapper(void) +{ +#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE + coex_deinit(); +#endif +} + +/**************************************************************************** + * Name: coex_enable_wrapper + * + * Description: + * Enable software coexist + * + * Input Parameters: + * None + * + * Returned Value: + * Zero (OK) is returned on success. A negated errno value is returned + * on failure. + * + ****************************************************************************/ + +static int coex_enable_wrapper(void) +{ +#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE + return coex_enable(); +#else + return 0; +#endif +} + +/**************************************************************************** + * Name: coex_disable_wrapper + * + * Description: + * Disable software coexist + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void coex_disable_wrapper(void) +{ +#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE + coex_disable(); +#endif +} + +/**************************************************************************** + * Name: coex_status_get_wrapper + * + * Description: + * Get software coexist status. + * + * Input Parameters: + * None + * + * Returned Value: + * Zero (OK) is returned on success. A negated errno value is returned + * on failure. + * + ****************************************************************************/ + +static IRAM_ATTR uint32_t coex_status_get_wrapper(void) +{ +#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE + return coex_status_get(); +#else + return 0; +#endif +} + +/**************************************************************************** + * Name: coex_wifi_request_wrapper + * + * Description: + * Request Wi-Fi coexistence. + * + * Input Parameters: + * event - WiFi event + * latency - WiFi will request coexistence after latency + * duration - duration for WiFi to request coexistence + * + * Returned Value: + * Zero (OK) is returned on success. A negated errno value is returned + * on failure. + * + ****************************************************************************/ + +static int coex_wifi_request_wrapper(uint32_t event, + uint32_t latency, + uint32_t duration) +{ +#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE + return coex_wifi_request(event, latency, duration); +#else + return 0; +#endif +} + +/**************************************************************************** + * Name: coex_wifi_release_wrapper + * + * Description: + * Release Wi-Fi coexistence. + * + * Input Parameters: + * event - WiFi event + * + * Returned Value: + * Zero (OK) is returned on success. A negated errno value is returned + * on failure. + * + ****************************************************************************/ + +static IRAM_ATTR int coex_wifi_release_wrapper(uint32_t event) +{ +#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE + return coex_wifi_release(event); +#else + return 0; +#endif +} + +/**************************************************************************** + * Name: coex_wifi_channel_set_wrapper + * + * Description: + * Set Wi-Fi channel to coexistence module. + * + * Input Parameters: + * primary - WiFi primary channel + * secondary - WiFi secondary channel + * + * Returned Value: + * Zero (OK) is returned on success. A negated errno value is returned + * on failure. + * + ****************************************************************************/ + +static int coex_wifi_channel_set_wrapper(uint8_t primary, uint8_t secondary) +{ +#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE + return coex_wifi_channel_set(primary, secondary); +#else + return 0; +#endif +} + +/**************************************************************************** + * Name: coex_event_duration_get_wrapper + * + * Description: + * Get coexistence event duration. + * + * Input Parameters: + * event - Coexistence event + * duration - Coexistence event duration + * + * Returned Value: + * Zero (OK) is returned on success. A negated errno value is returned + * on failure. + * + ****************************************************************************/ + +static IRAM_ATTR int coex_event_duration_get_wrapper(uint32_t event, + uint32_t *duration) +{ +#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE + return coex_event_duration_get(event, duration); +#else + return 0; +#endif +} + +/**************************************************************************** + * Name: coex_pti_get_wrapper + * + * Description: + * Get coexistence event priority. + * + * Input Parameters: + * event - Coexistence event + * pti - Coexistence event priority + * + * Returned Value: + * Zero (OK) is returned on success. A negated errno value is returned + * on failure. + * + ****************************************************************************/ + +static int coex_pti_get_wrapper(uint32_t event, uint8_t *pti) +{ +#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE + return coex_pti_get(event, pti); +#else + return 0; +#endif +} + +/**************************************************************************** + * Name: coex_schm_status_bit_clear_wrapper + * + * Description: + * Clear coexistence status. + * + * Input Parameters: + * type - Coexistence status type + * status - Coexistence status + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void coex_schm_status_bit_clear_wrapper(uint32_t type, + uint32_t status) +{ +#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE + coex_schm_status_bit_clear(type, status); +#endif +} + +/**************************************************************************** + * Name: coex_schm_status_bit_set_wrapper + * + * Description: + * Set coexistence status. + * + * Input Parameters: + * type - Coexistence status type + * status - Coexistence status + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status) +{ +#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE + coex_schm_status_bit_set(type, status); +#endif +} + +/**************************************************************************** + * Name: coex_schm_interval_set_wrapper + * + * Description: + * Set coexistence scheme interval. + * + * Input Parameters: + * interval - Coexistence scheme interval + * + * Returned Value: + * Zero (OK) is returned on success. A negated errno value is returned + * on failure. + * + ****************************************************************************/ + +static IRAM_ATTR int coex_schm_interval_set_wrapper(uint32_t interval) +{ +#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE + return coex_schm_interval_set(interval); +#else + return 0; +#endif +} + +/**************************************************************************** + * Name: coex_schm_interval_get_wrapper + * + * Description: + * Get coexistence scheme interval. + * + * Input Parameters: + * None + * + * Returned Value: + * Coexistence scheme interval + * + ****************************************************************************/ + +static uint32_t coex_schm_interval_get_wrapper(void) +{ +#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE + return coex_schm_interval_get(); +#else + return 0; +#endif +} + +/**************************************************************************** + * Name: coex_schm_curr_period_get_wrapper + * + * Description: + * Get current coexistence scheme period. + * + * Input Parameters: + * None + * + * Returned Value: + * Coexistence scheme period + * + ****************************************************************************/ + +static uint8_t coex_schm_curr_period_get_wrapper(void) +{ +#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE + return coex_schm_curr_period_get(); +#else + return 0; +#endif +} + +/**************************************************************************** + * Name: coex_schm_curr_phase_get_wrapper + * + * Description: + * Get current coexistence scheme phase. + * + * Input Parameters: + * None + * + * Returned Value: + * Coexistence scheme phase + * + ****************************************************************************/ + +static void *coex_schm_curr_phase_get_wrapper(void) +{ +#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE + return coex_schm_curr_phase_get(); +#else + return NULL; +#endif +} + +/**************************************************************************** + * Name: coex_register_start_cb_wrapper + * + * Description: + * Register Wi-Fi callback for coexistence starts. + * + * Input Parameters: + * cb - WiFi callback + * + * Returned Value: + * Zero (OK) is returned on success. A negated errno value is returned + * on failure. + * + ****************************************************************************/ + +static int coex_register_start_cb_wrapper(int (* cb)(void)) +{ +#if CONFIG_SW_COEXIST_ENABLE + return coex_register_start_cb(cb); +#else + return 0; +#endif +} + +/**************************************************************************** + * Name: coex_schm_process_restart_wrapper + * + * Description: + * Restart current coexistence scheme. + * + * Input Parameters: + * None + * + * Returned Value: + * Zero (OK) is returned on success. A negated errno value is returned + * on failure. + * + ****************************************************************************/ + +static int coex_schm_process_restart_wrapper(void) +{ +#if CONFIG_SW_COEXIST_ENABLE + return coex_schm_process_restart(); +#else + return 0; +#endif +} + +/**************************************************************************** + * Name: coex_schm_register_cb_wrapper + * + * Description: + * Register callback for coexistence scheme. + * + * Input Parameters: + * type - callback type + * cb - callback + * + * Returned Value: + * Zero (OK) is returned on success. A negated errno value is returned + * on failure. + * + ****************************************************************************/ + +static int coex_schm_register_cb_wrapper(int type, int(*cb)(int)) +{ +#if CONFIG_SW_COEXIST_ENABLE + return coex_schm_register_callback(type, cb); +#else + return 0; +#endif +} + +/**************************************************************************** + * Name: coex_schm_flexible_period_set_wrapper + * + * Description: + * This function sets the coexistence scheme flexible period. If the + * coexistence power management feature is enabled + * (CONFIG_ESP_COEX_POWER_MANAGEMENT), it calls the function + * coex_schm_flexible_period_set with the given period and returns its + * result. If the feature is not enabled, it returns 0. + * + * Input Parameters: + * period - The flexible period to set. + * + * Returned Value: + * ESP_OK on success, or the result of coex_schm_flexible_period_set. + * + ****************************************************************************/ + +static int coex_schm_flexible_period_set_wrapper(uint8_t period) +{ +#if CONFIG_ESP_COEX_POWER_MANAGEMENT + return coex_schm_flexible_period_set(period); +#else + return 0; +#endif +} + +/**************************************************************************** + * Name: coex_schm_flexible_period_get_wrapper + * + * Description: + * This function gets the coexistence scheme flexible period. If the + * coexistence power management feature is enabled + * (CONFIG_ESP_COEX_POWER_MANAGEMENT), it calls the function + * coex_schm_flexible_period_get and returns its result. If the feature is + * not enabled, it returns 1. + * + * Input Parameters: + * None + * + * Returned Value: + * The coexistence scheme flexible period. + * + ****************************************************************************/ + +static uint8_t coex_schm_flexible_period_get_wrapper(void) +{ +#if CONFIG_ESP_COEX_POWER_MANAGEMENT + return coex_schm_flexible_period_get(); +#else + return 1; +#endif +} + +/**************************************************************************** + * Name: esp_empty_wrapper + * + * Description: + * This function is an empty wrapper, designed to be used where a function + * pointer is required but no operation is needed. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void IRAM_ATTR esp_empty_wrapper(void) +{ +} + +/**************************************************************************** + * Name: esp_get_free_heap_size + * + * Description: + * Get free heap size by byte + * + * Input Parameters: + * None + * + * Returned Value: + * Free heap size + * + ****************************************************************************/ + +static uint32_t esp_get_free_heap_size(void) +{ + struct mallinfo info; + + info = kmm_mallinfo(); + return info.fordblks; +} + +/**************************************************************************** + * Name: event_group_create_wrapper + * + * Description: + * Don't support + * + ****************************************************************************/ + +static void *event_group_create_wrapper(void) +{ + DEBUGPANIC(); + + return NULL; +} + +/**************************************************************************** + * Name: event_group_delete_wrapper + * + * Description: + * Don't support + * + ****************************************************************************/ + +static void event_group_delete_wrapper(void *event) +{ + DEBUGPANIC(); +} + +/**************************************************************************** + * Name: event_group_set_bits_wrapper + * + * Description: + * Don't support + * + ****************************************************************************/ + +static uint32_t event_group_set_bits_wrapper(void *event, uint32_t bits) +{ + DEBUGPANIC(); + + return false; +} + +/**************************************************************************** + * Name: event_group_clear_bits_wrapper + * + * Description: + * Don't support + * + ****************************************************************************/ + +static uint32_t event_group_clear_bits_wrapper(void *event, uint32_t bits) +{ + DEBUGPANIC(); + + return false; +} + +/**************************************************************************** + * Name: esp_nvs_commit + * + * Description: + * This function has no practical effect + * + ****************************************************************************/ + +static int esp_nvs_commit(uint32_t handle) +{ + return 0; +} + +/**************************************************************************** + * Name: esp_nvs_erase_key + * + * Description: + * Read a block of data from file system + * + * Input Parameters: + * handle - NVS handle + * key - Data index + * + * Returned Value: + * 0 if success or -1 if fail + * + ****************************************************************************/ + +static int esp_nvs_erase_key(uint32_t handle, const char *key) +{ + DEBUGPANIC(); + + return -1; +} + +/**************************************************************************** + * Name: esp_nvs_get_blob + * + * Description: + * Read a block of data from file system + * + * Input Parameters: + * handle - NVS handle + * key - Data index + * out_value - Read buffer pointer + * length - Buffer length + * + * Returned Value: + * 0 if success or -1 if fail + * + ****************************************************************************/ + +static int esp_nvs_get_blob(uint32_t handle, + const char *key, + void *out_value, + size_t *length) +{ + DEBUGPANIC(); + + return -1; +} + +/**************************************************************************** + * Name: esp_nvs_set_blob + * + * Description: + * Save a block of data into file system + * + * Input Parameters: + * handle - NVS handle + * key - Data index + * value - Stored buffer pointer + * length - Buffer length + * + * Returned Value: + * 0 if success or -1 if fail + * + ****************************************************************************/ + +static int esp_nvs_set_blob(uint32_t handle, + const char *key, + const void *value, + size_t length) +{ + DEBUGPANIC(); + + return -1; +} + +/**************************************************************************** + * Name: esp_nvs_get_i8 + * + * Description: + * Read data of type int8_t from file system + * + * Input Parameters: + * handle - NVS handle + * key - Data index + * out_value - Read buffer pointer + * + * Returned Value: + * 0 if success or -1 if fail + * + ****************************************************************************/ + +static int esp_nvs_get_i8(uint32_t handle, + const char *key, + int8_t *out_value) +{ + DEBUGPANIC(); + + return -1; +} + +/**************************************************************************** + * Name: esp_nvs_set_i8 + * + * Description: + * Save data of type int8_t into file system + * + * Input Parameters: + * handle - NVS handle + * key - Data index + * value - Stored data + * + * Returned Value: + * 0 if success or -1 if fail + * + ****************************************************************************/ + +static int esp_nvs_set_i8(uint32_t handle, + const char *key, + int8_t value) +{ + DEBUGPANIC(); + + return -1; +} + +/**************************************************************************** + * Name: esp_nvs_get_u8 + * + * Description: + * Read data of type uint8_t from file system + * + * Input Parameters: + * handle - NVS handle + * key - Data index + * out_value - Read buffer pointer + * + * Returned Value: + * 0 if success or -1 if fail + * + ****************************************************************************/ + +static int esp_nvs_get_u8(uint32_t handle, + const char *key, + uint8_t *out_value) +{ + DEBUGPANIC(); + + return -1; +} + +/**************************************************************************** + * Name: esp_nvs_set_u8 + * + * Description: + * Save data of type uint8_t into file system + * + * Input Parameters: + * handle - NVS handle + * key - Data index + * value - Stored data + * + * Returned Value: + * 0 if success or -1 if fail + * + ****************************************************************************/ + +static int esp_nvs_set_u8(uint32_t handle, + const char *key, + uint8_t value) +{ + DEBUGPANIC(); + + return -1; +} + +/**************************************************************************** + * Name: esp_nvs_get_u16 + * + * Description: + * Read data of type uint16_t from file system + * + * Input Parameters: + * handle - NVS handle + * key - Data index + * out_value - Read buffer pointer + * + * Returned Value: + * 0 if success or -1 if fail + * + ****************************************************************************/ + +static int esp_nvs_get_u16(uint32_t handle, + const char *key, + uint16_t *out_value) +{ + DEBUGPANIC(); + + return -1; +} + +/**************************************************************************** + * Name: esp_nvs_set_u16 + * + * Description: + * Save data of type uint16_t into file system + * + * Input Parameters: + * handle - NVS handle + * key - Data index + * value - Stored data + * + * Returned Value: + * 0 if success or -1 if fail + * + ****************************************************************************/ + +static int esp_nvs_set_u16(uint32_t handle, + const char *key, + uint16_t value) +{ + DEBUGPANIC(); + + return -1; +} + +/**************************************************************************** + * Name: esp_nvs_close + * + * Description: + * Close storage data object and free resource + * + * Input Parameters: + * handle - NVS handle + * + * Returned Value: + * 0 if success or -1 if fail + * + ****************************************************************************/ + +static void esp_nvs_close(uint32_t handle) +{ + DEBUGPANIC(); +} + +/**************************************************************************** + * Name: esp_update_time + * + * Description: + * Transform ticks to time and add this time to timespec value + * + * Input Parameters: + * timespec - Input timespec data pointer + * ticks - System ticks + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void esp_update_time(struct timespec *timespec, uint32_t ticks) +{ + struct timespec ts; + + clock_ticks2time(&ts, ticks); + clock_timespec_add(timespec, &ts, timespec); +} + +/**************************************************************************** + * Name: queue_msg_waiting_wrapper + * + * Description: + * Get message number in the message queue + * + * Input Parameters: + * queue - Message queue data pointer + * + * Returned Value: + * Message number + * + ****************************************************************************/ + +static uint32_t queue_msg_waiting_wrapper(void *queue) +{ + int ret; + struct mq_attr attr; + struct mq_adpt *mq_adpt = (struct mq_adpt *)queue; + + ret = file_mq_getattr(&mq_adpt->mq, &attr); + if (ret < 0) + { + wlerr("Failed to get attr from mqueue error=%d\n", ret); + return 0; + } + + return attr.mq_curmsgs; +} + +/**************************************************************************** + * Name: task_delay_wrapper + * + * Description: + * Current task wait for some ticks + * + * Input Parameters: + * tick - Waiting ticks + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void task_delay_wrapper(uint32_t tick) +{ + useconds_t us = TICK2USEC(tick); + + nxsched_usleep(us); +} + +/**************************************************************************** + * Name: task_delete_wrapper + * + * Description: + * Delete the target task + * + * Input Parameters: + * task_handle - Task handle pointer which is used to pause, resume + * and delete the task + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void task_delete_wrapper(void *task_handle) +{ + pid_t pid = (pid_t)((uintptr_t)task_handle); + + kthread_delete(pid); +} + +/**************************************************************************** + * Name: task_get_current_task_wrapper + * + * Description: + * This function gets the current task's PID and returns it as a void + * pointer. This is a wrapper around the NuttX function nxsched_gettid. + * + * Input Parameters: + * None + * + * Returned Value: + * The current task's PID as a void pointer. + * + ****************************************************************************/ + +static void *task_get_current_task_wrapper(void) +{ + pid_t pid = nxsched_gettid(); + + return (void *)((uintptr_t)pid); +} + +/**************************************************************************** + * Name: vqueue_delete_adapter + * + * Description: + * This function deletes a queue adapter. It closes the message queue, + * unlinks it, and then frees the memory allocated for the queue adapter. + * + * Input Parameters: + * queue - A pointer to the queue adapter to be deleted. + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void vqueue_delete_adapter(void *queue) +{ + struct mq_adpt *mq_adpt = (struct mq_adpt *)queue; + + file_mq_close(&mq_adpt->mq); + file_mq_unlink(mq_adpt->name); + kmm_free(mq_adpt); +} + +/**************************************************************************** + * Name: vsemaphore_delete_adapter + * + * Description: + * Delete semaphore + * + * Input Parameters: + * semphr - Semaphore data pointer + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void vsemaphore_delete_adapter(void *semphr) +{ + sem_t *sem = (sem_t *)semphr; + + nxsem_destroy(sem); + kmm_free(sem); +} + +/**************************************************************************** + * Name: xqueue_create_adapter + * + * Description: + * Create message queue + * + * Input Parameters: + * queue_len - queue message number + * item_size - message size + * + * Returned Value: + * Message queue data pointer + * + ****************************************************************************/ + +static void *xqueue_create_adapter(uint32_t queue_len, uint32_t item_size) +{ + struct mq_attr attr; + struct mq_adpt *mq_adpt; + int ret; + + mq_adpt = kmm_malloc(sizeof(struct mq_adpt)); + if (!mq_adpt) + { + wlerr("Failed to kmm_malloc\n"); + return NULL; + } + + snprintf(mq_adpt->name, sizeof(mq_adpt->name), + "/tmp/%p", mq_adpt); + + attr.mq_maxmsg = queue_len; + attr.mq_msgsize = item_size; + attr.mq_curmsgs = 0; + attr.mq_flags = 0; + + ret = file_mq_open(&mq_adpt->mq, mq_adpt->name, + O_RDWR | O_CREAT, 0644, &attr); + if (ret < 0) + { + wlerr("Failed to create mqueue\n"); + kmm_free(mq_adpt); + return NULL; + } + + mq_adpt->msgsize = item_size; + + return (void *)mq_adpt; +} + +/**************************************************************************** + * Name: xqueue_send_adapter + * + * Description: + * Generic send message to queue within a certain period of time + * + * Input Parameters: + * queue - Message queue data pointer + * item - Message data pointer + * ticks - Wait ticks + * prio - Message priority + * + * Returned Value: + * True if success or false if fail + * + ****************************************************************************/ + +static int32_t xqueue_send_adapter(void *queue, + void *item, + uint32_t ticks, + int prio) +{ + int ret; + struct timespec timeout; + struct mq_adpt *mq_adpt = (struct mq_adpt *)queue; + + if (ticks == OSI_FUNCS_TIME_BLOCKING || ticks == 0) + { + /* Wi-Fi interrupt function will call this adapter function to send + * message to message queue, so here we should call kernel API + * instead of application API + */ + + ret = file_mq_send(&mq_adpt->mq, (const char *)item, + mq_adpt->msgsize, prio); + if (ret < 0) + { + wlerr("Failed to send message to mqueue error=%d\n", + ret); + } + } + else + { + ret = clock_gettime(CLOCK_REALTIME, &timeout); + if (ret < 0) + { + wlerr("Failed to get time\n"); + return false; + } + + if (ticks) + { + esp_update_time(&timeout, ticks); + } + + ret = file_mq_timedsend(&mq_adpt->mq, (const char *)item, + mq_adpt->msgsize, prio, &timeout); + if (ret < 0) + { + wlerr("Failed to timedsend message to mqueue error=%d\n", + ret); + } + } + + return nuttx_err_to_common_err(ret); +} + +/**************************************************************************** + * Name: xsemaphore_create_counting_adapter + * + * Description: + * Create and initialize semaphore + * + * Input Parameters: + * max - No meaning for NuttX + * init - semaphore initialization value + * + * Returned Value: + * Semaphore data pointer + * + ****************************************************************************/ + +void *xsemaphore_create_counting_adapter(uint32_t max, uint32_t init) +{ + int ret; + sem_t *sem; + int tmp; + + tmp = sizeof(sem_t); + sem = kmm_malloc(tmp); + if (!sem) + { + wlerr("Failed to alloc %d memory\n", tmp); + return NULL; + } + + ret = nxsem_init(sem, 0, init); + if (ret) + { + wlerr("Failed to initialize sem error=%d\n", ret); + kmm_free(sem); + return NULL; + } + + return sem; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: wifi_malloc + * + * Description: + * Applications allocate a block of memory + * + * Input Parameters: + * size - memory size + * + * Returned Value: + * Memory pointer + * + ****************************************************************************/ + +IRAM_ATTR void *wifi_malloc(size_t size) +{ + return malloc(size); +} + +/**************************************************************************** + * Name: wifi_realloc + * + * Description: + * Applications allocate a block of memory by old memory block + * + * Input Parameters: + * ptr - old memory pointer + * size - memory size + * + * Returned Value: + * New memory pointer + * + ****************************************************************************/ + +IRAM_ATTR void *wifi_realloc(void *ptr, size_t size) +{ + return realloc(ptr, size); +} + +/**************************************************************************** + * Name: wifi_calloc + * + * Description: + * Applications allocate some continuous blocks of memory + * + * Input Parameters: + * n - memory block number + * size - memory block size + * + * Returned Value: + * New memory pointer + * + ****************************************************************************/ + +IRAM_ATTR void *wifi_calloc(size_t n, size_t size) +{ + return calloc(n, size); +} diff --git a/arch/risc-v/src/esp32c2/hal_esp32c2.cmake b/arch/risc-v/src/esp32c2/hal_esp32c2.cmake new file mode 100644 index 0000000000000..cccefedc33a7e --- /dev/null +++ b/arch/risc-v/src/esp32c2/hal_esp32c2.cmake @@ -0,0 +1,524 @@ +# ############################################################################## +# arch/risc-v/src/esp32c2/hal_esp32c2.cmake +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more contributor +# license agreements. See the NOTICE file distributed with this work for +# additional information regarding copyright ownership. The ASF licenses this +# file to you under the Apache License, Version 2.0 (the "License"); you may not +# use this file except in compliance with the License. You may obtain a copy of +# the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations under +# the License. +# +# ############################################################################## + +# ############################################################################## +# Include Paths +# ############################################################################## + +if(NOT EXISTS ${ESP_HAL_3RDPARTY_REPO}) + message( + FATAL_ERROR + "ESP_HAL_3RDPARTY_REPO does not exist: ${ESP_HAL_3RDPARTY_REPO}. Please ensure the HAL 3rd party repository is cloned correctly." + ) +endif() + +target_include_directories( + arch + PRIVATE + # NuttX specific includes + ${ESP_HAL_3RDPARTY_REPO}/nuttx/include + ${ESP_HAL_3RDPARTY_REPO}/nuttx/include/mbedtls + ${ESP_HAL_3RDPARTY_REPO}/nuttx/${CHIP_SERIES}/include + ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/components/esp_driver_uart/include + # Bootloader support + ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/include + ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/include + ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/private_include + # Driver components + ${ESP_HAL_3RDPARTY_REPO}/components/driver/spi/include + # EFUSE + ${ESP_HAL_3RDPARTY_REPO}/components/efuse/include + ${ESP_HAL_3RDPARTY_REPO}/components/efuse/private_include + ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/include + ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/private_include + # ESP ADC + ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/interface + ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/${CHIP_SERIES}/include + # ESP Common + ${ESP_HAL_3RDPARTY_REPO}/components/esp_common/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_event/include + # ESP HAL components (upper HAL and per-chip) + ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/include + ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/src + ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_gpio/include + ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_uart/include + # ESP HW Support + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/dma/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/include/esp_private + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/include/soc + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/include/soc/${CHIP_SERIES} + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/ldo/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi/mspi_intr/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi/mspi_timing_tuning/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/private_include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/power_supply/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi_timing_tuning/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/etm/include + # ESP MM + ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm + ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/include + # ESP PHY + ${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/${CHIP_SERIES}/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/include + # ESP PM + ${ESP_HAL_3RDPARTY_REPO}/components/esp_pm + ${ESP_HAL_3RDPARTY_REPO}/components/esp_pm/include + # ESP ROM + ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom + ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES} + ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES}/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES}/include/${CHIP_SERIES} + # ESP System + ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/include/private + ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/public_compat + # ESP Timer + ${ESP_HAL_3RDPARTY_REPO}/components/esp_timer/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_timer/private_include + # ESP Wi-Fi + ${ESP_HAL_3RDPARTY_REPO}/components/esp_wifi/include + # ESP Security + ${ESP_HAL_3RDPARTY_REPO}/components/esp_security/include + # HAL + ${ESP_HAL_3RDPARTY_REPO}/components/hal/${CHIP_SERIES}/include + ${ESP_HAL_3RDPARTY_REPO}/components/hal/include + ${ESP_HAL_3RDPARTY_REPO}/components/hal/platform_port/include + # HAL sub-components (hal/*.h) + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/${CHIP_SERIES}/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_clock/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_clock/${CHIP_SERIES}/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/${CHIP_SERIES}/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/${CHIP_SERIES}/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2c/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2c/${CHIP_SERIES}/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/${CHIP_SERIES}/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/${CHIP_SERIES}/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/${CHIP_SERIES}/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/${CHIP_SERIES}/include + # ESP HAL PMU (for sleep_cpu: hal/rtc_hal.h) + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pmu/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pmu/${CHIP_SERIES}/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rtc_timer/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rtc_timer/${CHIP_SERIES}/include + # ESP HAL TIMG (for wdt: hal/timg_ll.h) + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_timg/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_timg/${CHIP_SERIES}/include + # ESP HAL UART (for sleep_uart: hal/uart_hal.h) + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/${CHIP_SERIES}/include + # ESP HAL WDT (for bootloader: hal/wdt_hal.h) + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_wdt/include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_wdt/${CHIP_SERIES}/include + # Heap + ${ESP_HAL_3RDPARTY_REPO}/components/heap/include + # Log + ${ESP_HAL_3RDPARTY_REPO}/components/log + ${ESP_HAL_3RDPARTY_REPO}/components/log/include + ${ESP_HAL_3RDPARTY_REPO}/components/log/src/log_level/tag_log_level + # mbedTLS (tf-psa-crypto builtin must come before mbedtls/include so + # mbedtls/private/* are found) + ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/include + ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/include/aes + ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/psa_driver/include + ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/mbedtls/tf-psa-crypto/drivers/builtin/include + ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/mbedtls/include + ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/mbedtls/tf-psa-crypto/core + ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/mbedtls/tf-psa-crypto/include + # Newlib / esp_libc + ${ESP_HAL_3RDPARTY_REPO}/components/newlib/priv_include + ${ESP_HAL_3RDPARTY_REPO}/components/esp_libc/priv_include + ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/components/esp_libc/platform_include + # RISC-V + ${ESP_HAL_3RDPARTY_REPO}/components/riscv/include + # SOC + ${ESP_HAL_3RDPARTY_REPO}/components/soc/include + ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/include + ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/register + # SPI Flash + ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/include + ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/include/spi_flash + ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/include/esp_flash_chips + ${ESP_HAL_3RDPARTY_REPO}/components/esp_blockdev/include) + +# Additional includes for simple boot +if(CONFIG_ESPRESSIF_SIMPLE_BOOT) + target_include_directories( + arch PRIVATE ${ESP_HAL_3RDPARTY_REPO}/components/esp_app_format/include) +endif() + +# ############################################################################## +# Linker Scripts +# ############################################################################## + +set(ESP_ROM_LD_DIR + ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES}/ld) +set(ESP_SOC_LD_DIR ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/ld) +set(ESP_RISCV_LD_DIR ${ESP_HAL_3RDPARTY_REPO}/components/riscv/ld) + +set(_esp32c2_rom_ld_files + ${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.api.ld + ${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.bt_funcs.ld + ${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.ld + ${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.libc.ld + ${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.libc-suboptimal_for_misaligned_mem.ld + ${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.libgcc.ld + ${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.newlib.ld + ${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.version.ld + ${ESP_SOC_LD_DIR}/${CHIP_SERIES}.peripherals.ld + ${ESP_RISCV_LD_DIR}/rom.api.ld) + +# Add these files to the GLOBAL PROPERTY LD_SCRIPT +set_property(GLOBAL APPEND PROPERTY LD_SCRIPT ${_esp32c2_rom_ld_files}) + +# ############################################################################## +# HAL Source Files +# ############################################################################## + +set(HAL_SRCS) + +# ESP ADC sources +list( + APPEND + HAL_SRCS + ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/adc_cali.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/${CHIP_SERIES}/adc_cali_line_fitting.c +) + +# Bootloader support sources +list( + APPEND HAL_SRCS + ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_init.c + ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_efuse.c) + +# EFUSE sources +list( + APPEND + HAL_SRCS + ${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/esp_efuse_api.c + ${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/esp_efuse_utility.c + ${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/esp_efuse_fields.c + ${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/esp_efuse_startup.c + ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/esp_efuse_fields.c + ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/esp_efuse_rtc_calib.c + ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/esp_efuse_table.c + ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/esp_efuse_utility.c + ${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/efuse_controller/keys/without_key_purposes/one_key_block/esp_efuse_api_key.c +) + +# ESP Common sources +list(APPEND HAL_SRCS + ${ESP_HAL_3RDPARTY_REPO}/components/esp_common/src/esp_err_to_name.c) + +# ESP HW Support sources +list( + APPEND + HAL_SRCS + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/adc_share_hw_ctrl.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/clk_ctrl_os.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/clk_utils.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/cpu.c + ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/src/gdma.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/esp_clk.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/esp_gpio_reserve.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/esp_memory_utils.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/hw_random.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/intr_alloc.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mac_addr.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/periph_ctrl.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/regi2c_ctrl.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/rtc_module.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_modes.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_uart.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_modem.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/esp_clk_tree_common.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/esp_clk_tree.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/esp_cpu_intr.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/cpu_region_protect.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/rtc_clk.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/rtc_clk_init.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/rtc_init.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/rtc_sleep.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/rtc_time.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/sar_periph_ctrl.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/systimer.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/power_supply/brownout.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_console.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_event.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_gpio.c) + +# ESP MM sources +list( + APPEND + HAL_SRCS + ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/esp_cache_msync.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/esp_mmu_map.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/esp_cache_utils.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/port/${CHIP_SERIES}/ext_mem_layout.c + ${ESP_HAL_3RDPARTY_REPO}/components/heap/port/${CHIP_SERIES}/memory_layout.c) + +# ESP PHY sources +list( + APPEND + HAL_SRCS + ${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/src/lib_printf.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/src/phy_common.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/src/phy_init.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/${CHIP_SERIES}/phy_init_data.c) + +# ESP PM sources +list(APPEND HAL_SRCS ${ESP_HAL_3RDPARTY_REPO}/components/esp_pm/pm_locks.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_pm/pm_impl.c) + +# ESP ROM sources +list( + APPEND + HAL_SRCS + ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_sys.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_print.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_crc.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_serial_output.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_spiflash.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_efuse.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_gpio.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_systimer.c) + +# ESP System sources +list( + APPEND + HAL_SRCS + ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/esp_err.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/esp_system.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/startup.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/startup_funcs.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/system_time.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/soc/${CHIP_SERIES}/clk.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/soc/${CHIP_SERIES}/system_internal.c +) + +# ESP Timer +list( + APPEND + HAL_SRCS + ${ESP_HAL_3RDPARTY_REPO}/components/esp_timer/src/esp_timer.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_timer/src/esp_timer_init.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_timer/src/esp_timer_impl_systimer.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_timer/src/system_time.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_timer/src/esp_timer_impl_common.c) + +# Make) HAL sources (paths from hal_esp32c2.mk: esp_hal_* and hal components) +list( + APPEND + HAL_SRCS + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/adc_hal_common.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/adc_oneshot_hal.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pmu/brownout_hal.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pmu/${CHIP_SERIES}/rtc_cntl_hal.c + ${ESP_HAL_3RDPARTY_REPO}/components/hal/cache_hal.c + ${ESP_HAL_3RDPARTY_REPO}/components/hal/efuse_hal.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/gpio_hal.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/gdma_hal_ahb_v1.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/gdma_hal_top.c + ${ESP_HAL_3RDPARTY_REPO}/components/hal/hal_utils.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/ledc_hal.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/ledc_hal_iram.c + ${ESP_HAL_3RDPARTY_REPO}/components/hal/systimer_hal.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_timg/timer_hal.c + ${ESP_HAL_3RDPARTY_REPO}/components/hal/mmu_hal.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2c/i2c_hal.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/sha_hal.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/spi_hal.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/spi_hal_iram.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/uart_hal.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/uart_hal_iram.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_wdt/wdt_hal_iram.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/spi_flash_hal.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/spi_flash_hal_iram.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/spi_flash_hal_gpspi.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/spi_flash_encrypt_hal_iram.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_clock/${CHIP_SERIES}/clk_tree_hal.c + ${ESP_HAL_3RDPARTY_REPO}/components/hal/${CHIP_SERIES}/efuse_hal.c) + +# Log sources +list( + APPEND + HAL_SRCS + ${ESP_HAL_3RDPARTY_REPO}/components/log/src/log.c + ${ESP_HAL_3RDPARTY_REPO}/components/log/src/log_level/log_level.c + ${ESP_HAL_3RDPARTY_REPO}/components/log/src/log_level/tag_log_level/tag_log_level.c + ${ESP_HAL_3RDPARTY_REPO}/components/log/src/log_level/tag_log_level/linked_list/log_linked_list.c + ${ESP_HAL_3RDPARTY_REPO}/components/log/src/noos/log_lock.c + ${ESP_HAL_3RDPARTY_REPO}/components/log/src/noos/log_timestamp.c + ${ESP_HAL_3RDPARTY_REPO}/components/log/src/os/log_write.c + ${ESP_HAL_3RDPARTY_REPO}/components/log/src/os/util.c) + +# RISC-V sources +list( + APPEND + HAL_SRCS + ${ESP_HAL_3RDPARTY_REPO}/components/riscv/instruction_decode.c + ${ESP_HAL_3RDPARTY_REPO}/components/riscv/interrupt.c + ${ESP_HAL_3RDPARTY_REPO}/components/riscv/interrupt_intc.c + ${ESP_HAL_3RDPARTY_REPO}/components/riscv/rv_utils.c) + +# SPI Flash sources +list( + APPEND + HAL_SRCS + ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_generic.c + ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_boya.c + ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_gd.c + ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_winbond.c + ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_issi.c + ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_mxic_opi.c + ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_mxic.c + ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_th.c + ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_drivers.c + ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/memspi_host_driver.c + ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/flash_brownout_hook.c) + +# Cache (relates to SPI Flash) + +set(CACHE_SRCS) +list( + APPEND + CACHE_SRCS + ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/cache_utils.c + ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/flash_mmap.c + ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/flash_ops.c + ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/esp_flash_api.c + ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/esp_flash_spi_init.c + ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_os_func_app.c + ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_os_func_noos.c + ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_wrap.c) + +list(APPEND HAL_SRCS ${CACHE_SRCS}) + +# Avoid cache miss by unexpected inlineing when built by -Os +set_source_files_properties( + ${CACHE_SRCS} DIRECTORY ../../../../ + PROPERTIES + COMPILE_FLAGS + "-fno-inline-functions -fno-inline-small-functions -fno-inline-functions-called-once" +) + +# SOC sources (paths from hal_esp32c2.mk: esp_hal_* periph and soc) +list( + APPEND + HAL_SRCS + ${ESP_HAL_3RDPARTY_REPO}/components/soc/lldesc.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/${CHIP_SERIES}/adc_periph.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/${CHIP_SERIES}/dedic_gpio_periph.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/${CHIP_SERIES}/gdma_periph.c + ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/gpio_periph.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/${CHIP_SERIES}/ledc_periph.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2c/${CHIP_SERIES}/i2c_periph.c + ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/interrupts.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/${CHIP_SERIES}/spi_periph.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/${CHIP_SERIES}/temperature_sensor_periph.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_timg/${CHIP_SERIES}/timer_periph.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/${CHIP_SERIES}/uart_periph.c) + +# ESP Security sources +list( + APPEND + HAL_SRCS + ${ESP_HAL_3RDPARTY_REPO}/components/esp_security/src/esp_crypto_lock.c + ${ESP_HAL_3RDPARTY_REPO}/components/esp_security/src/esp_crypto_periph_clk.c) + +# init) +list( + APPEND + HAL_SRCS + ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/platform/os.c + ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/heap_caps.c + ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/components/newlib/newlib/libc/misc/init.c + ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_gpio/src/gpio.c + ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_gpio/src/rtc_io.c + ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_uart/src/uart_wakeup.c) + +if(CONFIG_ESPRESSIF_WIFI OR CONFIG_ESPRESSIF_EMAC) + list(APPEND HAL_SRCS ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/esp_event.c) +endif() + +# Bootloader flash encrypt source +list(APPEND HAL_SRCS + ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/flash_encrypt.c) + +# Bootloader common +list( + APPEND HAL_SRCS + ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_mem.c) + +# ############################################################################## +# Simple Boot Sources +# ############################################################################## + +if(CONFIG_ESPRESSIF_SIMPLE_BOOT) + list( + APPEND + HAL_SRCS + ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/bootloader_banner_wrap.c + ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_console.c + ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_console_loader.c + ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/${CHIP_SERIES}/bootloader_${CHIP_SERIES}.c + ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_common.c + ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_common_loader.c + ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/bootloader_flash.c + ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_${CHIP_SERIES}.c + ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/flash_qio_mode.c + ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_clock_init.c + ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_random.c + ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_random_${CHIP_SERIES}.c + ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/esp_image_format.c + ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/${CHIP_SERIES}/bootloader_soc.c + ) + + target_link_options(nuttx PRIVATE -Wl,--wrap=bootloader_print_banner) + +elseif(CONFIG_ESPRESSIF_EFUSE_VIRTUAL_KEEP_IN_FLASH) + # Special case for bootloader_flash when using efuse virtual mode + list( + APPEND + HAL_SRCS + ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/bootloader_flash.c + ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_${CHIP_SERIES}.c + ) +endif() + +# ############################################################################## +# Add HAL sources to arch target +# ############################################################################## + +target_sources(arch PRIVATE ${HAL_SRCS}) diff --git a/arch/risc-v/src/esp32c2/hal_esp32c2.mk b/arch/risc-v/src/esp32c2/hal_esp32c2.mk new file mode 100644 index 0000000000000..81e906a61fe9c --- /dev/null +++ b/arch/risc-v/src/esp32c2/hal_esp32c2.mk @@ -0,0 +1,342 @@ +############################################################################ +# arch/risc-v/src/esp32c2/esp32c2.mk +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################ + +# Include header paths + +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)include$(DELIM)mbedtls +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)$(CHIP_SERIES)$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_driver_uart$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)private_include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)driver$(DELIM)spi$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)private_include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)private_include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)interface +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)$(CHIP_SERIES)$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_blockdev$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_common$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_event$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)$(CHIP_SERIES)$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_clock$(DELIM)$(CHIP_SERIES)$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_clock$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_dma$(DELIM)$(CHIP_SERIES)$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_dma$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpio$(DELIM)$(CHIP_SERIES)$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpio$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpspi$(DELIM)$(CHIP_SERIES)$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpspi$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_i2c$(DELIM)$(CHIP_SERIES)$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_i2c$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ledc$(DELIM)$(CHIP_SERIES)$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ledc$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mspi$(DELIM)$(CHIP_SERIES)$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mspi$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_pmu$(DELIM)$(CHIP_SERIES)$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_pmu$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_rtc_timer$(DELIM)$(CHIP_SERIES)$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_rtc_timer$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_security$(DELIM)$(CHIP_SERIES)$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_security$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_timg$(DELIM)$(CHIP_SERIES)$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_timg$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_uart$(DELIM)$(CHIP_SERIES)$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_uart$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_wdt$(DELIM)$(CHIP_SERIES)$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_wdt$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)dma$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)etm$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include$(DELIM)esp_private +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include$(DELIM)soc +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include$(DELIM)soc$(DELIM)$(CHIP_SERIES) +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi$(DELIM)mspi_intr$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi$(DELIM)mspi_timing_tuning$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)ldo$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)private_include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)power_supply$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi_timing_tuning$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)$(CHIP_SERIES)$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_pm +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_pm$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES) +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)include$(DELIM)$(CHIP_SERIES) +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_security$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)include$(DELIM)private +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)public_compat +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)private_include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_wifi$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)platform_port$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)heap$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)tag_log_level +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)port$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)port$(DELIM)include$(DELIM)aes +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)port$(DELIM)psa_driver$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)tf-psa-crypto$(DELIM)core +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)tf-psa-crypto$(DELIM)drivers$(DELIM)builtin$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)tf-psa-crypto$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_libc$(DELIM)priv_include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)register +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)include$(DELIM)esp_flash_chips +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)heap$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)src +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_gpio$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_uart$(DELIM)include +INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_libc$(DELIM)platform_include + +ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y) + INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_app_format$(DELIM)include +endif + +# Linker scripts + +ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.api.ld +ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.ble.ld +ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.ld +ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libc.ld +ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libc-suboptimal_for_misaligned_mem.ld +ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libgcc.ld +ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.newlib.ld +ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.mbedtls.ld +ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.version.ld +ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).peripherals.ld +ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)ld$(DELIM)rom.api.ld + +# Source files + +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)adc_cali.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)$(CHIP_SERIES)$(DELIM)adc_cali_line_fitting.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_init.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_efuse.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)esp_efuse_api.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)esp_efuse_utility.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)esp_efuse_fields.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)esp_efuse_startup.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_fields.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_rtc_calib.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_table.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_utility.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)efuse_controller$(DELIM)keys$(DELIM)without_key_purposes$(DELIM)one_key_block$(DELIM)esp_efuse_api_key.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_common$(DELIM)src$(DELIM)esp_err_to_name.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)adc_share_hw_ctrl.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)clk_ctrl_os.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)clk_utils.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)cpu.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)src$(DELIM)gdma.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)esp_clk.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)esp_gpio_reserve.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)esp_memory_utils.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)hw_random.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)intr_alloc.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mac_addr.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)periph_ctrl.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)regi2c_ctrl.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)rtc_module.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_modes.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_uart.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_modem.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)esp_clk_tree_common.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)esp_clk_tree.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)esp_cpu_intr.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)cpu_region_protect.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_clk.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_clk_init.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_init.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_sleep.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_time.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)sar_periph_ctrl.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)systimer.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)power_supply$(DELIM)brownout.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_console.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_event.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_gpio.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)esp_cache_msync.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)esp_mmu_map.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)esp_cache_utils.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)ext_mem_layout.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)src$(DELIM)lib_printf.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)src$(DELIM)phy_common.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)src$(DELIM)phy_init.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)$(CHIP_SERIES)$(DELIM)phy_init_data.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_pm$(DELIM)pm_locks.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_pm$(DELIM)pm_impl.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_sys.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_print.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_crc.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_serial_output.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_spiflash.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_efuse.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_gpio.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_systimer.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)esp_err.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)esp_system.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)startup.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)startup_funcs.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)system_time.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)src$(DELIM)esp_timer.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)src$(DELIM)esp_timer_init.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)src$(DELIM)esp_timer_impl_systimer.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)src$(DELIM)system_time.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)src$(DELIM)esp_timer_impl_common.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)clk.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)system_internal.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)adc_hal_common.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)adc_oneshot_hal.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_pmu$(DELIM)brownout_hal.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_pmu$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_cntl_hal.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)cache_hal.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)efuse_hal.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpio$(DELIM)gpio_hal.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_dma$(DELIM)gdma_hal_ahb_v1.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_dma$(DELIM)gdma_hal_top.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)hal_utils.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ledc$(DELIM)ledc_hal.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ledc$(DELIM)ledc_hal_iram.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)systimer_hal.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_timg$(DELIM)timer_hal.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)mmu_hal.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_i2c$(DELIM)i2c_hal.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_security$(DELIM)sha_hal.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpspi$(DELIM)spi_hal.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpspi$(DELIM)spi_hal_iram.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_uart$(DELIM)uart_hal.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_uart$(DELIM)uart_hal_iram.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_wdt$(DELIM)wdt_hal_iram.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mspi$(DELIM)spi_flash_hal.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mspi$(DELIM)spi_flash_hal_iram.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mspi$(DELIM)spi_flash_hal_gpspi.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mspi$(DELIM)spi_flash_encrypt_hal_iram.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_clock$(DELIM)$(CHIP_SERIES)$(DELIM)clk_tree_hal.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)efuse_hal.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)heap$(DELIM)port$(DELIM)${CHIP_SERIES}$(DELIM)memory_layout.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)log_level.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)tag_log_level$(DELIM)tag_log_level.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)tag_log_level$(DELIM)linked_list$(DELIM)log_linked_list.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)noos$(DELIM)log_lock.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)noos$(DELIM)log_timestamp.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)os$(DELIM)log_write.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)os$(DELIM)util.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)instruction_decode.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)interrupt.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)interrupt_intc.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_os_func_noos.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_os_func_app.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_chip_generic.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_chip_boya.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_chip_gd.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_chip_winbond.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_chip_issi.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_chip_mxic_opi.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_chip_mxic.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_chip_th.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)esp_flash_api.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)flash_ops.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_chip_drivers.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)memspi_host_driver.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)esp_flash_spi_init.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)flash_mmap.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)flash_brownout_hook.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)cache_utils.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)rv_utils.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)lldesc.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)$(CHIP_SERIES)$(DELIM)adc_periph.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpio$(DELIM)$(CHIP_SERIES)$(DELIM)dedic_gpio_periph.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_dma$(DELIM)$(CHIP_SERIES)$(DELIM)gdma_periph.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)gpio_periph.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ledc$(DELIM)$(CHIP_SERIES)$(DELIM)ledc_periph.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_i2c$(DELIM)$(CHIP_SERIES)$(DELIM)i2c_periph.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)interrupts.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpspi$(DELIM)$(CHIP_SERIES)$(DELIM)spi_periph.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)$(CHIP_SERIES)$(DELIM)temperature_sensor_periph.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_timg$(DELIM)$(CHIP_SERIES)$(DELIM)timer_periph.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_uart$(DELIM)${CHIP_SERIES}$(DELIM)uart_periph.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_security$(DELIM)src$(DELIM)esp_crypto_lock.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_security$(DELIM)src$(DELIM)esp_crypto_periph_clk.c + +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)platform$(DELIM)os.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)heap_caps.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)newlib$(DELIM)newlib$(DELIM)libc$(DELIM)misc$(DELIM)init.c + +ifneq ($(CONFIG_ESPRESSIF_WIFI)$(CONFIG_ESPRESSIF_EMAC),) + CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)esp_event.c +endif +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_gpio$(DELIM)src$(DELIM)gpio.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_gpio$(DELIM)src$(DELIM)rtc_io.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_uart$(DELIM)src$(DELIM)uart_wakeup.c + +# Bootloader files + +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)flash_encrypt.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_mem.c + +ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y) + CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)bootloader_banner_wrap.c + CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_console.c + CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_console_loader.c + CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)${CHIP_SERIES}$(DELIM)bootloader_${CHIP_SERIES}.c + CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_common.c + CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_common_loader.c + CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)src$(DELIM)bootloader_flash.c + CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)src$(DELIM)bootloader_flash_config_${CHIP_SERIES}.c + CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)src$(DELIM)flash_qio_mode.c + CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_clock_init.c + CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_random.c + CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_random_${CHIP_SERIES}.c + CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)esp_image_format.c + CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)${CHIP_SERIES}$(DELIM)bootloader_soc.c + + LDFLAGS += --wrap=bootloader_print_banner +else +ifeq ($(CONFIG_ESPRESSIF_EFUSE_VIRTUAL_KEEP_IN_FLASH),y) + # Special case for bootloader_flash when using efuse virtual mode + CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)src$(DELIM)bootloader_flash.c + CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)src$(DELIM)bootloader_flash_config_${CHIP_SERIES}.c +endif +endif diff --git a/boards/Kconfig b/boards/Kconfig index ea4bb7ef56ed8..f1970c03a2414 100644 --- a/boards/Kconfig +++ b/boards/Kconfig @@ -708,6 +708,14 @@ config ARCH_BOARD_ESP32C6_XIAO The XIAO-ESP32C6 from Seeed Studio features the ESP32-C6 CPU with two RISC-V cores, supporting IEEE 802.11 b/g/n/ax WiFi, and Bluetooth 5 (BLE) protocols. +config ARCH_BOARD_ESP8684_DEVKITM + bool "Espressif ESP8684-DevKitM" + depends on ARCH_CHIP_ESP32C2 + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + The ESP8684-DevKitM features the ESP32-C2 (ESP8684) CPU with a RISC-V core. + config ARCH_BOARD_ESP32H2_DEVKIT bool "Espressif ESP32-H2 Generic DevKit" depends on ARCH_CHIP_ESP32H2 @@ -3951,6 +3959,7 @@ config ARCH_BOARD default "esp32c6-devkitc" if ARCH_BOARD_ESP32C6_DEVKITC default "esp32c6-devkitm" if ARCH_BOARD_ESP32C6_DEVKITM default "esp32c6-xiao" if ARCH_BOARD_ESP32C6_XIAO + default "esp8684-devkitm" if ARCH_BOARD_ESP8684_DEVKITM default "esp32h2-devkit" if ARCH_BOARD_ESP32H2_DEVKIT default "esp32p4-function-ev-board" if ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD default "esp32p4-pico-wifi-wareshare" if ARCH_BOARD_ESP32P4_PICO_WIFI_WARESHARE @@ -5355,6 +5364,9 @@ endif #if ARCH_BOARD_ESP32C6_XIAO #source "boards/risc-v/esp32c6/esp32c6-xiao/Kconfig" #endif +if ARCH_BOARD_ESP8684_DEVKITM +source "boards/risc-v/esp32c2/esp8684-devkitm/Kconfig" +endif if ARCH_BOARD_ESP32H2_DEVKIT source "boards/risc-v/esp32h2/esp32h2-devkit/Kconfig" endif @@ -5521,6 +5533,9 @@ endif if ARCH_CHIP_ESP32C3_LEGACY source "boards/risc-v/esp32c3-legacy/common/Kconfig" endif +if ARCH_CHIP_ESP32C2 +source "boards/risc-v/esp32c2/common/Kconfig" +endif if ARCH_CHIP_ESP32C3 source "boards/risc-v/esp32c3/common/Kconfig" endif diff --git a/boards/risc-v/esp32c2/common/.gitignore b/boards/risc-v/esp32c2/common/.gitignore new file mode 100644 index 0000000000000..cc92d189b53c2 --- /dev/null +++ b/boards/risc-v/esp32c2/common/.gitignore @@ -0,0 +1,2 @@ +etctmp +etctmp.c diff --git a/boards/risc-v/esp32c2/common/CMakeLists.txt b/boards/risc-v/esp32c2/common/CMakeLists.txt new file mode 100644 index 0000000000000..f2cf4ae4486c4 --- /dev/null +++ b/boards/risc-v/esp32c2/common/CMakeLists.txt @@ -0,0 +1,24 @@ +# ############################################################################## +# boards/risc-v/esp32c2/common/CMakeLists.txt +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more contributor +# license agreements. See the NOTICE file distributed with this work for +# additional information regarding copyright ownership. The ASF licenses this +# file to you under the Apache License, Version 2.0 (the "License"); you may not +# use this file except in compliance with the License. You may obtain a copy of +# the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations under +# the License. +# +# ############################################################################## + +add_subdirectory(src) +target_include_directories(board PRIVATE include) diff --git a/boards/risc-v/esp32c2/common/Kconfig b/boards/risc-v/esp32c2/common/Kconfig new file mode 100644 index 0000000000000..6d2c5f9495e05 --- /dev/null +++ b/boards/risc-v/esp32c2/common/Kconfig @@ -0,0 +1,58 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +config ESPRESSIF_MERGE_BINS + bool "Merge raw binary files into a single file" + default n + ---help--- + Merge the raw binary files into a single file for flashing to the + device. + This is only useful when the path to binary files (e.g. bootloader) + is provided via the ESPTOOL_BINDIR variable. + +config ESPRESSIF_SPIFLASH_AUTO_BRINGUP + bool "Automatic mount of SPI Flash MTD" + default y + depends on ESPRESSIF_MTD + ---help--- + Auto bring-up the SPI Flash MTD on board bring-up. + If not selected, the MTD will be registered as a device node on /dev. + +choice ESPRESSIF_SPIFLASH_FS + prompt "File system to mount on SPI Flash MTD" + default ESPRESSIF_SPIFLASH_SMARTFS + depends on ESPRESSIF_SPIFLASH_AUTO_BRINGUP + optional + ---help--- + Mount the SPI Flash MTD with the selected File System format on board + bring-up. + If not selected, the MTD will be registered as a device node on /dev. + +config ESPRESSIF_SPIFLASH_SMARTFS + bool "SmartFS" + select FS_SMARTFS + select MTD_SMART + +config ESPRESSIF_SPIFLASH_NXFFS + bool "NXFFS" + select FS_NXFFS + +config ESPRESSIF_SPIFLASH_SPIFFS + bool "SPIFFS" + select FS_SPIFFS + +config ESPRESSIF_SPIFLASH_LITTLEFS + bool "LittleFS" + select FS_LITTLEFS + +config ESPRESSIF_SPIFLASH_MTD_CONFIG + bool "Non-volatile storage" + +endchoice # ESPRESSIF_SPIFLASH_FS + +config ESPRESSIF_SPIFLASH_FS_MOUNT_PT + string "File-system Mount Point" + depends on ESPRESSIF_SPIFLASH_SMARTFS || ESPRESSIF_SPIFLASH_NXFFS || ESPRESSIF_SPIFLASH_SPIFFS || ESPRESSIF_SPIFLASH_LITTLEFS + default "/data" diff --git a/boards/risc-v/esp32c2/common/Makefile b/boards/risc-v/esp32c2/common/Makefile new file mode 100644 index 0000000000000..878b58c4d3b69 --- /dev/null +++ b/boards/risc-v/esp32c2/common/Makefile @@ -0,0 +1,35 @@ +############################################################################# +# boards/risc-v/esp32c3/common/Makefile +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################# + +include $(TOPDIR)/Make.defs + +include board/Make.defs +include src/Make.defs + +DEPPATH += --dep-path board +DEPPATH += --dep-path src + +include $(TOPDIR)/boards/Board.mk + +ARCHSRCDIR = $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src +BOARDDIR = $(ARCHSRCDIR)$(DELIM)board +CFLAGS += ${INCDIR_PREFIX}$(BOARDDIR)$(DELIM)include diff --git a/boards/risc-v/esp32c2/common/include/esp_board_adc.h b/boards/risc-v/esp32c2/common/include/esp_board_adc.h new file mode 100644 index 0000000000000..c5f7845b03c10 --- /dev/null +++ b/boards/risc-v/esp32c2/common/include/esp_board_adc.h @@ -0,0 +1,79 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/common/include/esp_board_adc.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP32C2_BOARD_ADC_H +#define __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP32C2_BOARD_ADC_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: board_adc_init + * + * Description: + * This function configures and initializes the ADC driver for the board. + * It allocates memory for the ADC device structure, sets up the ADC + * hardware, and registers the ADC device with the system. + * + * Input Parameters: + * None. + * + * Returned Value: + * Returns zero (OK) on successful initialization and registration of the + * ADC device; a negated errno value is returned to indicate the nature + * of any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_ESPRESSIF_ADC +int board_adc_init(void); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP32C2_BOARD_ADC_H */ diff --git a/boards/risc-v/esp32c2/common/include/esp_board_bmp180.h b/boards/risc-v/esp32c2/common/include/esp_board_bmp180.h new file mode 100644 index 0000000000000..c9cb04024139b --- /dev/null +++ b/boards/risc-v/esp32c2/common/include/esp_board_bmp180.h @@ -0,0 +1,76 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/common/include/esp_board_bmp180.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_BMP180_H +#define __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_BMP180_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: board_bmp180_initialize + * + * Description: + * Initialize and register the BMP180 Pressure Sensor driver. + * + * Input Parameters: + * devno - The device number, used to build the device path as /dev/pressN + * + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +#ifdef CONFIG_SENSORS_BMP180 +int board_bmp180_initialize(int devno); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_BMP180_H */ diff --git a/boards/risc-v/esp32c2/common/include/esp_board_bmp280.h b/boards/risc-v/esp32c2/common/include/esp_board_bmp280.h new file mode 100644 index 0000000000000..3fa0d3044923e --- /dev/null +++ b/boards/risc-v/esp32c2/common/include/esp_board_bmp280.h @@ -0,0 +1,76 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/common/include/esp_board_bmp280.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_BMP280_H +#define __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_BMP280_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: board_bmp280_initialize + * + * Description: + * Initialize and register the BMP280 Pressure Sensor driver. + * + * Input Parameters: + * devno - The device number, used to build the device path as /dev/pressN + * + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +#ifdef CONFIG_SENSORS_BMP280 +int board_bmp280_initialize(int devno); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_BMP280_H */ diff --git a/boards/risc-v/esp32c2/common/include/esp_board_i2c.h b/boards/risc-v/esp32c2/common/include/esp_board_i2c.h new file mode 100644 index 0000000000000..d15cca9a27dff --- /dev/null +++ b/boards/risc-v/esp32c2/common/include/esp_board_i2c.h @@ -0,0 +1,76 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/common/include/esp_board_i2c.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_I2C_H +#define __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_I2C_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: board_i2c_init + * + * Description: + * Configure the I2C driver. + * + * Input Parameters: + * None. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_I2C +int board_i2c_init(void); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_I2C_H */ diff --git a/boards/risc-v/esp32c2/common/include/esp_board_ledc.h b/boards/risc-v/esp32c2/common/include/esp_board_ledc.h new file mode 100644 index 0000000000000..1702e022b3c4f --- /dev/null +++ b/boards/risc-v/esp32c2/common/include/esp_board_ledc.h @@ -0,0 +1,76 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/common/include/esp_board_ledc.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_LEDC_H +#define __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_LEDC_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: board_ledc_setup + * + * Description: + * Initialize LEDC PWM and register the PWM device. + * + * Input Parameters: + * None. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_ESPRESSIF_LEDC +int board_ledc_setup(void); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_LEDC_H */ diff --git a/boards/risc-v/esp32c2/common/include/esp_board_mmcsd.h b/boards/risc-v/esp32c2/common/include/esp_board_mmcsd.h new file mode 100644 index 0000000000000..86eddbca271fa --- /dev/null +++ b/boards/risc-v/esp32c2/common/include/esp_board_mmcsd.h @@ -0,0 +1,76 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/common/include/esp_board_mmcsd.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_MMCSD_H +#define __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_MMCSD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: esp_mmcsd_spi_initialize + * + * Description: + * Initialize SPI-based SD card. + * + * Input Parameters: + * None. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_MMCSD_SPI +int esp_mmcsd_spi_initialize(void); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_MMCSD_H */ diff --git a/boards/risc-v/esp32c2/common/include/esp_board_rng90.h b/boards/risc-v/esp32c2/common/include/esp_board_rng90.h new file mode 100644 index 0000000000000..31864c2b230ad --- /dev/null +++ b/boards/risc-v/esp32c2/common/include/esp_board_rng90.h @@ -0,0 +1,74 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/common/include/esp_board_rng90.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_RNG90_H +#define __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_RNG90_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: board_rng90_initialize + * + * Description: + * Initialize and register the RNG90 True Random Number Generator driver. + * + * Input Parameters: + * devno - The device number, used to build the device path as /dev/rngN + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + ****************************************************************************/ + +#ifdef CONFIG_DEV_RNG90 +int board_rng90_initialize(int devno); +#endif /* CONFIG_DEV_RNG90 */ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_RNG90_H */ \ No newline at end of file diff --git a/boards/risc-v/esp32c2/common/include/esp_board_spidev.h b/boards/risc-v/esp32c2/common/include/esp_board_spidev.h new file mode 100644 index 0000000000000..3bebd6bd1e8c9 --- /dev/null +++ b/boards/risc-v/esp32c2/common/include/esp_board_spidev.h @@ -0,0 +1,80 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/common/include/esp_board_spidev.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_RISC_V_ESP32C2_COMMON_INCLUDE_ESP_BOARD_SPIDEV_H +#define __BOARDS_RISC_V_ESP32C2_COMMON_INCLUDE_ESP_BOARD_SPIDEV_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: board_spidev_initialize + * + * Description: + * Initialize SPI driver and register the /dev/spi device. + * + * Input Parameters: + * bus - The SPI bus number, used to build the device path as /dev/spiN + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_SPI +int board_spidev_initialize(int bus); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __BOARDS_RISC_V_ESP32C2_COMMON_INCLUDE_ESP_BOARD_SPIDEV_H */ diff --git a/boards/risc-v/esp32c2/common/include/esp_board_spiflash.h b/boards/risc-v/esp32c2/common/include/esp_board_spiflash.h new file mode 100644 index 0000000000000..805278602c672 --- /dev/null +++ b/boards/risc-v/esp32c2/common/include/esp_board_spiflash.h @@ -0,0 +1,76 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/common/include/esp_board_spiflash.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_SPIFLASH_H +#define __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_SPIFLASH_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: board_spiflash_init + * + * Description: + * Initialize the SPIFLASH and register the MTD device. + * + * Input Parameters: + * None. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_ESPRESSIF_SPIFLASH +int board_spiflash_init(void); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_SPIFLASH_H */ diff --git a/boards/risc-v/esp32c2/common/include/esp_board_spislavedev.h b/boards/risc-v/esp32c2/common/include/esp_board_spislavedev.h new file mode 100644 index 0000000000000..1f9c34efc44dc --- /dev/null +++ b/boards/risc-v/esp32c2/common/include/esp_board_spislavedev.h @@ -0,0 +1,76 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/common/include/esp_board_spislavedev.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_SPISLAVEDEV_H +#define __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_SPISLAVEDEV_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: board_spislavedev_initialize + * + * Description: + * Initialize SPI Slave driver and register the /dev/spislv device. + * + * Input Parameters: + * bus - The SPI bus number, used to build the device path as /dev/spislvN + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_SLAVE +int board_spislavedev_initialize(int bus); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_SPISLAVEDEV_H */ diff --git a/boards/risc-v/esp32c2/common/include/esp_board_wlan.h b/boards/risc-v/esp32c2/common/include/esp_board_wlan.h new file mode 100644 index 0000000000000..e086449d38815 --- /dev/null +++ b/boards/risc-v/esp32c2/common/include/esp_board_wlan.h @@ -0,0 +1,75 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/common/include/esp_board_wlan.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_WLAN_H +#define __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_WLAN_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef CONFIG_ESPRESSIF_WIFI + +/**************************************************************************** + * Name: board_wlan_init + * + * Description: + * Configure the wireless subsystem. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +int board_wlan_init(void); + +#endif /* CONFIG_ESPRESSIF_WIFI */ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __BOARDS_RISCV_ESP32C2_COMMON_INCLUDE_ESP_BOARD_WLAN_H */ diff --git a/boards/risc-v/esp32c2/common/scripts/.gitignore b/boards/risc-v/esp32c2/common/scripts/.gitignore new file mode 100644 index 0000000000000..0fa3d8108a58d --- /dev/null +++ b/boards/risc-v/esp32c2/common/scripts/.gitignore @@ -0,0 +1 @@ +/*.ld.tmp diff --git a/boards/risc-v/esp32c2/common/scripts/common.ld b/boards/risc-v/esp32c2/common/scripts/common.ld new file mode 100644 index 0000000000000..824bc02714bd8 --- /dev/null +++ b/boards/risc-v/esp32c2/common/scripts/common.ld @@ -0,0 +1,37 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/common/scripts/common.ld + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ +#include + +#if CONFIG_ESPRESSIF_SOC_RTC_MEM_SUPPORTED +# define ESP_BOOTLOADER_RESERVE_RTC 0 + + /* rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files). + * For rtc_timer_data_in_rtc_mem section. + */ +# define RTC_TIMER_RESERVE_RTC (24) + +# ifdef CONFIG_ARCH_CHIP_ESP32 +# define RESERVE_RTC_MEM (RTC_TIMER_RESERVE_RTC) +# else +# define RESERVE_RTC_MEM (ESP_BOOTLOADER_RESERVE_RTC + RTC_TIMER_RESERVE_RTC) +# endif /* CONFIG_ARCH_CHIP_ESP32 */ +#endif /* CONFIG_ESPRESSIF_SOC_RTC_MEM_SUPPORTED */ diff --git a/boards/risc-v/esp32c2/common/scripts/esp32c2_aliases.ld b/boards/risc-v/esp32c2/common/scripts/esp32c2_aliases.ld new file mode 100644 index 0000000000000..5b59506a2f9a0 --- /dev/null +++ b/boards/risc-v/esp32c2/common/scripts/esp32c2_aliases.ld @@ -0,0 +1,30 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/common/scripts/esp32c2_aliases.ld + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +cache_set_idrom_mmu_size = Cache_Set_IDROM_MMU_Size; +cache_dbus_mmu_set = Cache_Dbus_MMU_Set; +cache_ibus_mmu_set = Cache_Ibus_MMU_Set; +cache_invalidate_icache_all = Cache_Invalidate_ICache_All; +cache_resume_icache = Cache_Resume_ICache; +cache_suspend_icache = Cache_Suspend_ICache; +cache_invalidate_icache_all = Cache_Invalidate_ICache_All; +_interrupt_handler = exception_common; diff --git a/boards/risc-v/esp32c2/common/scripts/esp32c2_flat_memory.ld b/boards/risc-v/esp32c2/common/scripts/esp32c2_flat_memory.ld new file mode 100644 index 0000000000000..5cb5c6d400ad5 --- /dev/null +++ b/boards/risc-v/esp32c2/common/scripts/esp32c2_flat_memory.ld @@ -0,0 +1,106 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/scripts/esp32c2_flat_memory.ld + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * ESP32-C2 Linker Script Memory Layout + * + * This file describes the memory layout (memory blocks) as virtual + * memory addresses. + * + * esp32c2__sections.ld contains output sections to link + * compiler output into these memory blocks. + * + ****************************************************************************/ + +#include "common.ld" +#include "esp32c2_aliases.ld" + +#define SRAM_IRAM_START 0x4037C000 +#define SRAM_DRAM_START 0x3FCA0000 + +/* ICache size is fixed to 16KB on ESP32-C2 */ + +#define ICACHE_SIZE 0x4000 +#define I_D_SRAM_OFFSET (SRAM_IRAM_START - SRAM_DRAM_START + ICACHE_SIZE) + +/* 2nd stage bootloader iram_loader_seg start address */ + +#define SRAM_DRAM_END (0x403AEB70 - I_D_SRAM_OFFSET) + +#define SRAM_IRAM_ORG (SRAM_IRAM_START + ICACHE_SIZE) +#define SRAM_DRAM_ORG (SRAM_DRAM_START) + +#define I_D_SRAM_SIZE (SRAM_DRAM_END - SRAM_DRAM_ORG) + +#ifdef CONFIG_ESPRESSIF_FLASH_2M +# define FLASH_SIZE 0x200000 +#elif defined (CONFIG_ESPRESSIF_FLASH_4M) +# define FLASH_SIZE 0x400000 +#elif defined (CONFIG_ESPRESSIF_FLASH_8M) +# define FLASH_SIZE 0x800000 +#elif defined (CONFIG_ESPRESSIF_FLASH_16M) +# define FLASH_SIZE 0x1000000 +#endif + +MEMORY +{ +#ifdef CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT + metadata (RX) : org = CONFIG_ESPRESSIF_APP_MCUBOOT_HEADER_SIZE, len = 0x60 + ROM (RX) : org = ORIGIN(metadata) + LENGTH(metadata), + len = FLASH_SIZE - ORIGIN(ROM) +#elif defined (CONFIG_ESPRESSIF_SIMPLE_BOOT) + ROM (RX) : org = ORIGIN(ROM), + len = FLASH_SIZE - ORIGIN(ROM) +#endif + + iram0_0_seg (RX) : org = SRAM_IRAM_ORG, len = I_D_SRAM_SIZE + +#ifdef CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT + irom0_0_seg (RX) : org = 0x42000000, len = FLASH_SIZE +#else + irom0_0_seg (RX) : org = 0x42000000, len = FLASH_SIZE +#endif + + dram0_0_seg (RW) : org = SRAM_DRAM_ORG, len = I_D_SRAM_SIZE + +#ifdef CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT + drom0_0_seg (R) : org = 0x3c000000 + ORIGIN(ROM), + len = FLASH_SIZE - ORIGIN(ROM) +#else + drom0_0_seg (R) : org = 0x3c000000, len = FLASH_SIZE +#endif + + rtc_iram_seg(RWX) : org = 0x50000000, len = 0x2000 - RESERVE_RTC_MEM + rtc_reserved_seg(RW) : org = 0x50000000 + 0x2000 - RESERVE_RTC_MEM, len = RESERVE_RTC_MEM +} + +REGION_ALIAS("rtc_data_seg", rtc_iram_seg ); +REGION_ALIAS("rtc_slow_seg", rtc_iram_seg ); +REGION_ALIAS("rtc_data_location", rtc_iram_seg ); + +#if CONFIG_ESPRESSIF_RUN_IRAM + REGION_ALIAS("default_rodata_seg", dram0_0_seg); + REGION_ALIAS("default_code_seg", iram0_0_seg); +#else + REGION_ALIAS("default_rodata_seg", drom0_0_seg); + REGION_ALIAS("default_code_seg", irom0_0_seg); +#endif /* CONFIG_ESPRESSIF_RUN_IRAM */ diff --git a/boards/risc-v/esp32c2/common/scripts/esp32c2_legacy_sections.ld b/boards/risc-v/esp32c2/common/scripts/esp32c2_legacy_sections.ld new file mode 100644 index 0000000000000..95921576e580c --- /dev/null +++ b/boards/risc-v/esp32c2/common/scripts/esp32c2_legacy_sections.ld @@ -0,0 +1,297 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/common/scripts/esp32c2_legacy_sections.ld + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Default entry point: */ + +ENTRY(__start); + +SECTIONS +{ + .iram0.text : + { + _iram_start = ABSOLUTE(.); + + /* Vectors go to start of IRAM */ + + KEEP(*(.exception_vectors.text)); + . = ALIGN(4); + + *(.iram1) + *(.iram1.*) + + *libarch.a:brownout.*(.text .text.* .literal .literal.*) + *libarch.a:cpu.*(.text .text.* .literal .literal.*) + *libarch.a:gpio_hal.*(.text .text.* .literal .literal.*) + *libarch.a:periph_ctrl.*(.text .text.* .literal .literal.*) + *libarch.a:rtc_clk.*(.text .text.* .literal .literal.*) + *libarch.a:rtc_sleep.*(.text .text.* .literal .literal.*) + *libarch.a:rtc_time.*(.text .text.* .literal .literal.*) + *libarch.a:systimer.*(.text .text.* .literal .literal.*) + *libarch.a:systimer_hal.*(.text .text.* .literal .literal.*) + *libarch.a:uart_hal_iram.*(.text .text.* .literal .literal.*) + *libarch.a:wdt_hal_iram.*(.text .text.* .literal .literal.*) + *libsched.a:irq_dispatch.*(.text .text.* .literal .literal.*) + *libc.a:sq_remlast.*(.literal .text .literal.* .text.*) + } >iram0_0_seg + + /* This section is required to skip .iram0.text area because iram0_0_seg + * and dram0_0_seg reflect the same address space on different buses. + */ + + .dram0.dummy (NOLOAD): + { + . = ORIGIN(dram0_0_seg) + _iram_end - _iram_start; + } >dram0_0_seg + + .noinit (NOLOAD): + { + /* This section contains data that is not initialized during load, + * or during the application's initialization sequence. + */ + + *(.noinit) + *(.noinit.*) + } >dram0_0_seg + + .dram0.data : + { + _sdata = ABSOLUTE(.); + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.data1) + __global_pointer$ = . + 0x800; + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + *(.jcr) + *(.dram1) + *(.dram1.*) + + *libarch.a:brownout.*(.rodata .rodata.*) + *libarch.a:cpu.*(.rodata .rodata.*) + *libarch.a:gpio_hal.*(.rodata .rodata.*) + *libarch.a:periph_ctrl.*(.rodata .rodata.*) + *libarch.a:rtc_clk.*(.rodata .rodata.*) + *libarch.a:rtc_sleep.*(.rodata .rodata.*) + *libarch.a:rtc_time.*(.rodata .rodata.*) + *libarch.a:systimer.*(.rodata .rodata.*) + *libarch.a:systimer_hal.*(.rodata .rodata.*) + *libarch.a:uart_hal_iram.*(.rodata .rodata.*) + *libarch.a:wdt_hal_iram.*(.rodata .rodata.*) + *libsched.a:irq_dispatch.*(.rodata .rodata.*) + . = ALIGN(4); + _edata = ABSOLUTE(.); + } >dram0_0_seg + + /* Shared RAM */ + + .dram0.bss (NOLOAD) : + { + . = ALIGN (8); + _sbss = ABSOLUTE(.); + *(.dynsbss) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + *(.dynbss) + *(.bss) + *(.bss.*) + *(.share.mem) + *(.gnu.linkonce.b.*) + *(COMMON) + + . = ALIGN (8); + _ebss = ABSOLUTE(.); + } >dram0_0_seg + + .flash.text : + { + _stext = .; + + *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */ + *(.fini.literal) + *(.fini) + *(.gnu.version) + _etext = .; + + /* Similar to _iram_start, this symbol goes here so it is + * resolved by addr2line in preference to the first symbol in + * the flash.text segment. + */ + + _flash_cache_start = ABSOLUTE(0); + } >default_code_seg + + .flash_rodata_dummy (NOLOAD): + { + /* Start at the same alignment constraint than .flash.text */ + + . = ALIGN(ALIGNOF(.flash.text)); + + /* Create an empty gap as big as .flash.text section */ + + . = . + SIZEOF(.flash.text); + + /* Prepare the alignment of the section above. Few bytes (0x20) must be + * added for the mapping header. + */ + + . = ALIGN(0x10000) + 0x20; + } >default_rodata_seg + + .flash.rodata : ALIGN(0x10) + { + _srodata = ABSOLUTE(.); + + *(.rodata) + *(.rodata.*) + + *(.srodata.*) + + *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */ + *(.gnu.linkonce.r.*) + *(.rodata1) + __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); + *(.xt_except_table) + *(.gcc_except_table .gcc_except_table.*) + *(.gnu.linkonce.e.*) + *(.gnu.version_r) + . = (. + 3) & ~ 3; + __eh_frame = ABSOLUTE(.); + KEEP(*(.eh_frame)) + . = (. + 7) & ~ 3; + + /* C++ constructor and destructor tables: + * RISC-V GCC is configured with --enable-initfini-array so it emits an + * .init_array section instead. + */ + + _sinit = ABSOLUTE(.); + KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array.*)) + KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array)) + _einit = ABSOLUTE(.); + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + + /* C++ exception handlers table: */ + + __XT_EXCEPTION_DESCS_ = ABSOLUTE(.); + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + *(.dynamic) + *(.gnu.version_d) + _erodata = ABSOLUTE(.); + + /* Literals are also RO data. */ + + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + . = ALIGN(4); + } >default_rodata_seg + + /* Marks the end of IRAM code segment */ + + .iram0.text_end (NOLOAD) : + { + . = ALIGN (16); + } >iram0_0_seg + + .iram0.data : + { + . = ALIGN(16); + *(.iram.data) + *(.iram.data*) + } >iram0_0_seg + + .iram0.bss (NOLOAD) : + { + . = ALIGN(16); + *(.iram.bss) + *(.iram.bss*) + + . = ALIGN(16); + _iram_end = ABSOLUTE(.); + } >iram0_0_seg + + /* RTC fast memory holds RTC wake stub code !*/ + + .rtc.text : + { + . = ALIGN(4); + *(.rtc.literal .rtc.text) + } >rtc_iram_seg + + /* RTC BSS section. */ + + .rtc.bss (NOLOAD) : + { + *(.rtc.bss) + } >rtc_iram_seg + + /* RTC data section holds RTC wake stub data/rodata. */ + + .rtc.data : + { + *(.rtc.data) + *(.rtc.data.*) + *(.rtc.rodata) + *(.rtc.rodata.*) + } >rtc_iram_seg + + /* This section holds RTC data that should have fixed addresses. + * The data are not initialized at power-up and are retained during deep sleep. + */ + .rtc_reserved (NOLOAD): + { + . = ALIGN(4); + _rtc_reserved_start = ABSOLUTE(.); + /* New data can only be added here to ensure existing data are not moved. + Because data have adhered to the end of the segment and code is relied on it. + >> put new data here << */ + + *(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*) + KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*)) + _rtc_reserved_end = ABSOLUTE(.); + } > rtc_reserved_seg + + _rtc_reserved_length = _rtc_reserved_end - _rtc_reserved_start; + ASSERT((_rtc_reserved_length <= LENGTH(rtc_reserved_seg)), + "RTC reserved segment data does not fit.") + +} + diff --git a/boards/risc-v/esp32c2/common/scripts/esp32c2_sections.ld b/boards/risc-v/esp32c2/common/scripts/esp32c2_sections.ld new file mode 100644 index 0000000000000..e61ad4cc59d1f --- /dev/null +++ b/boards/risc-v/esp32c2/common/scripts/esp32c2_sections.ld @@ -0,0 +1,656 @@ +/**************************************************************************** + * boards/risc-v/espressif/common/scripts/esp32c2_sections.ld + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#include "common.ld" + +/* Default entry point: */ + +ENTRY(__start); + +SECTIONS +{ +#ifdef CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT + .metadata : + { + /* The following metadata refers to the to MCUboot's struct + * esp_image_load_header defined at the following commit: + * https://github.com/mcu-tools/mcuboot/blob/cd22b693da426826e0255f8ee5b18d7360d9bc8f/boot/espressif/hal/include/esp_mcuboot_image.h + */ + + /* Magic for load header */ + + LONG(0xace637d3) + + /* Application entry point address */ + + KEEP(*(.entry_addr)) + + /* IRAM metadata: + * - Destination address (VMA) for IRAM region + * - Flash offset (LMA) for start of IRAM region + * - Size of IRAM region + */ + + LONG(ADDR(.iram0.text)) + LONG(LOADADDR(.iram0.text)) + LONG(SIZEOF(.iram0.text)) + + /* DRAM metadata: + * - Destination address (VMA) for DRAM region + * - Flash offset (LMA) for start of DRAM region + * - Size of DRAM region + */ + + LONG(ADDR(.dram0.data)) + LONG(LOADADDR(.dram0.data)) + LONG(SIZEOF(.dram0.data)) + + /* RTC_IRAM metadata: + * - Destination address (VMA) for RTC_IRAM region + * - Flash offset (LMA) for start of RTC_IRAM region + * - Size of RTC_IRAM region + */ + + LONG(ADDR(.rtc.text)) + LONG(LOADADDR(.rtc.text)) + LONG(SIZEOF(.rtc.text)) + + /* RTC_DRAM metadata: + * - Destination address (VMA) for RTC_DRAM region + * - Flash offset (LMA) for start of RTC_DRAM region + * - Size of RTC_DRAM region + */ + + LONG(ADDR(.rtc.data)) + LONG(LOADADDR(.rtc.data)) + LONG(SIZEOF(.rtc.data)) + + /* IROM metadata: + * - Destination address (VMA) for IROM region + * - Flash offset (LMA) for start of IROM region + * - Size of IROM region + */ + + LONG(ADDR(.flash.text)) + LONG(LOADADDR(.flash.text)) + LONG(SIZEOF(.flash.text)) + + /* DROM metadata: + * - Destination address (VMA) for DROM region + * - Flash offset (LMA) for start of DROM region + * - Size of DROM region + */ + + LONG(ADDR(.flash.rodata)) + LONG(LOADADDR(.flash.rodata)) + LONG(LOADADDR(.flash.rodata) + SIZEOF(.flash.rodata) - LOADADDR(.flash.rodata)) + } >metadata +#endif + + .iram0.text : + { + _iram_start = ABSOLUTE(.); + + /* Vectors go to start of IRAM */ + + KEEP(*(.exception_vectors.text)); + . = ALIGN(4); + + *(.iram1) + *(.iram1.*) + +#ifdef CONFIG_ESPRESSIF_BLE + /* BLE controller (libble_app.a) uses custom section names for the code + * that must run from IRAM. Collect them here so elf2image does not see + * one ESP segment per input section. + */ + + *(.isr_iram1) + *(.isr_iram1.*) + *(.conn_iram1) + *(.conn_iram1.*) + *(.sleep_iram1) + *(.sleep_iram1.*) + *(.ble_log_iram1) + *(.ble_log_iram1.*) +#endif + + *libcoexist.a:(.coexiram .coexiram.*) + + *libpp.a:wifi_iram.*(.literal .text .literal.* .text.*) + *libpp.a:wifi_rx_iram.*(.literal .text .literal.* .text.*) + *libpp.a:wifi_extra_iram.*(.literal .text .literal.* .text.*) + *libpp.a:wifi_slp_iram.*(.literal .text .literal.* .text.*) + *libpp.a:wifi_or_slp_iram.*(.literal .text .literal.* .text.*) + *libpp.a:wifi_slp_rx_iram.*(.literal .text .literal.* .text.*) + + *libsched.a:irq_dispatch.*(.text .text.* .literal .literal.*) + *libsched.a:sched_lock.*(.text .text.* .literal .literal.*) + *libsched.a:sched_unlock.*(.text .text.* .literal .literal.*) + + *libarch.a:*(.text.esprv_intc_int_get_type .literal.esprv_intc_int_get_type) + *libarch.a:*riscv_doirq.*(.text .text.* .literal .literal.*) + *libarch.a:*brownout.*(.text .text.* .literal .literal.*) + *libarch.a:*cpu.*(.text .text.* .literal .literal.*) + *libarch.a:*gpio_hal.*(.text .text.* .literal .literal.*) + *libarch.a:*periph_ctrl.*(.text .text.* .literal .literal.*) + *libarch.a:*clk.*(.text .text.* .literal .literal.*) + *libarch.a:*esp_clk.*(.text .text.* .literal .literal.*) + *libarch.a:*esp_clk_tree.*(.text .text.* .literal .literal.*) + *libarch.a:*esp_clk_tree_common.*(.text .text.* .literal .literal.*) + *libarch.a:*clk_tree_hal.*(.text .text.* .literal .literal.*) + *libarch.a:*rtc_init.*(.text .text.* .literal .literal.*) + *libarch.a:*regi2c_ctrl.*(.text .text.* .literal .literal.*) + *libarch.a:*gpio_periph.*(.text .text.* .literal .literal.*) + *libarch.a:*rtc_clk.*(.text .text.* .literal .literal.*) + *libarch.a:*rtc_clk_init.*(.text .text.* .literal .literal.*) + *libarch.a:*rtc_sleep.*(.text .text.* .literal .literal.*) + *libarch.a:*rtc_time.*(.text .text.* .literal .literal.*) + *libarch.a:*systimer.*(.text .text.* .literal .literal.*) + *libarch.a:*systimer_hal.*(.text .text.* .literal .literal.*) + *libarch.a:*uart_hal_iram.*(.text .text.* .literal .literal.*) + *libarch.a:*wdt_hal_iram.*(.text .text.* .literal .literal.*) + *libarch.a:*bootloader_banner_wrap.*(.text .text.* .literal .literal.*) + *libarch.a:*bootloader_init.*(.text .text.* .literal .literal.*) + *libarch.a:*bootloader_common.*(.text .text.* .literal .literal.*) + *libarch.a:*bootloader_common_loader.*(.text .text.* .literal .literal.*) + *libarch.a:*bootloader_console.*(.text .text.* .literal .literal.*) + *libarch.a:*bootloader_console_loader.*(.text .text.* .literal .literal.*) + *libarch.a:*bootloader_esp32c2.*(.text .text.* .literal .literal.*) + *libarch.a:*bootloader_flash.*(.text .text.* .literal .literal.*) + *libarch.a:*bootloader_flash_config_esp32c2.*(.text .text.* .literal .literal.*) + *libarch.a:*flash_qio_mode.*(.text .text.* .literal .literal.*) + *libarch.a:*bootloader_clock_init.*(.text .text.* .literal .literal.*) + *libarch.a:*bootloader_clock_loader.*(.text .text.* .literal .literal.*) + *libarch.a:*bootloader_efuse.*(.text .text.* .literal .literal.*) + *libarch.a:*bootloader_panic.*(.text .text.* .literal .literal.*) + *libarch.a:*bootloader_mem.*(.text .text.* .literal .literal.*) + *libarch.a:*bootloader_random.*(.text .text.* .literal .literal.*) + *libarch.a:*bootloader_random_esp32c2.*(.text .text.* .literal .literal.*) + *libarch.a:*esp_image_format.*(.text .text.* .literal .literal.*) + *libarch.a:*bootloader_soc.*(.text .text.* .literal .literal.*) + *libarch.a:*bootloader_sha.*(.text .text.* .literal .literal.*) + *libarch.a:*flash_encrypt.*(.text .text.* .literal .literal.*) + *libarch.a:*cache_hal.*(.text .text.* .literal .literal.*) + *libarch.a:*uart_hal.*(.text .text.* .literal .literal.*) + *libarch.a:*mpu_hal.*(.text .text.* .literal .literal.*) + *libarch.a:*mmu_hal.*(.text .text.* .literal .literal.*) + *libarch.a:*uart_periph.*(.text .text.* .literal .literal.*) + *libarch.a:*esp_rom_uart.*(.text .text.* .literal .literal.*) + *libarch.a:*esp_rom_sys.*(.text .text.* .literal .literal.*) + *libarch.a:*esp_rom_spiflash.*(.text .text.* .literal .literal.*) + *libarch.a:*efuse_hal.*(.text .text.* .literal .literal.*) + *libarch.a:*efuse_utility.*(.text .text.* .literal .literal.*) + *libarch.a:*apm_hal.*(.text .text.* .literal .literal.*) + *libarch.a:*log.*(.text .text.* .literal .literal.*) + *libarch.a:*log_lock.*(.literal .literal.* .text .text.*) + *libarch.a:*log_print.*(.literal .literal.* .text .text.*) + *libarch.a:*log_timestamp.*(.literal.esp_log_early_timestamp .text.esp_log_early_timestamp) + *libarch.a:*log_timestamp.*(.literal.esp_log_timestamp .text.esp_log_timestamp) + *libarch.a:*log_timestamp_common.*(.literal .literal.* .text .text.*) + *libarch.a:*log_write.*(.literal.esp_log_write .text.esp_log_write) + *libarch.a:*log_write.*(.literal.esp_log_writev .text.esp_log_writev) + *libarch.a:*interrupt_intc.*(.literal .literal.* .text .text.*) + *libarch.a:esp_spiflash.*(.literal .text .literal.* .text.*) + *libarch.a:esp_flash_api.*(.text .text.* .literal .literal.*) + *libarch.a:esp_flash_spi_init.*(.text .text.* .literal .literal.*) + *libarch.a:spi_flash_hal_iram.*(.literal .literal.* .text .text.*) + *libarch.a:spi_flash_encrypt_hal_iram.*(.text .text.* .literal .literal.*) + *libarch.a:spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*) + *libarch.a:spi_flash_chip*.*(.literal .literal.* .text .text.*) + *libarch.a:spi_flash_wrap.*(.literal .literal.* .text .text.*) + *libarch.a:spi_flash_os_func_noos.*(.literal .literal.* .text .text.*) + *libarch.a:spi_flash_os_func_app.*(.literal .literal.* .text .text.*) + *libarch.a:flash_brownout_hook.*(.literal .literal.* .text .text.*) + *libarch.a:esp_cache.*(.literal .literal.* .text .text.*) + *libarch.a:esp_cache_utils.*(.literal .literal.* .text .text.*) + *libarch.a:cache_utils.*(.literal .literal.* .text .text.*) + *libarch.a:memspi_host_driver.*(.literal .literal.* .text .text.*) + *libarch.a:critical_section.*(.literal .literal.* .text .text.*) + *libarch.a:os.*(.literal.nuttx_enter_critical .text.nuttx_enter_critical) + *libarch.a:os.*(.literal.nuttx_exit_critical .text.nuttx_exit_critical) + *libarch.a:*riscv_modifyreg32.*(.literal .literal.* .text .text.*) + *libarch.a:intr_alloc.*(.literal.esp_intr_get_intno .text.esp_intr_get_intno) + *libarch.a:intr_alloc.*(.literal.esp_intr_get_cpu .text.esp_intr_get_cpu) + *libarch.a:interrupt.*(.literal.intr_handler_get .text.intr_handler_get) + *libarch.a:interrupt.*(.literal.intr_handler_get_arg .text.intr_handler_get_arg) + *libarch.a:interrupt.*(.literal.intr_get_item .text.intr_get_item) + *libarch.a:interrupt.*(.literal.intr_handler_get_arg .text.intr_handler_get_arg) + *libarch.a:*sleep_modes.*(.literal.esp_sleep_pd_config* .text.esp_sleep_pd_config*) + *libarch.a:*sleep_modes.*(.literal.esp_sleep_sub_mode_force_disable* .text.esp_sleep_sub_mode_force_disable*) + + *libc.a:sq_remlast.*(.literal .text .literal.* .text.*) + + esp_head.*(.literal .text .literal.* .text.*) + esp_start.*(.literal .text .literal.* .text.*) + + *libesp_wifi.a:esp_adapter.*(.literal.coex_pti_get_wrapper .text.coex_pti_get_wrapper) + *libesp_wifi.a:wifi_netif.*(.literal.wifi_sta_receive .text.wifi_sta_receive) + *libesp_wifi.a:wifi_netif.*(.literal.wifi_transmit_wrap .text.wifi_transmit_wrap) + + *libhal.a:timer_hal.*(.literal.timer_hal_capture_and_get_counter_value .text.timer_hal_capture_and_get_counter_value) + + *(.wifi0iram .wifi0iram.*) + *(.wifirxiram .wifirxiram.*) + *(.wifislpiram .wifislpiram.*) + *(.wifiorslpiram .wifiorslpiram.*) + *(.wifislprxiram .wifislprxiram.*) + *(.wifiextrairam .wifiextrairam.*) + + } >iram0_0_seg AT > ROM + + /* This section is required to skip .iram0.text area because iram0_0_seg + * and dram0_0_seg reflect the same address space on different buses. + */ + + .dram0.dummy (NOLOAD): + { + . = ORIGIN(dram0_0_seg) + _iram_end - _iram_start; + } >dram0_0_seg + + .noinit (NOLOAD): + { + /* This section contains data that is not initialized during load, + * or during the application's initialization sequence. + */ + . = ALIGN(4); + *(.noinit) + *(.noinit.*) + . = ALIGN(4) ; + } >dram0_0_seg + + .dram0.data : + { + . = ALIGN (16); + _data_start = ABSOLUTE(.); + _sdata = ABSOLUTE(.); + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.data1) + __global_pointer$ = . + 0x800; + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + *(.jcr) + *(.dram1) + *(.dram1.*) + + *libsched.a:irq_dispatch.*(.rodata .rodata.*) + *libsched.a:sched_lock.*(.rodata .rodata.*) + *libsched.a:sched_unlock.*(.rodata .rodata.*) + + *libarch.a:*(.rodata.esprv_intc_int_get_type) + *libarch.a:*riscv_doirq.*(.rodata .rodata.*) + *libarch.a:*brownout.*(.rodata .rodata.*) + *libarch.a:*cpu.*(.rodata .rodata.*) + *libarch.a:*gpio_hal.*(.rodata .rodata.*) + *libarch.a:*periph_ctrl.*(.rodata .rodata.*) + *libarch.a:*clk.*(.rodata .rodata.*) + *libarch.a:*esp_clk.*(.rodata .rodata.*) + *libarch.a:*esp_clk_tree.*(.rodata .rodata.*) + *libarch.a:*esp_clk_tree_common.*(.rodata .rodata.*) + *libarch.a:*clk_tree_hal.*(.rodata .rodata.*) + *libarch.a:*rtc_init.*(.rodata .rodata.*) + *libarch.a:*regi2c_ctrl.*(.rodata .rodata.*) + *libarch.a:*gpio_periph.*(.rodata .rodata.*) + *libarch.a:*rtc_clk.*(.rodata .rodata.*) + *libarch.a:*rtc_clk_init.*(.rodata .rodata.*) + *libarch.a:*rtc_sleep.*(.rodata .rodata.*) + *libarch.a:*rtc_time.*(.rodata .rodata.*) + *libarch.a:*systimer.*(.rodata .rodata.*) + *libarch.a:*systimer_hal.*(.rodata .rodata.*) + *libarch.a:*uart_hal_iram.*(.rodata .rodata.*) + *libarch.a:*wdt_hal_iram.*(.rodata .rodata.*) + *libarch.a:*bootloader_banner_wrap.*(.rodata .rodata.*) + *libarch.a:*bootloader_init.*(.rodata .rodata.*) + *libarch.a:*bootloader_common.*(.rodata .rodata.*) + *libarch.a:*bootloader_common_loader.*(.rodata .rodata.*) + *libarch.a:*bootloader_console.*(.rodata .rodata.*) + *libarch.a:*bootloader_console_loader.*(.rodata .rodata.*) + *libarch.a:*bootloader_esp32c2.*(.rodata .rodata.*) + *libarch.a:*bootloader_flash.*(.rodata .rodata.*) + *libarch.a:*bootloader_flash_config_esp32c2.*(.rodata .rodata.*) + *libarch.a:*flash_qio_mode.*(.rodata .rodata.*) + *libarch.a:*bootloader_clock_init.*(.rodata .rodata.*) + *libarch.a:*bootloader_clock_loader.*(.rodata .rodata.*) + *libarch.a:*bootloader_efuse.*(.rodata .rodata.*) + *libarch.a:*bootloader_panic.*(.rodata .rodata.*) + *libarch.a:*bootloader_mem.*(.rodata .rodata.*) + *libarch.a:*bootloader_random.*(.rodata .rodata.*) + *libarch.a:*bootloader_random_esp32c2.*(.rodata .rodata.*) + *libarch.a:*esp_image_format.*(.rodata .rodata.*) + *libarch.a:*bootloader_soc.*(.rodata .rodata.*) + *libarch.a:*bootloader_sha.*(.rodata .rodata.*) + *libarch.a:*flash_encrypt.*(.rodata .rodata.*) + *libarch.a:*cache_hal.*(.rodata .rodata.*) + *libarch.a:*uart_hal.*(.rodata .rodata.*) + *libarch.a:*mpu_hal.*(.rodata .rodata.*) + *libarch.a:*mmu_hal.*(.rodata .rodata.*) + *libarch.a:*uart_periph.*(.rodata .rodata.*) + *libarch.a:*esp_rom_uart.*(.rodata .rodata.*) + *libarch.a:*esp_rom_sys.*(.rodata .rodata.*) + *libarch.a:*esp_rom_spiflash.*(.rodata .rodata.*) + *libarch.a:*efuse_hal.*(.rodata .rodata.*) + *libarch.a:*efuse_utility.*(.rodata .rodata.*) + *libarch.a:*log.*(.rodata .rodata.*) + *libarch.a:*log_noos.*(.rodata .rodata.*) + *libarch.a:esp_spiflash.*(.rodata .rodata.*) + *libarch.a:esp_flash_api.*(.rodata .rodata.*) + *libarch.a:esp_flash_spi_init.*(.rodata .rodata.*) + *libarch.a:spi_flash_hal_iram.*(.rodata .rodata.*) + *libarch.a:spi_flash_encrypt_hal_iram.*(.rodata .rodata.*) + *libarch.a:spi_flash_hal_gpspi.*(.rodata .rodata.*) + *libarch.a:spi_flash_chip*.*(.rodata .rodata.*) + *libarch.a:spi_flash_wrap.*(.rodata .rodata.*) + *libarch.a:spi_flash_os_func_noos.*(.rodata .rodata.*) + *libarch.a:spi_flash_os_func_app.*(.rodata .rodata.*) + *libarch.a:flash_brownout_hook.*(.rodata .rodata.*) + *libarch.a:esp_cache.*(.rodata .rodata.*) + *libarch.a:esp_cache_utils.*(.rodata .rodata.*) + *libarch.a:cache_utils.*(.rodata .rodata.*) + *libarch.a:startup_funcs.*(.rodata .rodata.*) + *libarch.a:memspi_host_driver.*(.rodata .rodata.*) + *libarch.a:critical_section.*(.rodata .rodata.*) + *libarch.a:os.*(.rodata.g_int_flags_count .rodata.g_int_flags) + *libarch.a:*sleep_modes.*(.rodata.esp_sleep_pd_config*) + *libarch.a:*sleep_modes.*(.rodata.esp_sleep_sub_mode_force_disable*) + + esp_head.*(.rodata .rodata.*) + esp_start.*(.rodata .rodata.*) + + _edata = ABSOLUTE(.); + _data_end = ABSOLUTE(.); + . = ALIGN(4); + } >dram0_0_seg AT > ROM + + /* Shared RAM */ + + .dram0.bss (NOLOAD) : + { + . = ALIGN (8); + _bss_start = ABSOLUTE(.); + _sbss = ABSOLUTE(.); + *(.dynsbss) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + *(.dynbss) + *(.bss) + *(.bss.*) + *(.share.mem) + *(.gnu.linkonce.b.*) + *(COMMON) + + . = ALIGN (8); + _ebss = ABSOLUTE(.); + _bss_end = ABSOLUTE(.); + } >dram0_0_seg + + _image_irom_vma = ADDR(.flash.text); + _image_irom_lma = LOADADDR(.flash.text); + _image_irom_size = LOADADDR(.flash.text) + SIZEOF(.flash.text) - _image_irom_lma; + + .flash.text : ALIGN(0xFFFF) + { + _stext = .; + _instruction_reserved_start = ABSOLUTE(.); /* This is a symbol marking the flash.text start, this can be used for mmu driver to maintain virtual address */ + _text_start = ABSOLUTE(.); + + *(EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifi0iram EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifi0iram.*) + *(.wifiextrairam .wifiextrairam.*) + *(EXCLUDE_FILE(*libpp.a) .wifiorslpiram EXCLUDE_FILE(*libpp.a) .wifiorslpiram.*) + *(EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifirxiram EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifirxiram.*) + *(.wifislpiram .wifislpiram.*) + *(EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifislprxiram EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifislprxiram.*) + + *libesp_wifi.a:esp_adapter.*(.text .text.clear_intr_wrapper .text.coex_deinit_wrapper .text.coex_disable_wrapper .text.coex_enable_wrapper .text.coex_init_wrapper .text.coex_register_start_cb_wrapper .text.coex_schm_curr_period_get_wrapper .text.coex_schm_curr_phase_get_wrapper .text.coex_schm_flexible_period_get_wrapper .text.coex_schm_flexible_period_set_wrapper .text.coex_schm_interval_get_wrapper .text.coex_schm_process_restart_wrapper .text.coex_schm_register_cb_wrapper .text.coex_schm_status_bit_clear_wrapper .text.coex_schm_status_bit_set_wrapper .text.coex_wifi_channel_set_wrapper .text.coex_wifi_request_wrapper .text.disable_intr_wrapper .text.enable_intr_wrapper .text.esp_event_post_wrapper .text.esp_log_write_wrapper .text.esp_log_writev_wrapper .text.esp_phy_disable_wrapper .text.esp_phy_enable_wrapper .text.esp_read_mac_wrapper .text.event_group_wait_bits_wrapper .text.get_time_wrapper .text.mutex_create_wrapper .text.mutex_delete_wrapper .text.nvs_open_wrapper .text.queue_create_wrapper .text.queue_recv_wrapper .text.queue_send_to_back_wrapper .text.queue_send_to_front_wrapper .text.queue_send_wrapper .text.recursive_mutex_create_wrapper .text.set_intr_wrapper .text.set_isr_wrapper .text.task_create_pinned_to_core_wrapper .text.task_create_wrapper .text.task_get_max_priority_wrapper .text.wifi_clock_disable_wrapper .text.wifi_clock_enable_wrapper .text.wifi_create_queue .text.wifi_create_queue_wrapper .text.wifi_delete_queue .text.wifi_delete_queue_wrapper .text.wifi_reset_mac_wrapper .text.wifi_thread_semphr_free .text.wifi_thread_semphr_get_wrapper) + *libarch.a:*brownout.*(.text .text.*) + + *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */ + *(.fini.literal) + *(.fini) + *(.gnu.version) + + . += 16; + + _text_end = ABSOLUTE(.); + _instruction_reserved_end = ABSOLUTE(.); /* This is a symbol marking the flash.text end, this can be used for mmu driver to maintain virtual address */ + _etext = .; + + /* Similar to _iram_start, this symbol goes here so it is + * resolved by addr2line in preference to the first symbol in + * the flash.text segment. + */ + + _flash_cache_start = ABSOLUTE(0); + } >default_code_seg AT > ROM + + .flash_rodata_dummy (NOLOAD) : ALIGN(0xFFFF) + { + /* Start at the same alignment constraint than .flash.text */ + + /* . = ALIGN(ALIGNOF(.flash.text)); */ + + /* Create an empty gap as big as .flash.text section */ + + . = . + SIZEOF(.flash.text); + + /* Prepare the alignment of the section above. Few bytes (0x20) must be + * added for the mapping header. + */ + + /*. = ALIGN(0x10000) + 0x20; */ + } >default_rodata_seg + + _image_drom_vma = ADDR(.flash.rodata); + _image_drom_lma = LOADADDR(.flash.rodata); + _image_drom_size = LOADADDR(.flash.rodata) + SIZEOF(.flash.rodata) - _image_drom_lma; + + .flash.appdesc : ALIGN(0x10) + { + _rodata_reserved_start = ABSOLUTE(.); /* This is a symbol marking the flash.rodata start, this can be used for mmu driver to maintain virtual address */ + _rodata_start = ABSOLUTE(.); + + /* Create an empty gap within this section. Thanks to this, the end of this + * section will match .flash.rodata's begin address. Thus, both sections + * will be merged when creating the final bin image. */ + . = ALIGN(ALIGNOF(.flash.rodata)); + } >default_rodata_seg + + .flash.rodata : ALIGN(0xFFFF) + { + _srodata = ABSOLUTE(.); + *(EXCLUDE_FILE (*libarch.a:esp_spiflash.* esp_head.* esp_start.*) .rodata) + *(EXCLUDE_FILE (*libarch.a:esp_spiflash.* esp_head.* esp_start.*) .rodata.*) + + *(.rodata) + *(.rodata.*) + *(.rodata_wlog_verbose.*) + *(.rodata_wlog_debug.*) + *(.rodata_wlog_info.*) + *(.rodata_wlog_warning.*) + *(.rodata_wlog_error.*) + + *(.srodata.*) + + *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */ + *(.gnu.linkonce.r.*) + *(.rodata1) + __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); + *(.xt_except_table) + *(.gcc_except_table .gcc_except_table.*) + *(.gnu.linkonce.e.*) + *(.gnu.version_r) + . = (. + 3) & ~ 3; + __eh_frame = ABSOLUTE(.); + KEEP(*(.eh_frame)) + . = (. + 7) & ~ 3; + + /* C++ constructor and destructor tables: + * RISC-V GCC is configured with --enable-initfini-array so it emits an + * .init_array section instead. + */ + + /* C++ exception handlers table: */ + + __XT_EXCEPTION_DESCS_ = ABSOLUTE(.); + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + *(.dynamic) + *(.gnu.version_d) + _erodata = ABSOLUTE(.); + + /* Literals are also RO data. */ + + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + + _sinit = ABSOLUTE(.); + + . = ALIGN(4); + __init_priority_array_start = ABSOLUTE(.); + KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array.*)) + __init_priority_array_end = ABSOLUTE(.); + + . = ALIGN(4); + __init_array_start = ABSOLUTE(.); + KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array)) + __init_array_end = ABSOLUTE(.); + + /* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */ + + . = ALIGN(4); + soc_reserved_memory_region_start = ABSOLUTE(.); + KEEP (*(.reserved_memory_address)) + soc_reserved_memory_region_end = ABSOLUTE(.); + + /* System init functions registered via ESP_SYSTEM_INIT_FN */ + + . = ALIGN(4); + _esp_system_init_fn_array_start = ABSOLUTE(.); + KEEP (*(SORT_BY_INIT_PRIORITY(.esp_system_init_fn.*))) + _esp_system_init_fn_array_end = ABSOLUTE(.); + + _einit = ABSOLUTE(.); + + } >default_rodata_seg AT > ROM + + .flash.rodata_noload (NOLOAD) : + { + /* + This is a symbol marking the flash.rodata end, this can be used for mmu driver to maintain virtual address + We don't need to include the noload rodata in this section + */ + _rodata_reserved_end = ABSOLUTE(.); + . = ALIGN (4); + } > default_rodata_seg AT > ROM + + /* Marks the end of IRAM code segment */ + + .iram0.text_end (NOLOAD) : + { + . = ALIGN (16); + } >iram0_0_seg + + .iram0.data : + { + . = ALIGN(16); + *(.iram.data) + *(.iram.data*) + } >iram0_0_seg + + .iram0.bss (NOLOAD) : + { + . = ALIGN(16); + *(.iram.bss) + *(.iram.bss*) + + . = ALIGN(16); + _iram_end = ABSOLUTE(.); + } >iram0_0_seg + + /* RTC fast memory holds RTC wake stub code !*/ + + .rtc.text : + { + . = ALIGN(4); + *(.rtc.literal .rtc.literal.*) + *(.rtc.text .rtc.text.*) + *(.rtc.entry.text) + . += 16; + . = ALIGN(4); + } > rtc_iram_seg AT > ROM + + /* RTC BSS section. */ + + .rtc.bss (NOLOAD) : + { + *(.rtc.bss) + } >rtc_iram_seg + + /* RTC data section holds RTC wake stub data/rodata. */ + + .rtc.data : + { + . = ALIGN(4); + *(.rtc.force_slow .rtc.force_slow.*) + *(.rtc.data) + *(.rtc.data.*) + *(.rtc.rodata) + *(.rtc.rodata.*) + } >rtc_iram_seg + + /* This section holds RTC data that should have fixed addresses. + * The data are not initialized at power-up and are retained during deep sleep. + */ + .rtc_reserved (NOLOAD): + { + . = ALIGN(4); + _rtc_reserved_start = ABSOLUTE(.); + /* New data can only be added here to ensure existing data are not moved. + Because data have adhered to the end of the segment and code is relied on it. + >> put new data here << */ + + *(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*) + KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*)) + _rtc_reserved_end = ABSOLUTE(.); + } > rtc_reserved_seg + + _rtc_reserved_length = _rtc_reserved_end - _rtc_reserved_start; + ASSERT((_rtc_reserved_length <= LENGTH(rtc_reserved_seg)), + "RTC reserved segment data does not fit.") + +} diff --git a/boards/risc-v/esp32c2/common/src/CMakeLists.txt b/boards/risc-v/esp32c2/common/src/CMakeLists.txt new file mode 100644 index 0000000000000..50fe3051e02f0 --- /dev/null +++ b/boards/risc-v/esp32c2/common/src/CMakeLists.txt @@ -0,0 +1,93 @@ +# ############################################################################## +# boards/risc-v/esp32c2/common/src/CMakeLists.txt +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more contributor +# license agreements. See the NOTICE file distributed with this work for +# additional information regarding copyright ownership. The ASF licenses this +# file to you under the Apache License, Version 2.0 (the "License"); you may not +# use this file except in compliance with the License. You may obtain a copy of +# the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations under +# the License. +# +# ############################################################################## + +set(SRCS) + +if(CONFIG_ARCH_BOARD_COMMON) + + if(CONFIG_ESPRESSIF_ADC) + list(APPEND SRCS esp_board_adc.c) + endif() + + if(CONFIG_ESPRESSIF_LEDC) + list(APPEND SRCS esp_board_ledc.c) + endif() + + if(CONFIG_ESPRESSIF_SPI) + list(APPEND SRCS esp_board_spi.c) + endif() + + if(CONFIG_SPI) + list(APPEND SRCS esp_board_spidev.c) + endif() + + if(CONFIG_SPI_SLAVE) + list(APPEND SRCS esp_board_spislavedev.c) + endif() + + if(CONFIG_I2C) + list(APPEND SRCS esp_board_i2c.c) + endif() + + if(CONFIG_ESPRESSIF_SPIFLASH) + list(APPEND SRCS esp_board_spiflash.c) + endif() + + if(CONFIG_ESPRESSIF_WIFI) + list(APPEND SRCS esp_board_wlan.c) + endif() + + if(CONFIG_SENSORS_BMP180) + list(APPEND SRCS esp_board_bmp180.c) + endif() + + if(CONFIG_SENSORS_BMP280) + list(APPEND SRCS esp_board_bmp280.c) + endif() + + if(CONFIG_DEV_RNG90) + list(APPEND SRCS esp_board_rng90.c) + endif() + + if(CONFIG_MMCSD_SPI) + list(APPEND SRCS esp_board_mmcsd.c) + endif() + + # Handle ROMFS init scripts + if(CONFIG_ETC_ROMFS) + nuttx_add_romfs( + NAME + etc + MOUNTPOINT + etc + RCSRCS + etc/init.d/rcS + etc/init.d/rc.sysinit + PATH + ${CMAKE_CURRENT_BINARY_DIR}/etc) + + target_link_libraries(board PRIVATE romfs_etc) + endif() + +endif() + +target_sources(board PRIVATE ${SRCS}) diff --git a/boards/risc-v/esp32c2/common/src/Make.defs b/boards/risc-v/esp32c2/common/src/Make.defs new file mode 100644 index 0000000000000..aab3fd4b0a991 --- /dev/null +++ b/boards/risc-v/esp32c2/common/src/Make.defs @@ -0,0 +1,81 @@ +############################################################################# +# boards/risc-v/esp32c2/common/src/Make.defs +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################# + +ifeq ($(CONFIG_ARCH_BOARD_COMMON),y) + +ifeq ($(CONFIG_ESPRESSIF_ADC),y) + CSRCS += esp_board_adc.c +endif + +ifeq ($(CONFIG_ESPRESSIF_LEDC),y) + CSRCS += esp_board_ledc.c +endif + +ifeq ($(CONFIG_ESPRESSIF_SPI),y) + CSRCS += esp_board_spi.c +endif + +ifeq ($(CONFIG_SPI),y) + CSRCS += esp_board_spidev.c +endif + +ifeq ($(CONFIG_SPI_SLAVE),y) + CSRCS += esp_board_spislavedev.c +endif + +ifeq ($(CONFIG_I2C),y) + CSRCS += esp_board_i2c.c +endif + +ifeq ($(CONFIG_ESPRESSIF_SPIFLASH),y) + CSRCS += esp_board_spiflash.c +endif + +ifeq ($(CONFIG_ESPRESSIF_WIFI),y) + CSRCS += esp_board_wlan.c +endif + +ifeq ($(CONFIG_SENSORS_BMP180),y) + CSRCS += esp_board_bmp180.c +endif + +ifeq ($(CONFIG_SENSORS_BMP280),y) + CSRCS += esp_board_bmp280.c +endif + +ifeq ($(CONFIG_DEV_RNG90),y) + CSRCS += esp_board_rng90.c +endif + +ifeq ($(CONFIG_MMCSD_SPI),y) + CSRCS += esp_board_mmcsd.c +endif + +ifeq ($(CONFIG_ETC_ROMFS),y) + RCSRCS = etc/init.d/rc.sysinit etc/init.d/rcS +endif + +DEPPATH += --dep-path src +VPATH += :src +CFLAGS += ${INCDIR_PREFIX}$(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)src + +endif diff --git a/boards/risc-v/esp32c2/common/src/esp_board_adc.c b/boards/risc-v/esp32c2/common/src/esp_board_adc.c new file mode 100644 index 0000000000000..aaf61adedc052 --- /dev/null +++ b/boards/risc-v/esp32c2/common/src/esp_board_adc.c @@ -0,0 +1,138 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/common/src/esp_board_adc.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include + +#include + +#include "espressif/esp_adc.h" + +#include "esp_board_adc.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* The number of channels for each ADC */ + +#define ADC_MAX_CHANNELS 5 + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Select channels to be used for each ADC. + * + * GPIOs are fixed for each channel and configured in the lower-half driver. + * + * ADC 1 + * Channel: 0 1 2 3 4 5 + * GPIO: 0 1 2 3 4 5 + * + * On the chanlist arrays below, channels are added +1. Do not change. + */ + +#ifdef CONFIG_ESPRESSIF_ADC_1 +static const uint8_t g_chanlist_adc1[ADC_MAX_CHANNELS] = +{ +#ifdef CONFIG_ESPRESSIF_ADC_1_CH0 + 1, +#endif +#ifdef CONFIG_ESPRESSIF_ADC_1_CH1 + 2, +#endif +#ifdef CONFIG_ESPRESSIF_ADC_1_CH2 + 3, +#endif +#ifdef CONFIG_ESPRESSIF_ADC_1_CH3 + 4, +#endif +#ifdef CONFIG_ESPRESSIF_ADC_1_CH4 + 5, +#endif +#ifdef CONFIG_ESPRESSIF_ADC_1_CH5 + 6, +#endif +}; +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_adc_init + * + * Description: + * This function configures and initializes the ADC driver for the board. + * It allocates memory for the ADC device structure, sets up the ADC + * hardware, and registers the ADC device with the system. + * + * Input Parameters: + * None. + * + * Returned Value: + * Returns zero (OK) on successful initialization and registration of the + * ADC device; a negated errno value is returned to indicate the nature + * of any failure. + * + ****************************************************************************/ + +int board_adc_init(void) +{ + int ret; + struct adc_dev_s *adcdev; + + adcdev = kmm_malloc(sizeof(struct adc_dev_s)); + if (adcdev == NULL) + { + syslog(LOG_ERR, "ERROR: Failed to allocate adc_dev_s instance\n"); + return -ENOMEM; + } + + memset(adcdev, 0, sizeof(struct adc_dev_s)); + + adcdev = esp_adc_initialize(1, g_chanlist_adc1); + + if (adcdev == NULL) + { + syslog(LOG_ERR, "ERROR: Failed to initialize ADC1\n"); + return -ENODEV; + } + + /* Register the ADC driver at "/dev/adcx" */ + + ret = adc_register("/dev/adc0", adcdev); + if (ret < 0) + { + kmm_free(adcdev); + syslog(LOG_ERR, "ERROR: adc_register /dev/adc0 failed: %d\n", ret); + } + + return ret; +} diff --git a/boards/risc-v/esp32c2/common/src/esp_board_bmp180.c b/boards/risc-v/esp32c2/common/src/esp_board_bmp180.c new file mode 100644 index 0000000000000..a3674d3719b51 --- /dev/null +++ b/boards/risc-v/esp32c2/common/src/esp_board_bmp180.c @@ -0,0 +1,96 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/common/src/esp_board_bmp180.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#ifndef CONFIG_ESPRESSIF_I2C_BITBANG +#include "espressif/esp_i2c.h" +#else +#include "espressif/esp_i2c_bitbang.h" +#endif + +#include "esp_board_bmp180.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_bmp180_initialize + * + * Description: + * Initialize and register the BMP180 Pressure Sensor driver. + * + * Input Parameters: + * devno - The device number, used to build the device path as /dev/pressN + * + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +int board_bmp180_initialize(int devno) +{ + struct i2c_master_s *i2c; + char devpath[12]; + int ret; + + sninfo("Initializing BMP180!\n"); + + /* Initialize BMP180 */ + +#ifndef CONFIG_ESPRESSIF_I2C_BITBANG + i2c = esp_i2cbus_initialize(ESPRESSIF_I2C0); +#else + i2c = esp_i2cbus_bitbang_initialize(); +#endif + + if (i2c) + { + /* Then try to register the barometer sensor in I2C0 */ + + snprintf(devpath, sizeof(devpath), "/dev/press%d", devno); + ret = bmp180_register(devpath, i2c); + if (ret < 0) + { + snerr("ERROR: Error registering BMP180 in I2C0\n"); + } + } + else + { + ret = -ENODEV; + } + + return ret; +} diff --git a/boards/risc-v/esp32c2/common/src/esp_board_bmp280.c b/boards/risc-v/esp32c2/common/src/esp_board_bmp280.c new file mode 100644 index 0000000000000..8dfcf326cf5e0 --- /dev/null +++ b/boards/risc-v/esp32c2/common/src/esp_board_bmp280.c @@ -0,0 +1,94 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/common/src/esp_board_bmp280.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#ifndef CONFIG_ESPRESSIF_I2C_BITBANG +#include "espressif/esp_i2c.h" +#else +#include "espressif/esp_i2c_bitbang.h" +#endif + +#include "esp_board_bmp280.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_bmp280_initialize + * + * Description: + * Initialize and register the BMP280 Pressure Sensor driver. + * + * Input Parameters: + * devno - The device number, used to build the device path as /dev/pressN + * + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +int board_bmp280_initialize(int devno) +{ + struct i2c_master_s *i2c; + int ret; + + sninfo("Initializing BMP280!\n"); + + /* Initialize I2C */ + +#ifndef CONFIG_ESPRESSIF_I2C_BITBANG + i2c = esp_i2cbus_initialize(ESPRESSIF_I2C0); +#else + i2c = esp_i2cbus_bitbang_initialize(); +#endif + + if (i2c) + { + /* Then try to register the barometer sensor in I2C0 */ + + ret = bmp280_register(devno, i2c); + if (ret < 0) + { + snerr("ERROR: Error registering BMP280 in I2C0\n"); + } + } + else + { + ret = -ENODEV; + } + + return ret; +} diff --git a/boards/risc-v/esp32c2/common/src/esp_board_i2c.c b/boards/risc-v/esp32c2/common/src/esp_board_i2c.c new file mode 100644 index 0000000000000..5977b07a5bfb2 --- /dev/null +++ b/boards/risc-v/esp32c2/common/src/esp_board_i2c.c @@ -0,0 +1,170 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/common/src/esp_board_i2c.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#ifdef CONFIG_ESPRESSIF_I2C_BITBANG +#include "espressif/esp_i2c_bitbang.h" +#endif +#ifdef CONFIG_ESPRESSIF_I2C_PERIPH_MASTER_MODE +#include "espressif/esp_i2c.h" +#endif +#ifdef CONFIG_ESPRESSIF_I2C_PERIPH_SLAVE_MODE +#include "espressif/esp_i2c_slave.h" +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifdef CONFIG_ESPRESSIF_I2C_PERIPH_SLAVE_MODE +#define I2C0_SLAVE_ADDR 0x28 +#define I2C0_SLAVE_NBITS 7 +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#ifdef CONFIG_ESPRESSIF_I2C_BITBANG +static int i2c_bitbang_driver_init(int bus) +{ + struct i2c_master_s *i2c; + int ret = OK; + + i2c = esp_i2cbus_bitbang_initialize(); + if (i2c == NULL) + { + syslog(LOG_ERR, "Failed to get I2C%d interface\n", bus); + return -ENODEV; + } + +#ifdef CONFIG_I2C_DRIVER + ret = i2c_register(i2c, bus); + if (ret < 0) + { + syslog(LOG_ERR, "Failed to register I2C%d driver: %d\n", bus, ret); + } +#endif + + return ret; +} +#endif + +#ifdef CONFIG_ESPRESSIF_I2C_PERIPH_MASTER_MODE +static int i2c_driver_init(int bus) +{ + struct i2c_master_s *i2c; + int ret = OK; + + i2c = esp_i2cbus_initialize(bus); + if (i2c == NULL) + { + syslog(LOG_ERR, "Failed to get I2C%d interface\n", bus); + return -ENODEV; + } + +#ifdef CONFIG_I2C_DRIVER + ret = i2c_register(i2c, bus); + if (ret < 0) + { + syslog(LOG_ERR, "Failed to register I2C%d driver: %d\n", bus, ret); + esp_i2cbus_uninitialize(i2c); + } +#endif + + return ret; +} +#endif + +#ifdef CONFIG_ESPRESSIF_I2C_PERIPH_SLAVE_MODE +static int i2c_slave_driver_init(int bus, int addr) +{ + struct i2c_slave_s *i2c; + int ret = OK; + + i2c = esp_i2cbus_slave_initialize(bus, addr); + if (i2c == NULL) + { + syslog(LOG_ERR, "Failed to get I2C%d interface\n", bus); + return -ENODEV; + } + +#ifdef CONFIG_I2C_DRIVER + ret = i2c_slave_register(i2c, bus, addr, I2C0_SLAVE_NBITS); + if (ret < 0) + { + syslog(LOG_ERR, "Failed to register I2C%d driver: %d\n", bus, ret); + esp_i2cbus_slave_uninitialize(i2c); + } +#endif + + return ret; +} +#endif + +/**************************************************************************** + * Name: board_i2c_init + * + * Description: + * Configure the I2C driver. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +int board_i2c_init(void) +{ + int ret = OK; + +#ifdef CONFIG_ESPRESSIF_I2C_PERIPH_MASTER_MODE +# ifdef CONFIG_ESPRESSIF_I2C0_MASTER_MODE + ret = i2c_driver_init(ESPRESSIF_I2C0); +# endif +#endif + +#ifdef CONFIG_ESPRESSIF_I2C_BITBANG +# ifdef CONFIG_ESPRESSIF_I2C_BITBANG_MASTER_MODE + ret = i2c_bitbang_driver_init(ESPRESSIF_I2C_BITBANG); +# endif +#endif + +#ifdef CONFIG_ESPRESSIF_I2C_PERIPH_SLAVE_MODE +# ifdef CONFIG_ESPRESSIF_I2C0_SLAVE_MODE + ret = i2c_slave_driver_init(ESPRESSIF_I2C0_SLAVE, I2C0_SLAVE_ADDR); +# endif +#endif + + return ret; +} diff --git a/boards/risc-v/esp32c2/common/src/esp_board_ledc.c b/boards/risc-v/esp32c2/common/src/esp_board_ledc.c new file mode 100644 index 0000000000000..b0fff5228dd62 --- /dev/null +++ b/boards/risc-v/esp32c2/common/src/esp_board_ledc.c @@ -0,0 +1,149 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/common/src/esp_board_ledc.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include + +#include "espressif/esp_ledc.h" + +#include "esp_board_ledc.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define LEDC_TIMER0 0 +#define LEDC_TIMER1 1 +#define LEDC_TIMER2 2 +#define LEDC_TIMER3 3 + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_ledc_setup + * + * Description: + * Initialize LEDC PWM and register the PWM device. + * + * Input Parameters: + * None. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +int board_ledc_setup(void) +{ + int ret = OK; + struct pwm_lowerhalf_s *pwm; + +#ifdef CONFIG_ESPRESSIF_LEDC_TIMER0 + pwm = esp_ledc_init(LEDC_TIMER0); + if (!pwm) + { + syslog(LOG_ERR, "ERROR: Failed to get the LEDC PWM 0 lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/pwm0" */ + + ret = pwm_register("/dev/pwm0", pwm); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: pwm_register failed: %d\n", ret); + return ret; + } +#endif + +#ifdef CONFIG_ESPRESSIF_LEDC_TIMER1 + pwm = esp_ledc_init(LEDC_TIMER1); + if (!pwm) + { + syslog(LOG_ERR, "ERROR: Failed to get the LEDC PWM 1 lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/pwm1" */ + + ret = pwm_register("/dev/pwm1", pwm); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: pwm_register failed: %d\n", ret); + return ret; + } +#endif + +#ifdef CONFIG_ESPRESSIF_LEDC_TIMER2 + pwm = esp_ledc_init(LEDC_TIMER2); + if (!pwm) + { + syslog(LOG_ERR, "ERROR: Failed to get the LEDC PWM 2 lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/pwm2" */ + + ret = pwm_register("/dev/pwm2", pwm); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: pwm_register failed: %d\n", ret); + return ret; + } +#endif + +#ifdef CONFIG_ESPRESSIF_LEDC_TIMER3 + pwm = esp_ledc_init(LEDC_TIMER3); + if (!pwm) + { + syslog(LOG_ERR, "ERROR: Failed to get the LEDC PWM 3 lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/pwm3" */ + + ret = pwm_register("/dev/pwm3", pwm); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: pwm_register failed: %d\n", ret); + return ret; + } +#endif + + return ret; +} + diff --git a/boards/risc-v/esp32c2/common/src/esp_board_mmcsd.c b/boards/risc-v/esp32c2/common/src/esp_board_mmcsd.c new file mode 100644 index 0000000000000..57d8f2c927540 --- /dev/null +++ b/boards/risc-v/esp32c2/common/src/esp_board_mmcsd.c @@ -0,0 +1,97 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/common/src/esp_board_mmcsd.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include + +#include "espressif/esp_spi.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp_mmcsd_spi_initialize + * + * Description: + * Initialize SPI-based SD card. + * + * Input Parameters: + * minor - The MMC/SD minor device number. The MMC/SD device will be + * registered as /dev/mmcsdN where N is the minor number + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +int esp_mmcsd_spi_initialize(void) +{ + struct spi_dev_s *spi; + int ret; + + syslog(LOG_INFO, "INFO: init MMC/SD slot %d on SPI%d: /dev/mmcsd%d\n", + CONFIG_NSH_MMCSDSLOTNO, CONFIG_NSH_MMCSDSPIPORTNO, + CONFIG_NSH_MMCSDMINOR); + + spi = esp_spibus_initialize(CONFIG_NSH_MMCSDSPIPORTNO); + + if (spi == NULL) + { + syslog(LOG_ERR, "ERROR: failed to initialize SPI%d.\n", + CONFIG_NSH_MMCSDSPIPORTNO); + return -ENODEV; + } + + /* Mounts to /dev/mmcsdN where N in the minor number */ + + ret = mmcsd_spislotinitialize(CONFIG_NSH_MMCSDMINOR, + CONFIG_NSH_MMCSDSLOTNO, spi); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: failed to bind SPI%d to SD slot %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO); + return ret; + } + + syslog(LOG_INFO, "INFO: MMCSD initialized\n"); + return OK; +} diff --git a/boards/risc-v/esp32c2/common/src/esp_board_rng90.c b/boards/risc-v/esp32c2/common/src/esp_board_rng90.c new file mode 100644 index 0000000000000..d82af86f201b9 --- /dev/null +++ b/boards/risc-v/esp32c2/common/src/esp_board_rng90.c @@ -0,0 +1,95 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/common/src/esp_board_rng90.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#ifndef CONFIG_ESPRESSIF_I2C_BITBANG +# include "espressif/esp_i2c.h" +#else +# include "espressif/esp_i2c_bitbang.h" +#endif + +#include "esp_board_rng90.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_rng90_initialize + * + * Description: + * Initialize and register the RNG90 True Random Number Generator driver. + * + * Input Parameters: + * devno - The device number, used to build the device path as /dev/rngN + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + ****************************************************************************/ + +int board_rng90_initialize(int devno) +{ + struct i2c_master_s *i2c; + char devpath[16]; + int ret; + + sninfo("Initializing RNG90\n"); + + /* Initialize I2C */ + +#ifndef CONFIG_ESPRESSIF_I2C_BITBANG + i2c = esp_i2cbus_initialize(ESPRESSIF_I2C0); +#else + i2c = esp_i2cbus_bitbang_initialize(); +#endif + + if (i2c == NULL) + { + snerr("ERROR: Failed to initialize I2C for RNG90\n"); + return -ENODEV; + } + + /* Register the RNG90 driver at "/dev/rngN" */ + + snprintf(devpath, sizeof(devpath), "/dev/rng%d", devno); + ret = rng90_register(devpath, i2c, RNG90_I2C_ADDR); + if (ret < 0) + { + snerr("ERROR: Failed to register RNG90 driver: %d\n", ret); + return ret; + } + + return OK; +} + diff --git a/boards/risc-v/esp32c2/common/src/esp_board_spi.c b/boards/risc-v/esp32c2/common/src/esp_board_spi.c new file mode 100644 index 0000000000000..6446329be280f --- /dev/null +++ b/boards/risc-v/esp32c2/common/src/esp_board_spi.c @@ -0,0 +1,90 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/common/src/esp_board_spi.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "espressif/esp_gpio.h" + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp_spi2_status + ****************************************************************************/ + +#ifdef CONFIG_ESPRESSIF_SPI2 + +uint8_t esp_spi2_status(struct spi_dev_s *dev, uint32_t devid) +{ + uint8_t status = 0; + + if (devid == SPIDEV_MMCSD(0)) + { + return SPI_STATUS_PRESENT; + } + + return status; +} + +#endif + +/**************************************************************************** + * Name: esp_spi2_cmddata + ****************************************************************************/ + +#if defined(CONFIG_ESPRESSIF_SPI2) && defined(CONFIG_SPI_CMDDATA) + +int esp_spi2_cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd) +{ + if (devid == SPIDEV_DISPLAY(0)) + { + /* This is the Data/Command control pad which determines whether the + * data bits are data or a command. + */ + + esp_gpiowrite(CONFIG_ESPRESSIF_SPI2_MISOPIN, !cmd); + + return OK; + } + + spiinfo("devid: %" PRIu32 " CMD: %s\n", devid, cmd ? "command" : + "data"); + + return -ENODEV; +} + +#endif diff --git a/boards/risc-v/esp32c2/common/src/esp_board_spidev.c b/boards/risc-v/esp32c2/common/src/esp_board_spidev.c new file mode 100644 index 0000000000000..b1cbbcfa2357a --- /dev/null +++ b/boards/risc-v/esp32c2/common/src/esp_board_spidev.c @@ -0,0 +1,197 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/common/src/esp_board_spidev.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#ifdef CONFIG_ESPRESSIF_SPI_PERIPH +#include "espressif/esp_spi.h" +#endif +#ifdef CONFIG_ESPRESSIF_SPI_BITBANG +#include "espressif/esp_spi_bitbang.h" +#endif + +#include "esp_board_spidev.h" + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: spi_bitbang_driver_init + * + * Description: + * Initialize SPI bitbang driver and register the /dev/spi device. + * + * Input Parameters: + * port - The SPI bus number, used to build the device path as /dev/spiN + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_ESPRESSIF_SPI_BITBANG +static int spi_bitbang_driver_init(int port) +{ + struct spi_dev_s *spi; + int ret = OK; + + /* Initialize SPI device */ + + spi = esp_spi_bitbang_init(); + + if (spi == NULL) + { + syslog(LOG_ERR, "Failed to initialize SPI%d.\n", port); + return -ENODEV; + } + +#ifdef CONFIG_SPI_DRIVER + syslog(LOG_INFO, "Initializing /dev/spi%d...\n", port); + + ret = spi_register(spi, port); + if (ret < 0) + { + syslog(LOG_ERR, "Failed to register /dev/spi%d: %d\n", port, ret); + esp_spi_bitbang_uninitialize(spi); + } +#endif + + return ret; +} +#endif + +/**************************************************************************** + * Name: spi_driver_init + * + * Description: + * Initialize SPI driver and register the /dev/spi device. + * + * Input Parameters: + * port - The SPI bus number, used to build the device path as /dev/spiN + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_ESPRESSIF_SPI_PERIPH +static int spi_driver_init(int port) +{ + int ret = OK; + struct spi_dev_s *spi; + + /* Initialize SPI device */ + + spi = esp_spibus_initialize(port); + + if (spi == NULL) + { + syslog(LOG_ERR, "Failed to initialize SPI%d.\n", port); + return -ENODEV; + } + +#ifdef CONFIG_SPI_DRIVER + syslog(LOG_INFO, "Initializing /dev/spi%d...\n", port); + + ret = spi_register(spi, port); + if (ret < 0) + { + syslog(LOG_ERR, "Failed to register /dev/spi%d: %d\n", port, ret); + esp_spibus_uninitialize(spi); + } +#endif + + return ret; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_spidev_initialize + * + * Description: + * Configure the SPI drivers. + * + * Input Parameters: + * port - The SPI bus number, used to build the device path as /dev/spiN + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +int board_spidev_initialize(int port) +{ + int ret = OK; + + switch (port) + { +#ifdef CONFIG_ESPRESSIF_SPI2 + case ESPRESSIF_SPI2: + { + ret = spi_driver_init(ESPRESSIF_SPI2); + if (ret != OK) + { + return ret; + } + break; + } +#endif + +#ifdef CONFIG_ESPRESSIF_SPI_BITBANG + case ESPRESSIF_SPI_BITBANG: + { + ret = spi_bitbang_driver_init(ESPRESSIF_SPI_BITBANG); + if (ret != OK) + { + return ret; + } + break; + } +#endif + + default: + { + syslog(LOG_ERR, "ERROR: unsupported SPI %d\n", port); + return ERROR; + } + } + + return ret; +} diff --git a/boards/risc-v/esp32c2/common/src/esp_board_spiflash.c b/boards/risc-v/esp32c2/common/src/esp_board_spiflash.c new file mode 100644 index 0000000000000..d3e22e0a17498 --- /dev/null +++ b/boards/risc-v/esp32c2/common/src/esp_board_spiflash.c @@ -0,0 +1,499 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/common/src/esp_board_spiflash.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "inttypes.h" +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include +#include +#include +#include + +#include "espressif/esp_spiflash.h" +#include "espressif/esp_spiflash_mtd.h" + +#include "esp_board_spiflash.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +#ifdef CONFIG_ESPRESSIF_HAVE_OTA_PARTITION +static int init_ota_partitions(void); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef CONFIG_ESPRESSIF_HAVE_OTA_PARTITION +static const struct partition_s g_ota_partition_table[] = +{ + { + .name = CONFIG_ESPRESSIF_OTA_PRIMARY_SLOT_DEVPATH, + .index = 0, + .firstblock = CONFIG_ESPRESSIF_OTA_PRIMARY_SLOT_OFFSET, + .blocksize = CONFIG_ESPRESSIF_OTA_SLOT_SIZE, + }, + { + .name = CONFIG_ESPRESSIF_OTA_SECONDARY_SLOT_DEVPATH, + .index = 1, + .firstblock = CONFIG_ESPRESSIF_OTA_SECONDARY_SLOT_OFFSET, + .blocksize = CONFIG_ESPRESSIF_OTA_SLOT_SIZE, + }, + { + .name = CONFIG_ESPRESSIF_OTA_SCRATCH_DEVPATH, + .index = 2, + .firstblock = CONFIG_ESPRESSIF_OTA_SCRATCH_OFFSET, + .blocksize = CONFIG_ESPRESSIF_OTA_SCRATCH_SIZE, + } +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: init_ota_partitions + * + * Description: + * Initialize partitions that are dedicated to firmware OTA update. + * + * Input Parameters: + * None. + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#ifdef CONFIG_ESPRESSIF_HAVE_OTA_PARTITION +static int init_ota_partitions(void) +{ + struct mtd_dev_s *mtd; + int ret = OK; + int i; + + for (i = 0; i < nitems(g_ota_partition_table); ++i) + { + const struct partition_s *part = &g_ota_partition_table[i]; + + mtd = esp_spiflash_alloc_mtdpart(part->firstblock, part->blocksize); + + ret = register_mtddriver(part->name, mtd, 0755, NULL); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: register_mtddriver %s failed: %d\n", + part->name, ret); + return ret; + } + } + + return ret; +} + +#endif + +/**************************************************************************** + * Name: setup_smartfs + * + * Description: + * Provide a block driver wrapper around MTD partition and mount a + * SMART FS over it. + * + * Parameters: + * smartn - Number used to register the mtd partition: /dev/smartx, where + * x = smartn. + * mtd - Pointer to a pre-allocated mtd partition. + * mnt_pt - Mount point + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#if defined (CONFIG_ESPRESSIF_SPIFLASH_SMARTFS) +static int setup_smartfs(int smartn, struct mtd_dev_s *mtd, + const char *mnt_pt) +{ + int ret = OK; + char path[22]; + + ret = smart_initialize(smartn, mtd, NULL); + if (ret < 0) + { + syslog(LOG_INFO, "smart_initialize failed, " + "Trying to erase first...\n"); + ret = mtd->ioctl(mtd, MTDIOC_BULKERASE, 0); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: ioctl(BULKERASE) failed: %d\n", ret); + return ret; + } + + syslog(LOG_INFO, "Erase successful, initializing it again.\n"); + ret = smart_initialize(smartn, mtd, NULL); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: smart_initialize failed: %d\n", ret); + return ret; + } + } + + if (mnt_pt != NULL) + { + snprintf(path, sizeof(path), "/dev/smart%d", smartn); + + ret = nx_mount(path, mnt_pt, "smartfs", 0, NULL); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to mount the FS volume: %d\n", + ret); + if (ret == -ENODEV) + { + syslog(LOG_WARNING, "Smartfs seems unformatted. " + "Did you run 'mksmartfs /dev/smart%d'?\n", smartn); + } + + return ret; + } + } + + return ret; +} +#endif + +/**************************************************************************** + * Name: setup_littlefs + * + * Description: + * Register a mtd driver and mount a Little FS over it. + * + * Parameters: + * path - Path name used to register the mtd driver. + * mtd - Pointer to a pre-allocated mtd partition. + * mnt_pt - Mount point + * priv - Privileges + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#if defined (CONFIG_ESPRESSIF_SPIFLASH_LITTLEFS) +static int setup_littlefs(const char *path, struct mtd_dev_s *mtd, + const char *mnt_pt, int priv) +{ + int ret = OK; + + ret = register_mtddriver(path, mtd, priv, NULL); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to register MTD: %d\n", ret); + return ERROR; + } + + if (mnt_pt != NULL) + { + ret = nx_mount(path, mnt_pt, "littlefs", 0, NULL); + if (ret < 0) + { + ret = nx_mount(path, mnt_pt, "littlefs", 0, "forceformat"); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to mount the FS volume: %d\n", + ret); + return ret; + } + } + } + + return OK; +} +#endif + +/**************************************************************************** + * Name: setup_spiffs + * + * Description: + * Register a mtd driver and mount a SPIFFS over it. + * + * Parameters: + * path - Path name used to register the mtd driver. + * mtd - Pointer to a pre-allocated mtd partition. + * mnt_pt - Mount point + * priv - Privileges + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#if defined (CONFIG_ESPRESSIF_SPIFLASH_SPIFFS) +static int setup_spiffs(const char *path, struct mtd_dev_s *mtd, + const char *mnt_pt, int priv) +{ + int ret = OK; + + ret = register_mtddriver(path, mtd, priv, NULL); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to register MTD: %d\n", ret); + return ERROR; + } + + if (mnt_pt != NULL) + { + ret = nx_mount(path, mnt_pt, "spiffs", 0, NULL); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to mount the FS volume: %d\n", + ret); + return ret; + } + } + + return ret; +} +#endif + +/**************************************************************************** + * Name: setup_nxffs + * + * Description: + * Register a mtd driver and mount a NXFFS over it. + * + * Parameters: + * mtd - Pointer to a pre-allocated mtd partition. + * mnt_pt - Mount point + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#if defined (CONFIG_ESPRESSIF_SPIFLASH_NXFFS) +static int setup_nxffs(struct mtd_dev_s *mtd, const char *mnt_pt) +{ + int ret = OK; + + ret = nxffs_initialize(mtd); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: NXFFS init failed: %d\n", ret); + return ret; + } + + if (mnt_pt != NULL) + { + ret = nx_mount(NULL, mnt_pt, "nxffs", 0, NULL); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to mount the FS volume: %d\n", + ret); + return ret; + } + } + + return ret; +} +#endif + +/**************************************************************************** + * Name: init_storage_partition + * + * Description: + * Initialize partition that is dedicated to general use. + * + * Input Parameters: + * None + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int init_storage_partition(void) +{ + int ret = OK; + struct mtd_dev_s *mtd; + + mtd = esp_spiflash_alloc_mtdpart(CONFIG_ESPRESSIF_STORAGE_MTD_OFFSET, + CONFIG_ESPRESSIF_STORAGE_MTD_SIZE); + if (!mtd) + { + syslog(LOG_ERR, "ERROR: Fail to alloc MTD partition of SPI Flash\n"); + return ERROR; + } + +#if defined (CONFIG_ESPRESSIF_SPIFLASH_SMARTFS) + + ret = setup_smartfs(0, mtd, CONFIG_ESPRESSIF_SPIFLASH_FS_MOUNT_PT); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to setup smartfs\n"); + return ret; + } + +#elif defined (CONFIG_ESPRESSIF_SPIFLASH_NXFFS) + + ret = setup_nxffs(mtd, CONFIG_ESPRESSIF_SPIFLASH_FS_MOUNT_PT); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to setup nxffs\n"); + return ret; + } + +#elif defined (CONFIG_ESPRESSIF_SPIFLASH_LITTLEFS) + + const char *path = "/dev/espflash"; + + ret = setup_littlefs(path, mtd, CONFIG_ESPRESSIF_SPIFLASH_FS_MOUNT_PT, + 0755); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to setup littlefs\n"); + return ret; + } + +#elif defined (CONFIG_ESPRESSIF_SPIFLASH_SPIFFS) + + const char *path = "/dev/espflash"; + + ret = setup_spiffs(path, mtd, CONFIG_ESPRESSIF_SPIFLASH_FS_MOUNT_PT, + 0755); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to setup spiffs\n"); + return ret; + } + +#elif defined (CONFIG_ESPRESSIF_SPIFLASH_MTD_CONFIG) + +# if defined (CONFIG_TESTING_MTD_CONFIG_NVS) + + /* To test power-loss resilient kv system, + * we write possible power-loss flash layout into flash + * then start kv system to see if it recovers. + * To do so, we need a mtd driver so that test code can + * write into flash. + */ + + const char *path = CONFIG_TESTING_MTD_CONFIG_MOUNTPT_NAME; + + ret = register_mtddriver(path, mtd, 0777, NULL); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to register MTD: %d\n", ret); + return ret; + } + +# else + + ret = mtdconfig_register(mtd); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to setup mtd config\n"); + return ret; + } + +# endif + +#else + + ret = register_mtddriver("/dev/mtdblock0", mtd, 0755, NULL); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to register MTD mtdblock0: %d\n", ret); + return ret; + } + +#endif + + return ret; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_spiflash_init + * + * Description: + * Initialize the SPI Flash and register the MTD device. + * + * Input Parameters: + * None. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +int board_spiflash_init(void) +{ + int ret = OK; + +#ifdef CONFIG_ESPRESSIF_HAVE_OTA_PARTITION + ret = init_ota_partitions(); + if (ret < 0) + { + return ret; + } +#endif + + ret = init_storage_partition(); + if (ret < 0) + { + return ret; + } + + return ret; +} diff --git a/boards/risc-v/esp32c2/common/src/esp_board_spislavedev.c b/boards/risc-v/esp32c2/common/src/esp_board_spislavedev.c new file mode 100644 index 0000000000000..1bdd25bbbcd8b --- /dev/null +++ b/boards/risc-v/esp32c2/common/src/esp_board_spislavedev.c @@ -0,0 +1,85 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/common/src/esp_board_spislavedev.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "espressif/esp_spi.h" + +#include "esp_board_spislavedev.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_spislavedev_initialize + * + * Description: + * Initialize SPI Slave driver and register the /dev/spislv device. + * + * Input Parameters: + * bus - The SPI bus number, used to build the device path as /dev/spislvN + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +int board_spislavedev_initialize(int bus) +{ + struct spi_slave_ctrlr_s *ctrlr; + int ret = OK; + + /* Initialize SPI Slave controller device */ + + ctrlr = esp_spislave_ctrlr_initialize(bus); + if (ctrlr == NULL) + { + syslog(LOG_ERR, "Failed to initialize SPI%d as slave.\n", bus); + return -ENODEV; + } + +#ifdef CONFIG_SPI_SLAVE_DRIVER + syslog(LOG_INFO, "Initializing /dev/spislv%d...\n", bus); + + ret = spi_slave_register(ctrlr, bus); + if (ret < 0) + { + syslog(LOG_ERR, "Failed to register /dev/spislv%d: %d\n", bus, ret); + + esp_spislave_ctrlr_uninitialize(ctrlr); + } +#endif + + return ret; +} diff --git a/boards/risc-v/esp32c2/common/src/esp_board_wlan.c b/boards/risc-v/esp32c2/common/src/esp_board_wlan.c new file mode 100644 index 0000000000000..2fc7ae3cee05e --- /dev/null +++ b/boards/risc-v/esp32c2/common/src/esp_board_wlan.c @@ -0,0 +1,82 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/common/src/esp_board_wlan.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include + +#include + +#include "espressif/esp_wlan_netdev.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_wlan_init + * + * Description: + * Configure the wireless subsystem. + * + * Input Parameters: + * None. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +int board_wlan_init(void) +{ + int ret = OK; + +#ifdef ESP_WLAN_HAS_STA + ret = esp_wlan_sta_initialize(); + if (ret) + { + wlerr("ERROR: Failed to initialize Wi-Fi station\n"); + return ret; + } +#endif /* ESP_WLAN_HAS_STA */ + +#ifdef ESP_WLAN_HAS_SOFTAP + ret = esp_wlan_softap_initialize(); + if (ret) + { + wlerr("ERROR: Failed to initialize Wi-Fi softAP\n"); + return ret; + } +#endif /* ESP_WLAN_HAS_SOFTAP */ + + return ret; +} diff --git a/boards/risc-v/esp32c2/common/src/etc/init.d/rc.sysinit b/boards/risc-v/esp32c2/common/src/etc/init.d/rc.sysinit new file mode 100644 index 0000000000000..3fcb3d91adb2f --- /dev/null +++ b/boards/risc-v/esp32c2/common/src/etc/init.d/rc.sysinit @@ -0,0 +1,27 @@ +/**************************************************************************** + * boards/risc-v/esp32c3/common/src/etc/init.d/rc.sysinit + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#include + +/* This script "rc.sysinit" is executed after the board bring up. */ + +echo "rc.sysinit is called!" diff --git a/boards/risc-v/esp32c2/common/src/etc/init.d/rcS b/boards/risc-v/esp32c2/common/src/etc/init.d/rcS new file mode 100644 index 0000000000000..2a2fa63c13b02 --- /dev/null +++ b/boards/risc-v/esp32c2/common/src/etc/init.d/rcS @@ -0,0 +1,29 @@ +/**************************************************************************** + * boards/risc-v/esp32c3/common/src/etc/init.d/rcS + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#include + +/* This script "rcS" is executed after the rc.sysinit script. + * It should startup some application and other system service. + */ + +echo "rcS file is called!" diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/CMakeLists.txt b/boards/risc-v/esp32c2/esp8684-devkitm/CMakeLists.txt new file mode 100644 index 0000000000000..b4d1f247df90b --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/CMakeLists.txt @@ -0,0 +1,23 @@ +# ############################################################################## +# boards/risc-v/esp32c2/esp8684-devkitm/CMakeLists.txt +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more contributor +# license agreements. See the NOTICE file distributed with this work for +# additional information regarding copyright ownership. The ASF licenses this +# file to you under the Apache License, Version 2.0 (the "License"); you may not +# use this file except in compliance with the License. You may obtain a copy of +# the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations under +# the License. +# +# ############################################################################## + +add_subdirectory(src) diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/Kconfig b/boards/risc-v/esp32c2/esp8684-devkitm/Kconfig new file mode 100644 index 0000000000000..c1ab420543eaf --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/Kconfig @@ -0,0 +1,8 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_ESP8684_DEVKITM + +endif # ARCH_BOARD_ESP8684_DEVKITM diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/configs/adc/defconfig b/boards/risc-v/esp32c2/esp8684-devkitm/configs/adc/defconfig new file mode 100644 index 0000000000000..48099d04bce3f --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/configs/adc/defconfig @@ -0,0 +1,50 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp8684-devkitm" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP8684_DEVKITM=y +CONFIG_ARCH_CHIP="esp32c2" +CONFIG_ARCH_CHIP_ESP32C2=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_ESPRESSIF_ADC=y +CONFIG_EXAMPLES_ADC=y +CONFIG_EXAMPLES_ADC_SWTRIG=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/configs/autopm/defconfig b/boards/risc-v/esp32c2/esp8684-devkitm/configs/autopm/defconfig new file mode 100644 index 0000000000000..f965e82d3e11f --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/configs/autopm/defconfig @@ -0,0 +1,52 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp8684-devkitm" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP8684_DEVKITM=y +CONFIG_ARCH_CHIP="esp32c2" +CONFIG_ARCH_CHIP_ESP32C2=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_ESPRESSIF_AUTO_SLEEP=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_DISABLE_DATE=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PM_UART_WAKEUP=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_RTC=y +CONFIG_RTC_DRIVER=y +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/configs/ble/defconfig b/boards/risc-v/esp32c2/esp8684-devkitm/configs/ble/defconfig new file mode 100644 index 0000000000000..cc872728b0766 --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/configs/ble/defconfig @@ -0,0 +1,68 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ALLOW_BSD_COMPONENTS=y +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp8684-devkitm" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP8684_DEVKITM=y +CONFIG_ARCH_CHIP="esp32c2" +CONFIG_ARCH_CHIP_ESP32C2=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=12000 +CONFIG_ESPRESSIF_CPU_FREQ_120=y +CONFIG_ESPRESSIF_FLASH_2M=y +CONFIG_BTSAK=y +CONFIG_BUILTIN=y +CONFIG_DRIVERS_BLUETOOTH=y +CONFIG_DRIVERS_IEEE80211=y +CONFIG_DRIVERS_WIRELESS=y +CONFIG_ESPRESSIF_BLE=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_LINE_MAX=64 +CONFIG_NAME_MAX=48 +CONFIG_NETDEV_LATEINIT=y +CONFIG_NET_BLUETOOTH=y +CONFIG_NET_SOCKOPTS=y +CONFIG_NET_TCP=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_DISABLE_DATE=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_PREALLOC_TIMERS=0 +CONFIG_PTHREAD_MUTEX_TYPES=y +CONFIG_RR_INTERVAL=200 +CONFIG_RTC_ALARM=y +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_SIG_DEFAULT=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_UART0_SERIAL_CONSOLE=y +CONFIG_WIRELESS=y +CONFIG_WIRELESS_BLUETOOTH=y diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/configs/bmp180/defconfig b/boards/risc-v/esp32c2/esp8684-devkitm/configs/bmp180/defconfig new file mode 100644 index 0000000000000..857e56da222e9 --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/configs/bmp180/defconfig @@ -0,0 +1,51 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp8684-devkitm" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP8684_DEVKITM=y +CONFIG_ARCH_CHIP="esp32c2" +CONFIG_ARCH_CHIP_ESP32C2=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_ESPRESSIF_I2C0=y +CONFIG_EXAMPLES_BMP180=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_SENSORS=y +CONFIG_SENSORS_BMP180=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/configs/buttons/defconfig b/boards/risc-v/esp32c2/esp8684-devkitm/configs/buttons/defconfig new file mode 100644 index 0000000000000..7b54071385e9f --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/configs/buttons/defconfig @@ -0,0 +1,48 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp8684-devkitm" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP8684_DEVKITM=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="esp32c2" +CONFIG_ARCH_CHIP_ESP32C2=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=12000 +CONFIG_BUILTIN=y +CONFIG_ESPRESSIF_CPU_FREQ_120=y +CONFIG_ESPRESSIF_FLASH_2M=y +CONFIG_ESPRESSIF_GPIO_IRQ=y +CONFIG_EXAMPLES_BUTTONS=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INPUT=y +CONFIG_INPUT_BUTTONS=y +CONFIG_INPUT_BUTTONS_LOWER=y +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/configs/crypto/defconfig b/boards/risc-v/esp32c2/esp8684-devkitm/configs/crypto/defconfig new file mode 100644 index 0000000000000..2f39a26135cd8 --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/configs/crypto/defconfig @@ -0,0 +1,62 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_TESTING_CRYPTO_3DES_CBC is not set +# CONFIG_TESTING_CRYPTO_AES_XTS is not set +# CONFIG_TESTING_CRYPTO_HASH_HUGE_BLOCK is not set +CONFIG_ALLOW_BSD_COMPONENTS=y +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp8684-devkitm" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP8684_DEVKITM=y +CONFIG_ARCH_CHIP="esp32c2" +CONFIG_ARCH_CHIP_ESP32C2=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_CRYPTO=y +CONFIG_CRYPTO_CRYPTODEV=y +CONFIG_CRYPTO_CRYPTODEV_HARDWARE=y +CONFIG_CRYPTO_RANDOM_POOL=y +CONFIG_ESPRESSIF_SHA_ACCELERATOR=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_TESTING_CRYPTO=y +CONFIG_TESTING_CRYPTO_HASH=y +CONFIG_TESTING_CRYPTO_HASH_DISABLE_MD5=y +CONFIG_TESTING_CRYPTO_HASH_DISABLE_SHA224=y +CONFIG_TESTING_CRYPTO_HASH_DISABLE_SHA512=y +CONFIG_TESTING_CRYPTO_STACKSIZE=4096 +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/configs/efuse/defconfig b/boards/risc-v/esp32c2/esp8684-devkitm/configs/efuse/defconfig new file mode 100644 index 0000000000000..4afba3155ab15 --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/configs/efuse/defconfig @@ -0,0 +1,49 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp8684-devkitm" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP8684_DEVKITM=y +CONFIG_ARCH_CHIP="esp32c2" +CONFIG_ARCH_CHIP_ESP32C2=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_ESPRESSIF_EFUSE=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=3072 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INIT_STACKSIZE=4096 +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/configs/gpio/defconfig b/boards/risc-v/esp32c2/esp8684-devkitm/configs/gpio/defconfig new file mode 100644 index 0000000000000..06b5595526468 --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/configs/gpio/defconfig @@ -0,0 +1,44 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp8684-devkitm" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP8684_DEVKITM=y +CONFIG_ARCH_CHIP="esp32c2" +CONFIG_ARCH_CHIP_ESP32C2=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=12000 +CONFIG_BUILTIN=y +CONFIG_DEV_GPIO=y +CONFIG_ESPRESSIF_CPU_FREQ_120=y +CONFIG_ESPRESSIF_FLASH_2M=y +CONFIG_ESPRESSIF_GPIO_IRQ=y +CONFIG_EXAMPLES_GPIO=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/configs/i2c/defconfig b/boards/risc-v/esp32c2/esp8684-devkitm/configs/i2c/defconfig new file mode 100644 index 0000000000000..f1b404c04dab5 --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/configs/i2c/defconfig @@ -0,0 +1,52 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp8684-devkitm" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP8684_DEVKITM=y +CONFIG_ARCH_CHIP="esp32c2" +CONFIG_ARCH_CHIP_ESP32C2=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_ESPRESSIF_I2C0=y +CONFIG_FS_PROCFS=y +CONFIG_I2CTOOL_DEFFREQ=100000 +CONFIG_I2CTOOL_MAXBUS=1 +CONFIG_I2C_TRACE=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_I2CTOOL=y +CONFIG_SYSTEM_NSH=y +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/configs/mcuboot_nsh/defconfig b/boards/risc-v/esp32c2/esp8684-devkitm/configs/mcuboot_nsh/defconfig new file mode 100644 index 0000000000000..8793639a141c5 --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/configs/mcuboot_nsh/defconfig @@ -0,0 +1,48 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp8684-devkitm" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP8684_DEVKITM=y +CONFIG_ARCH_CHIP="esp32c2" +CONFIG_ARCH_CHIP_ESP32C2=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/configs/nsh/defconfig b/boards/risc-v/esp32c2/esp8684-devkitm/configs/nsh/defconfig new file mode 100644 index 0000000000000..168fba6c54157 --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/configs/nsh/defconfig @@ -0,0 +1,51 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp8684-devkitm" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP8684_DEVKITM=y +CONFIG_ARCH_CHIP="esp32c2" +CONFIG_ARCH_CHIP_ESP32C2=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=12000 +CONFIG_BUILTIN=y +CONFIG_DEBUG_FEATURES=y +CONFIG_ESPRESSIF_CPU_FREQ_120=y +CONFIG_ESPRESSIF_FLASH_4M=y +CONFIG_ESPRESSIF_XTAL_FREQ_26M=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/configs/ostest/defconfig b/boards/risc-v/esp32c2/esp8684-devkitm/configs/ostest/defconfig new file mode 100644 index 0000000000000..cc5d1fe347886 --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/configs/ostest/defconfig @@ -0,0 +1,46 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp8684-devkitm" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP8684_DEVKITM=y +CONFIG_ARCH_CHIP="esp32c2" +CONFIG_ARCH_CHIP_ESP32C2=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_TESTING_OSTEST=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/configs/pm/defconfig b/boards/risc-v/esp32c2/esp8684-devkitm/configs/pm/defconfig new file mode 100644 index 0000000000000..2101559b83d00 --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/configs/pm/defconfig @@ -0,0 +1,54 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp8684-devkitm" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP8684_DEVKITM=y +CONFIG_ARCH_CHIP="esp32c2" +CONFIG_ARCH_CHIP_ESP32C2=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_FS_PROCFS=y +CONFIG_FS_PROCFS_REGISTER=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PM=y +CONFIG_PM_GOVERNOR_EXPLICIT_RELAX=-1 +CONFIG_PM_GOVERNOR_GREEDY=y +CONFIG_PM_PROCFS=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_RTC=y +CONFIG_RTC_DRIVER=y +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/configs/pwm/defconfig b/boards/risc-v/esp32c2/esp8684-devkitm/configs/pwm/defconfig new file mode 100644 index 0000000000000..5cf39e4caf657 --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/configs/pwm/defconfig @@ -0,0 +1,49 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp8684-devkitm" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP8684_DEVKITM=y +CONFIG_ARCH_CHIP="esp32c2" +CONFIG_ARCH_CHIP_ESP32C2=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_ESPRESSIF_LEDC=y +CONFIG_ESPRESSIF_LEDC_TIMER0=y +CONFIG_EXAMPLES_PWM=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/configs/random/defconfig b/boards/risc-v/esp32c2/esp8684-devkitm/configs/random/defconfig new file mode 100644 index 0000000000000..6c778822de9eb --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/configs/random/defconfig @@ -0,0 +1,48 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp8684-devkitm" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP8684_DEVKITM=y +CONFIG_ARCH_CHIP="esp32c2" +CONFIG_ARCH_CHIP_ESP32C2=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_DEV_URANDOM=y +CONFIG_EXAMPLES_RANDOM=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=3 +CONFIG_START_YEAR=2023 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/configs/romfs/defconfig b/boards/risc-v/esp32c2/esp8684-devkitm/configs/romfs/defconfig new file mode 100644 index 0000000000000..436f63aebfcc1 --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/configs/romfs/defconfig @@ -0,0 +1,49 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp8684-devkitm" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP8684_DEVKITM=y +CONFIG_ARCH_CHIP="esp32c2" +CONFIG_ARCH_CHIP_ESP32C2=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_ETC_ROMFS=y +CONFIG_FS_PROCFS=y +CONFIG_FS_ROMFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/configs/rtc/defconfig b/boards/risc-v/esp32c2/esp8684-devkitm/configs/rtc/defconfig new file mode 100644 index 0000000000000..346921092187d --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/configs/rtc/defconfig @@ -0,0 +1,52 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp8684-devkitm" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP8684_DEVKITM=y +CONFIG_ARCH_CHIP="esp32c2" +CONFIG_ARCH_CHIP_ESP32C2=y +CONFIG_ARCH_INTERRUPTSTACK=1536 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_EXAMPLES_ALARM=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_DISABLE_DATE=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_RTC=y +CONFIG_RTC_ALARM=y +CONFIG_RTC_DRIVER=y +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=5 +CONFIG_START_MONTH=4 +CONFIG_START_YEAR=2023 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/configs/sdmmc_spi/defconfig b/boards/risc-v/esp32c2/esp8684-devkitm/configs/sdmmc_spi/defconfig new file mode 100644 index 0000000000000..f9777cbe8f429 --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/configs/sdmmc_spi/defconfig @@ -0,0 +1,58 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_MMCSD_HAVE_CARDDETECT is not set +# CONFIG_MMCSD_HAVE_WRITEPROTECT is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_SPI_CALLBACK is not set +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp8684-devkitm" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP8684_DEVKITM=y +CONFIG_ARCH_CHIP="esp32c2" +CONFIG_ARCH_CHIP_ESP32C2=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_ESPRESSIF_SPI2=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FS_FAT=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_MMCSD=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_MMCSDSPIPORTNO=2 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_SPITOOL_MINBUS=2 +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_SPITOOL=y +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/configs/spi/defconfig b/boards/risc-v/esp32c2/esp8684-devkitm/configs/spi/defconfig new file mode 100644 index 0000000000000..fe331832a4793 --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/configs/spi/defconfig @@ -0,0 +1,50 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp8684-devkitm" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP8684_DEVKITM=y +CONFIG_ARCH_CHIP="esp32c2" +CONFIG_ARCH_CHIP_ESP32C2=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_ESPRESSIF_SPI2=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_SPITOOL_MINBUS=2 +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_SPITOOL=y +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/configs/spiflash/defconfig b/boards/risc-v/esp32c2/esp8684-devkitm/configs/spiflash/defconfig new file mode 100644 index 0000000000000..90841c45ae85e --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/configs/spiflash/defconfig @@ -0,0 +1,52 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp8684-devkitm" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP8684_DEVKITM=y +CONFIG_ARCH_CHIP="esp32c2" +CONFIG_ARCH_CHIP_ESP32C2=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=12000 +CONFIG_BUILTIN=y +CONFIG_ESPRESSIF_CPU_FREQ_120=y +CONFIG_ESPRESSIF_FLASH_2M=y +CONFIG_ESPRESSIF_SPIFLASH=y +CONFIG_ESPRESSIF_SPIFLASH_SMARTFS=y +CONFIG_ESPRESSIF_SPIFLASH_FS_MOUNT_PT="/mnt" +CONFIG_ESPRESSIF_STORAGE_MTD_OFFSET=0x110000 +CONFIG_ESPRESSIF_STORAGE_MTD_SIZE=0xf0000 +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NAME_MAX=48 +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_DISABLE_LOSMART=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_SMARTFS_MAXNAMLEN=48 +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_FLASH_ERASEALL=y +CONFIG_SYSTEM_NSH=y +CONFIG_TESTING_FSTEST=y +CONFIG_TESTING_FSTEST_MOUNTPT="/mnt" +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/configs/temperature_sensor/defconfig b/boards/risc-v/esp32c2/esp8684-devkitm/configs/temperature_sensor/defconfig new file mode 100644 index 0000000000000..e2d47a33bb81e --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/configs/temperature_sensor/defconfig @@ -0,0 +1,51 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp8684-devkitm" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP8684_DEVKITM=y +CONFIG_ARCH_CHIP="esp32c2" +CONFIG_ARCH_CHIP_ESP32C2=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_ESPRESSIF_TEMP=y +CONFIG_ESPRESSIF_TEMP_UORB=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_SENSORS=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_SENSORTEST=y +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/configs/tickless/defconfig b/boards/risc-v/esp32c2/esp8684-devkitm/configs/tickless/defconfig new file mode 100644 index 0000000000000..1c2521a322bab --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/configs/tickless/defconfig @@ -0,0 +1,48 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp8684-devkitm" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP8684_DEVKITM=y +CONFIG_ARCH_CHIP="esp32c2" +CONFIG_ARCH_CHIP_ESP32C2=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_TICKLESS=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_UART0_SERIAL_CONSOLE=y +CONFIG_USEC_PER_TICK=10000 diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/configs/timers/defconfig b/boards/risc-v/esp32c2/esp8684-devkitm/configs/timers/defconfig new file mode 100644 index 0000000000000..1455c09271054 --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/configs/timers/defconfig @@ -0,0 +1,48 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp8684-devkitm" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP8684_DEVKITM=y +CONFIG_ARCH_CHIP="esp32c2" +CONFIG_ARCH_CHIP_ESP32C2=y +CONFIG_ARCH_INTERRUPTSTACK=1536 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_EXAMPLES_TIMER=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=28 +CONFIG_START_MONTH=3 +CONFIG_START_YEAR=2023 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_TIMER=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/configs/watchdog/defconfig b/boards/risc-v/esp32c2/esp8684-devkitm/configs/watchdog/defconfig new file mode 100644 index 0000000000000..27c1c65fa808f --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/configs/watchdog/defconfig @@ -0,0 +1,48 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp8684-devkitm" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP8684_DEVKITM=y +CONFIG_ARCH_CHIP="esp32c2" +CONFIG_ARCH_CHIP_ESP32C2=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_ESPRESSIF_MWDT0=y +CONFIG_EXAMPLES_WATCHDOG=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/configs/wifi/defconfig b/boards/risc-v/esp32c2/esp8684-devkitm/configs/wifi/defconfig new file mode 100644 index 0000000000000..acc0d8f7da3a7 --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/configs/wifi/defconfig @@ -0,0 +1,76 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +CONFIG_ALLOW_BSD_COMPONENTS=y +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp8684-devkitm" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP8684_DEVKITM=y +CONFIG_ARCH_CHIP="esp32c2" +CONFIG_ARCH_CHIP_ESP32C2=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=12000 +CONFIG_BUILTIN=y +CONFIG_DRIVERS_IEEE80211=y +CONFIG_DRIVERS_WIRELESS=y +CONFIG_ESPRESSIF_CPU_FREQ_120=y +CONFIG_ESPRESSIF_FLASH_2M=y +CONFIG_ESPRESSIF_SPIFLASH=y +CONFIG_ESPRESSIF_SPIFLASH_SPIFFS=y +CONFIG_ESPRESSIF_WIFI=y +CONFIG_EXAMPLES_RANDOM=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INIT_STACKSIZE=8192 +CONFIG_INTELHEX_BINARY=y +CONFIG_IOB_BUFSIZE=128 +CONFIG_IOB_NBUFFERS=160 +CONFIG_IOB_THROTTLE=24 +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDEV_LATEINIT=y +CONFIG_NETDEV_PHY_IOCTL=y +CONFIG_NETDEV_WIRELESS_IOCTL=y +CONFIG_NETUTILS_CJSON=y +CONFIG_NETUTILS_IPERF=y +CONFIG_NET_BROADCAST=y +CONFIG_NET_ETH_PKTSIZE=1514 +CONFIG_NET_ICMP_SOCKET=y +CONFIG_NET_TCP=y +CONFIG_NET_TCP_DELAYED_ACK=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_UDP=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_PTHREAD_MUTEX_TYPES=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_LPWORK=y +CONFIG_SCHED_WAITPID=y +CONFIG_SIG_DEFAULT=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DHCPC_RENEW=y +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_PING=y +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_TLS_TASK_NELEM=4 +CONFIG_UART0_SERIAL_CONSOLE=y +CONFIG_WIRELESS=y +CONFIG_WIRELESS_WAPI=y +CONFIG_WIRELESS_WAPI_CMDTOOL=y +CONFIG_WIRELESS_WAPI_INITCONF=y diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/include/board.h b/boards/risc-v/esp32c2/esp8684-devkitm/include/board.h new file mode 100644 index 0000000000000..5de3cf7fa37ac --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/include/board.h @@ -0,0 +1,47 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/esp8684-devkitm/include/board.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_RISCV_ESP32C2_ESP8684_DEVKITM_INCLUDE_BOARD_H +#define __BOARDS_RISCV_ESP32C2_ESP8684_DEVKITM_INCLUDE_BOARD_H + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* GPIO pins used by the GPIO Subsystem */ + +#define BOARD_NGPIOOUT 3 /* Amount of GPIO Output pins (RGB LEDs) */ +#define BOARD_NGPIOINT 1 /* Amount of GPIO Input w/ Interruption pins */ + +/* ESP8684-DevKitM GPIOs ****************************************************/ + +/* BOOT Button */ + +#define BUTTON_BOOT 9 + +/* On-board RGB LEDs */ + +#define LED_RED 0 +#define LED_GREEN 1 +#define LED_BLUE 8 + +#endif /* __BOARDS_RISCV_ESP32C2_ESP8684_DEVKITM_INCLUDE_BOARD_H */ diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/scripts/Make.defs b/boards/risc-v/esp32c2/esp8684-devkitm/scripts/Make.defs new file mode 100644 index 0000000000000..7ca38b6d604b6 --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/scripts/Make.defs @@ -0,0 +1,62 @@ +############################################################################ +# boards/risc-v/esp32c2/esp8684-devkitm/scripts/Make.defs +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +########################################################################### + +include $(TOPDIR)/.config +include $(TOPDIR)/tools/Config.mk +include $(TOPDIR)/tools/espressif/Config.mk +include $(TOPDIR)/arch/risc-v/src/common/Toolchain.defs + +# Remove quotes from CONFIG_ESPRESSIF_CHIP_SERIES configuration + +CHIP_SERIES = $(patsubst "%",%,$(CONFIG_ESPRESSIF_CHIP_SERIES)) + +# Pick the linker scripts from the board level if they exist, if not +# pick the common linker scripts. + +ARCHSCRIPT += $(BOARD_COMMON_DIR)/scripts/$(CHIP_SERIES)_aliases.ld + +ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_flat_memory.ld) + +ifeq ($(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT),y) + ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_sections.ld) +else ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y) + ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_sections.ld) +else + ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_legacy_sections.ld) +endif + +ARCHPICFLAGS = -fpic + +CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -Werror=return-type +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) +AFLAGS := $(CFLAGS) -D__ASSEMBLY__ + +# Loadable module definitions + +LDMODULEFLAGS += -melf32lriscv + +# ELF module definitions + +LDELFFLAGS += -melf32lriscv diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/src/CMakeLists.txt b/boards/risc-v/esp32c2/esp8684-devkitm/src/CMakeLists.txt new file mode 100644 index 0000000000000..868782de2b8c9 --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/src/CMakeLists.txt @@ -0,0 +1,60 @@ +# ############################################################################## +# boards/risc-v/esp32c2/esp8684-devkitm/src/CMakeLists.txt +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more contributor +# license agreements. See the NOTICE file distributed with this work for +# additional information regarding copyright ownership. The ASF licenses this +# file to you under the Apache License, Version 2.0 (the "License"); you may not +# use this file except in compliance with the License. You may obtain a copy of +# the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations under +# the License. +# +# ############################################################################## + +set(SRCS esp32c2_boot.c esp32c2_bringup.c) + +if(CONFIG_BOARDCTL) + if(CONFIG_BOARDCTL_RESET) + list(APPEND SRCS esp32c2_reset.c) + endif() +endif() + +if(CONFIG_DEV_GPIO) + list(APPEND SRCS esp32c2_gpio.c) +endif() + +if(CONFIG_ARCH_BUTTONS) + list(APPEND SRCS esp32c2_buttons.c) +endif() + +target_sources(board PRIVATE ${SRCS}) + +# ############################################################################## +# Linker scripts (H2: sections or legacy_sections like C6) +# ############################################################################## + +string(REPLACE "\"" "" CHIP_SERIES "${CONFIG_ESPRESSIF_CHIP_SERIES}") + +set(BOARD_COMMON_DIR "${NUTTX_BOARD_DIR}/../common") + +set(LDSCRIPTS "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_aliases.ld" + "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_flat_memory.ld") + +if(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT OR CONFIG_ESPRESSIF_SIMPLE_BOOT) + list(APPEND LDSCRIPTS + "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_sections.ld") +else() + list(APPEND LDSCRIPTS + "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_legacy_sections.ld") +endif() + +set_property(GLOBAL APPEND PROPERTY LD_SCRIPT ${LDSCRIPTS}) diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/src/Make.defs b/boards/risc-v/esp32c2/esp8684-devkitm/src/Make.defs new file mode 100644 index 0000000000000..eb10b0d60f928 --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/src/Make.defs @@ -0,0 +1,41 @@ +############################################################################# +# boards/risc-v/esp32c2/esp8684-devkitm/src/Make.defs +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################# + +include $(TOPDIR)/Make.defs + +CSRCS = esp32c2_boot.c esp32c2_bringup.c + +ifeq ($(CONFIG_BOARDCTL_RESET),y) + CSRCS += esp32c2_reset.c +endif + +ifeq ($(CONFIG_DEV_GPIO),y) + CSRCS += esp32c2_gpio.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) + CSRCS += esp32c2_buttons.c +endif + +DEPPATH += --dep-path board +VPATH += :board +CFLAGS += ${INCDIR_PREFIX}$(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)board diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/src/esp32c2_boot.c b/boards/risc-v/esp32c2/esp8684-devkitm/src/esp32c2_boot.c new file mode 100644 index 0000000000000..8496076d9b4e4 --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/src/esp32c2_boot.c @@ -0,0 +1,91 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/esp8684-devkitm/src/esp32c2_boot.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "esp8684-devkitm.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp_board_initialize + * + * Description: + * All Espressif boards must provide the following entry point. + * This entry point is called early in the initialization -- after all + * memory has been configured and mapped but before any devices have been + * initialized. + * + * Input Parameters: + * None. + * + * Returned Value: + * None. + * + ****************************************************************************/ + +void esp_board_initialize(void) +{ +} + +/**************************************************************************** + * Name: board_late_initialize + * + * Description: + * If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_late_initialize(). board_late_initialize() will + * be called immediately after up_initialize() is called and just before + * the initial application is started. This additional initialization + * phase may be used, for example, to initialize board-specific device + * drivers. + * + * Input Parameters: + * None. + * + * Returned Value: + * None. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_LATE_INITIALIZE +void board_late_initialize(void) +{ + /* Perform board-specific initialization */ + + esp_bringup(); +} +#endif diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/src/esp32c2_bringup.c b/boards/risc-v/esp32c2/esp8684-devkitm/src/esp32c2_bringup.c new file mode 100644 index 0000000000000..e24d97ea1cb9f --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/src/esp32c2_bringup.c @@ -0,0 +1,397 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/esp8684-devkitm/src/esp32c2_bringup.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "esp_board_ledc.h" +#include "esp_board_spiflash.h" +#include "esp_board_i2c.h" +#include "esp_board_bmp180.h" + +#include "espressif/esp_start.h" + +#ifdef CONFIG_WATCHDOG +# include "espressif/esp_wdt.h" +#endif + +#ifdef CONFIG_TIMER +# include "espressif/esp_gptimer.h" +#endif + +#ifdef CONFIG_ONESHOT +# include "espressif/esp_oneshot.h" +#endif + +#ifdef CONFIG_RTC_DRIVER +# include "espressif/esp_rtc.h" +#endif + +#ifdef CONFIG_DEV_GPIO +# include "espressif/esp_gpio.h" +#endif + +#ifdef CONFIG_INPUT_BUTTONS +# include +#endif + +#ifdef CONFIG_ESPRESSIF_EFUSE +# include "espressif/esp_efuse.h" +#endif + +#ifdef CONFIG_ESPRESSIF_SPI +# include "espressif/esp_spi.h" +# include "esp_board_spidev.h" +# ifdef CONFIG_ESPRESSIF_SPI_BITBANG +# include "espressif/esp_spi_bitbang.h" +# endif +#endif + +#ifdef CONFIG_SPI_SLAVE +# include "espressif/esp_spi.h" +# include "esp_board_spislavedev.h" +#endif + +#ifdef CONFIG_ESPRESSIF_TEMP +# include "espressif/esp_temperature_sensor.h" +#endif + +#ifdef CONFIG_ESPRESSIF_ADC +# include "esp_board_adc.h" +#endif + +#ifdef CONFIG_SYSTEM_NXDIAG_ESPRESSIF_CHIP_WO_TOOL +# include "espressif/esp_nxdiag.h" +#endif + +#ifdef CONFIG_ESPRESSIF_SHA_ACCELERATOR +# include "espressif/esp_sha.h" +#endif + +#ifdef CONFIG_PM +# include "espressif/esp_pm.h" +#endif + +#ifdef CONFIG_MMCSD_SPI +# include "esp_board_mmcsd.h" +#endif + +#ifdef CONFIG_ESPRESSIF_BLE +# include "esp_ble.h" +#endif + +#ifdef CONFIG_ESPRESSIF_WIFI_BT_COEXIST +# include "private/esp_coexist_internal.h" +#endif + +#ifdef CONFIG_ESPRESSIF_WIFI +# include "esp_board_wlan.h" +#endif + +#include "esp8684-devkitm.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp_bringup + * + * Description: + * Perform architecture-specific initialization. + * + * CONFIG_BOARD_LATE_INITIALIZE=y : + * Called from board_late_initialize(). + * + * Input Parameters: + * None. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned on + * any failure. + * + ****************************************************************************/ + +int esp_bringup(void) +{ + int ret = OK; + +#ifdef CONFIG_FS_PROCFS + /* Mount the procfs file system */ + + ret = nx_mount(NULL, "/proc", "procfs", 0, NULL); + if (ret < 0) + { + _err("Failed to mount procfs at /proc: %d\n", ret); + } +#endif + +#ifdef CONFIG_FS_TMPFS + /* Mount the tmpfs file system */ + + ret = nx_mount(NULL, CONFIG_LIBC_TMPDIR, "tmpfs", 0, NULL); + if (ret < 0) + { + _err("Failed to mount tmpfs at %s: %d\n", CONFIG_LIBC_TMPDIR, ret); + } +#endif + +#if defined(CONFIG_ESPRESSIF_EFUSE) + ret = esp_efuse_initialize("/dev/efuse"); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to init EFUSE: %d\n", ret); + } +#endif + +#if !defined(CONFIG_CRYPTO_CRYPTODEV_HARDWARE) +# if defined(CONFIG_ESPRESSIF_SHA_ACCELERATOR) + ret = esp_sha_init(); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to initialize SHA: %d\n", ret); + } +# endif +#endif + +#ifdef CONFIG_ESPRESSIF_MWDT0 + ret = esp_wdt_initialize("/dev/watchdog0", ESP_WDT_MWDT0); + if (ret < 0) + { + _err("Failed to initialize WDT: %d\n", ret); + } +#endif + +#ifdef CONFIG_ESPRESSIF_RWDT + ret = esp_wdt_initialize("/dev/watchdog2", ESP_WDT_RWDT); + if (ret < 0) + { + _err("Failed to initialize WDT: %d\n", ret); + } +#endif + +/* The single timer group is claimed by the oneshot lower-half when it is + * enabled. + */ + +#if defined(CONFIG_TIMER) && !defined(CONFIG_ONESHOT) + ret = esp_timer_initialize(0); + if (ret < 0) + { + _err("Failed to initialize Timer 0: %d\n", ret); + } +#endif + +#ifdef CONFIG_ONESHOT + ret = esp_oneshot_initialize(); + if (ret < 0) + { + _err("Failed to initialize Oneshot Timer: %d\n", ret); + } +#endif + +#ifdef CONFIG_RTC_DRIVER + /* Initialize the RTC driver */ + + ret = esp_rtc_driverinit(); + if (ret < 0) + { + _err("Failed to initialize the RTC driver: %d\n", ret); + } +#endif + +#ifdef CONFIG_ESPRESSIF_SPI +# ifdef CONFIG_ESPRESSIF_SPI2 + ret = board_spidev_initialize(ESPRESSIF_SPI2); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to init spidev 2: %d\n", ret); + } +# endif /* CONFIG_ESPRESSIF_SPI2 */ + +# ifdef CONFIG_ESPRESSIF_SPI_BITBANG + ret = board_spidev_initialize(ESPRESSIF_SPI_BITBANG); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to init spidev 3: %d\n", ret); + } +# endif /* CONFIG_ESPRESSIF_SPI_BITBANG */ +#endif /* CONFIG_ESPRESSIF_SPI */ + +#if defined(CONFIG_ESPRESSIF_SPI) && defined(CONFIG_MMCSD_SPI) + ret = esp_mmcsd_spi_initialize(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: failed to init MMCSD SPI\n"); + } +#endif + +#ifdef CONFIG_ESPRESSIF_SPIFLASH + ret = board_spiflash_init(); + if (ret) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI Flash\n"); + } +#endif + +#if defined(CONFIG_I2C) + /* Configure I2C peripheral interfaces */ + + ret = board_i2c_init(); + + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize I2C driver: %d\n", ret); + } +#endif + +#ifdef CONFIG_SENSORS_BMP180 + /* Try to register BMP180 device in I2C0 */ + + ret = board_bmp180_initialize(0); + + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize BMP180 " + "Driver for I2C0: %d\n", ret); + } +#endif + +#ifdef CONFIG_ESPRESSIF_TEMP + struct esp_temp_sensor_config_t cfg = TEMPERATURE_SENSOR_CONFIG(10, 50); + ret = esp_temperature_sensor_initialize(cfg); + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize temperature sensor driver: %d\n", + ret); + } +#endif + +#if defined(CONFIG_SPI_SLAVE) && defined(CONFIG_ESPRESSIF_SPI2) + ret = board_spislavedev_initialize(ESPRESSIF_SPI2); + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize SPI%d Slave driver: %d\n", + ESPRESSIF_SPI2, ret); + } +#endif + +#ifdef CONFIG_DEV_GPIO + ret = esp_gpio_init(); + if (ret < 0) + { + ierr("Failed to initialize GPIO Driver: %d\n", ret); + } +#endif + +#if defined(CONFIG_INPUT_BUTTONS) && defined(CONFIG_INPUT_BUTTONS_LOWER) + /* Register the BUTTON driver */ + + ret = btn_lower_initialize("/dev/buttons"); + if (ret < 0) + { + ierr("ERROR: btn_lower_initialize() failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_ESPRESSIF_LEDC + ret = board_ledc_setup(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: board_ledc_setup() failed: %d\n", ret); + } +#endif /* CONFIG_ESPRESSIF_LEDC */ + +#ifdef CONFIG_ESPRESSIF_BLE + ret = esp_ble_initialize(); + if (ret) + { + syslog(LOG_ERR, "ERROR: Failed to initialize BLE\n"); + return ret; + } +#endif + +#ifdef CONFIG_ESPRESSIF_WIFI_BT_COEXIST + esp_coex_adapter_register(&g_coex_adapter_funcs); + coex_pre_init(); +#endif + +#ifdef CONFIG_ESPRESSIF_WIFI + ret = board_wlan_init(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to initialize wireless subsystem=%d\n", + ret); + } +#endif + +#ifdef CONFIG_PM + /* Configure PM */ + + ret = esp_pmconfigure(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: esp_pmconfigure failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_SYSTEM_NXDIAG_ESPRESSIF_CHIP_WO_TOOL + ret = esp_nxdiag_initialize(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: esp_nxdiag_initialize failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_ESPRESSIF_ADC + ret = board_adc_init(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: board_adc_init failed: %d\n", ret); + } +#endif + + /* If we got here then perhaps not all initialization was successful, but + * at least enough succeeded to bring-up NSH with perhaps reduced + * capabilities. + */ + + return ret; +} diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/src/esp32c2_buttons.c b/boards/risc-v/esp32c2/esp8684-devkitm/src/esp32c2_buttons.c new file mode 100644 index 0000000000000..efbbf7391a99f --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/src/esp32c2_buttons.c @@ -0,0 +1,169 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/esp8684-devkitm/src/esp32c2_buttons.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/* Config */ + +#include + +/* Libc */ + +#include +#include +#include +#include +#include + +/* NuttX */ + +#include +#include +#include +#include + +/* Arch */ + +#include "espressif/esp_gpio.h" + +/* Board */ + +#include "esp8684-devkitm.h" +#include + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + * Input Parameters: + * None. + * + * Returned Value: + * The number of buttons that were initialized. + * + ****************************************************************************/ + +uint32_t board_button_initialize(void) +{ + esp_configgpio(BUTTON_BOOT, INPUT_FUNCTION_2 | PULLUP | CHANGE); + return 1; +} + +/**************************************************************************** + * Name: board_buttons + * + * Description: + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. + * + * Input Parameters: + * None. + * + * Returned Value: + * An 8-bit bit set with each bit associated with a button. See the + * BUTTON_*_BIT definitions in board.h for the meaning of each bit. + * + ****************************************************************************/ + +uint32_t board_buttons(void) +{ + uint8_t ret = 0; + int i = 0; + int n = 0; + + bool b0 = esp_gpioread(BUTTON_BOOT); + + for (i = 0; i < 10; i++) + { + up_mdelay(1); /* TODO */ + + bool b1 = esp_gpioread(BUTTON_BOOT); + + if (b0 == b1) + { + n++; + } + else + { + n = 0; + } + + if (3 == n) + { + break; + } + + b0 = b1; + } + + iinfo("b=%d n=%d\n", b0, n); + + /* Low value means that the button is pressed */ + + if (!b0) + { + ret = 0x1; + } + + return ret; +} + +/**************************************************************************** + * Name: board_button_irq + * + * Description: + * board_button_irq() may be called to register an interrupt handler that + * will be called when a button is depressed or released. The ID value is + * a button enumeration value that uniquely identifies a button resource. + * See the BUTTON_* definitions in board.h for the meaning of enumeration + * value. + * + * Input Parameters: + * id - Identifies the button to be monitored. It is equivalent to + * the bit used to report the button state in the return value + * from board_buttons(). + * irqhandler - The handler that will be invoked when the interrupt occurs. + * arg - Pointer to the arguments that will be provided to the + * interrupt handler. + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +int board_button_irq(int id, xcpt_t irqhandler, void *arg) +{ + return esp_gpio_irq(BUTTON_BOOT, irqhandler, arg); +} +#endif diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/src/esp32c2_gpio.c b/boards/risc-v/esp32c2/esp8684-devkitm/src/esp32c2_gpio.c new file mode 100644 index 0000000000000..c07833bf7ef66 --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/src/esp32c2_gpio.c @@ -0,0 +1,564 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/esp8684-devkitm/src/esp32c2_gpio.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/* Config */ + +#include + +/* Libc */ + +#include +#include +#include +#include + +/* NuttX */ + +#include +#include +#include + +/* Arch */ + +#include "espressif/esp_gpio.h" +#ifdef CONFIG_ESPRESSIF_DEDICATED_GPIO +#include "espressif/esp_dedic_gpio.h" +#endif + +/* Board */ + +#include "esp8684-devkitm.h" +#include + +/* HAL */ + +#include + +#if defined(CONFIG_DEV_GPIO) && !defined(CONFIG_GPIO_LOWER_HALF) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Pin 1 and 2 are used for this example as GPIO outputs. */ + +#define GPIO_OUT1 1 +#define GPIO_OUT2 2 + +#if !defined(CONFIG_ESPRESSIF_GPIO_IRQ) && BOARD_NGPIOINT > 0 +# error "NGPIOINT is > 0 and GPIO interrupts aren't enabled" +#endif + +/* Interrupt pins. GPIO9 is used as an example, any other inputs could be + * used. + */ + +#define GPIO_IRQPIN 9 + +/* Dedicated GPIO pins. GPIO4 and GPIO5 is used as an example, any other + * GPIOs could be used. + */ + +#define GPIO_DEDIC1 4 +#define GPIO_DEDIC2 5 +#define GPIO_DEDIC_COUNT 2 + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct espgpio_dev_s +{ + struct gpio_dev_s gpio; + uint8_t id; +}; + +struct espgpint_dev_s +{ + struct espgpio_dev_s espgpio; + pin_interrupt_t callback; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +#if BOARD_NGPIOOUT > 0 +static int gpout_read(struct gpio_dev_s *dev, bool *value); +static int gpout_write(struct gpio_dev_s *dev, bool value); +static int gpout_setpintype(struct gpio_dev_s *dev, + enum gpio_pintype_e pintype); +#endif + +#if BOARD_NGPIOINT > 0 +static int gpint_read(struct gpio_dev_s *dev, bool *value); +static int gpint_attach(struct gpio_dev_s *dev, + pin_interrupt_t callback); +static int gpint_enable(struct gpio_dev_s *dev, bool enable); +static int gpint_setpintype(struct gpio_dev_s *dev, + enum gpio_pintype_e pintype); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#if BOARD_NGPIOOUT > 0 +static const struct gpio_operations_s gpout_ops = +{ + .go_read = gpout_read, + .go_write = gpout_write, + .go_attach = NULL, + .go_enable = NULL, + .go_setpintype = gpout_setpintype, +}; + +/* This array maps the GPIO pins used as OUTPUT */ + +static const uint32_t g_gpiooutputs[BOARD_NGPIOOUT] = +{ + GPIO_OUT1, GPIO_OUT2 +}; + +static struct espgpio_dev_s g_gpout[BOARD_NGPIOOUT]; +#endif + +#if BOARD_NGPIOINT > 0 +static const struct gpio_operations_s gpint_ops = +{ + .go_read = gpint_read, + .go_write = NULL, + .go_attach = gpint_attach, + .go_enable = gpint_enable, + .go_setpintype = gpint_setpintype, +}; + +/* This array maps the GPIO pins used as INTERRUPT INPUTS */ + +static const uint32_t g_gpiointinputs[BOARD_NGPIOINT] = +{ + GPIO_IRQPIN, +}; + +static struct espgpint_dev_s g_gpint[BOARD_NGPIOINT]; +#endif + +/* This array maps the GPIO pins used as Dedicated GPIO */ + +#ifdef CONFIG_ESPRESSIF_DEDICATED_GPIO +static const int g_gpioidedic[GPIO_DEDIC_COUNT] = +{ + GPIO_DEDIC1, GPIO_DEDIC2 +}; + +static struct esp_dedic_gpio_flags_s dedic_gpio_flags = +{ + .input_enable = 1, + .invert_input_enable = 0, + .output_enable = 1, + .invert_output_enable = 0 +}; + +struct esp_dedic_gpio_config_s dedic_gpio_conf = +{ + .gpio_array = g_gpioidedic, + .array_size = GPIO_DEDIC_COUNT, + .flags = &dedic_gpio_flags, + .path = "/dev/dedic_gpio0" +}; + +struct file *dedicated_gpio = NULL; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: gpout_read + * + * Description: + * Read a digital output pin. + * + * Parameters: + * dev - A pointer to the gpio driver struct. + * value - A pointer to store the state of the pin. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +#if BOARD_NGPIOOUT > 0 +static int gpout_read(struct gpio_dev_s *dev, bool *value) +{ + struct espgpio_dev_s *espgpio = (struct espgpio_dev_s *)dev; + + DEBUGASSERT(espgpio != NULL && value != NULL); + DEBUGASSERT(espgpio->id < BOARD_NGPIOOUT); + gpioinfo("Reading...\n"); + + *value = esp_gpioread(g_gpiooutputs[espgpio->id]); + return OK; +} + +/**************************************************************************** + * Name: gpout_write + * + * Description: + * Write to a digital output pin. + * + * Parameters: + * dev - A pointer to the gpio driver struct. + * value - The value to be written. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +static int gpout_write(struct gpio_dev_s *dev, bool value) +{ + struct espgpio_dev_s *espgpio = (struct espgpio_dev_s *)dev; + + DEBUGASSERT(espgpio != NULL); + DEBUGASSERT(espgpio->id < BOARD_NGPIOOUT); + gpioinfo("Writing %d\n", (int)value); + + esp_gpiowrite(g_gpiooutputs[espgpio->id], value); + return OK; +} + +/**************************************************************************** + * Name: gpout_setpintype + * + * Description: + * Set digital output pin type. + * + * Parameters: + * dev - A pointer to the gpio driver struct. + * pintype - The pin type. See nuttx/ioexpander/gpio.h. + * + * Returned Value: + * Zero (OK) on success; -1 (ERROR) otherwise. + * + ****************************************************************************/ + +static int gpout_setpintype(struct gpio_dev_s *dev, + enum gpio_pintype_e pintype) +{ + struct espgpio_dev_s *espgpio = (struct espgpio_dev_s *)dev; + + DEBUGASSERT(espgpio != NULL); + DEBUGASSERT(espgpio->id < BOARD_NGPIOOUT); + gpioinfo("Setting pintype: %d\n", (int)pintype); + + esp_gpio_matrix_out(g_gpiooutputs[espgpio->id], + SIG_GPIO_OUT_IDX, 0, 0); + + switch (pintype) + { + case GPIO_INPUT_PIN: + esp_configgpio(g_gpiooutputs[espgpio->id], INPUT); + break; + case GPIO_INPUT_PIN_PULLUP: + esp_configgpio(g_gpiooutputs[espgpio->id], INPUT_PULLUP); + break; + case GPIO_INPUT_PIN_PULLDOWN: + esp_configgpio(g_gpiooutputs[espgpio->id], INPUT_PULLDOWN); + break; + case GPIO_OUTPUT_PIN: + esp_configgpio(g_gpiooutputs[espgpio->id], INPUT | OUTPUT); + break; + case GPIO_OUTPUT_PIN_OPENDRAIN: + esp_configgpio(g_gpiooutputs[espgpio->id], + INPUT | OUTPUT_OPEN_DRAIN); + break; + default: + return ERROR; + break; + } + + return OK; +} +#endif + +/**************************************************************************** + * Name: espgpio_interrupt + * + * Description: + * Digital input interrupt handler. + * + * Input Parameters: + * irq - Identifier of the interrupt request. + * context - Context data from the ISR. + * arg - Opaque pointer to the internal driver state structure. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +#if BOARD_NGPIOINT > 0 +static int espgpio_interrupt(int irq, void *context, void *arg) +{ + struct espgpint_dev_s *espgpint = (struct espgpint_dev_s *)arg; + + DEBUGASSERT(espgpint != NULL && espgpint->callback != NULL); + gpioinfo("Interrupt! callback=%p\n", espgpint->callback); + + espgpint->callback(&espgpint->espgpio.gpio, espgpint->espgpio.id); + return OK; +} + +/**************************************************************************** + * Name: gpint_read + * + * Description: + * Read a digital input pin. + * + * Parameters: + * dev - A pointer to the gpio driver struct. + * value - A pointer to store the state of the pin. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +static int gpint_read(struct gpio_dev_s *dev, bool *value) +{ + struct espgpint_dev_s *espgpint = + (struct espgpint_dev_s *)dev; + + DEBUGASSERT(espgpint != NULL && value != NULL); + DEBUGASSERT(espgpint->espgpio.id < BOARD_NGPIOINT); + gpioinfo("Reading int pin...\n"); + + *value = esp_gpioread(g_gpiointinputs[espgpint->espgpio.id]); + return OK; +} + +/**************************************************************************** + * Name: gpint_attach + * + * Description: + * Attach the ISR to IRQ and register the callback. But it still doesn't + * enable interrupt yet. + * + * Parameters: + * dev - A pointer to the gpio driver struct. + * callback - User callback function. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +static int gpint_attach(struct gpio_dev_s *dev, + pin_interrupt_t callback) +{ + struct espgpint_dev_s *espgpint = + (struct espgpint_dev_s *)dev; + int ret; + + gpioinfo("Attaching the callback\n"); + + /* Make sure the interrupt is disabled */ + + esp_gpioirqdisable(g_gpiointinputs[espgpint->espgpio.id]); + + ret = esp_gpio_irq(g_gpiointinputs[espgpint->espgpio.id], + espgpio_interrupt, + &g_gpint[espgpint->espgpio.id]); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: gpint_attach() failed: %d\n", ret); + return ret; + } + + /* Make sure the interrupt is disabled */ + + esp_gpioirqdisable(g_gpiointinputs[espgpint->espgpio.id]); + + gpioinfo("Attach %p\n", callback); + espgpint->callback = callback; + return OK; +} + +/**************************************************************************** + * Name: gpint_enable + * + * Description: + * Enable/Disable interrupt. + * + * Parameters: + * dev - A pointer to the gpio driver struct. + * enable - True to enable, false to disable. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +static int gpint_enable(struct gpio_dev_s *dev, bool enable) +{ + struct espgpint_dev_s *espgpint = (struct espgpint_dev_s *)dev; + + if (enable) + { + if (espgpint->callback != NULL) + { + gpioinfo("Enabling the interrupt\n"); + + /* Configure the interrupt for rising edge */ + + esp_gpioirqenable(g_gpiointinputs[espgpint->espgpio.id]); + } + } + else + { + gpioinfo("Disable the interrupt\n"); + esp_gpioirqdisable(g_gpiointinputs[espgpint->espgpio.id]); + } + + return OK; +} + +/**************************************************************************** + * Name: gpint_setpintype + * + * Description: + * Set digital interrupt pin type. + * + * Parameters: + * dev - A pointer to the gpio driver struct. + * pintype - The pin type. See nuttx/ioexpander/gpio.h. + * + * Returned Value: + * Zero (OK) on success; -1 (ERROR) otherwise. + * + ****************************************************************************/ + +static int gpint_setpintype(struct gpio_dev_s *dev, + enum gpio_pintype_e pintype) +{ + struct espgpint_dev_s *espgpint = (struct espgpint_dev_s *)dev; + + DEBUGASSERT(espgpint != NULL); + DEBUGASSERT(espgpint->espgpio.id < BOARD_NGPIOINT); + gpioinfo("Setting pintype: %d\n", (int)pintype); + switch (pintype) + { + case GPIO_INTERRUPT_HIGH_PIN: + esp_configgpio(g_gpiointinputs[espgpint->espgpio.id], + INPUT_PULLUP | FALLING); + break; + case GPIO_INTERRUPT_LOW_PIN: + esp_configgpio(g_gpiointinputs[espgpint->espgpio.id], + INPUT_PULLDOWN | RISING); + break; + default: + return ERROR; + break; + } + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp_gpio_init + * + * Description: + * Configure the GPIO driver. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +int esp_gpio_init(void) +{ + int pincount = 0; + int i; + +#if BOARD_NGPIOOUT > 0 + for (i = 0; i < BOARD_NGPIOOUT; i++) + { + /* Setup and register the GPIO pin */ + + g_gpout[i].gpio.gp_pintype = GPIO_OUTPUT_PIN; + g_gpout[i].gpio.gp_ops = &gpout_ops; + g_gpout[i].id = i; + gpio_pin_register(&g_gpout[i].gpio, pincount); + + /* Configure the pins that will be used as output */ + + esp_gpio_matrix_out(g_gpiooutputs[i], SIG_GPIO_OUT_IDX, 0, 0); + esp_configgpio(g_gpiooutputs[i], OUTPUT_FUNCTION_2 | INPUT_FUNCTION_2); + esp_gpiowrite(g_gpiooutputs[i], 0); + + pincount++; + } +#endif + +#if BOARD_NGPIOINT > 0 + for (i = 0; i < BOARD_NGPIOINT; i++) + { + /* Setup and register the GPIO pin */ + + g_gpint[i].espgpio.gpio.gp_pintype = GPIO_INTERRUPT_PIN; + g_gpint[i].espgpio.gpio.gp_ops = &gpint_ops; + g_gpint[i].espgpio.id = i; + gpio_pin_register(&g_gpint[i].espgpio.gpio, pincount); + + /* Configure the pins that will be used as interrupt input with + * falling edge. + */ + + esp_configgpio(g_gpiointinputs[i], + INPUT_FUNCTION_2 | PULLUP | FALLING); + + pincount++; + } +#endif + +#ifdef CONFIG_ESPRESSIF_DEDICATED_GPIO + dedicated_gpio = esp_dedic_gpio_new_bundle(&dedic_gpio_conf); + + pincount++; +#endif + + return OK; +} +#endif /* CONFIG_DEV_GPIO && !CONFIG_GPIO_LOWER_HALF */ diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/src/esp32c2_reset.c b/boards/risc-v/esp32c2/esp8684-devkitm/src/esp32c2_reset.c new file mode 100644 index 0000000000000..0ad15d83015d4 --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/src/esp32c2_reset.c @@ -0,0 +1,83 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/esp8684-devkitm/src/esp32c2_reset.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "espressif/esp_systemreset.h" + +#ifdef CONFIG_BOARDCTL_RESET + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_reset + * + * Description: + * Reset board. Support for this function is required by board-level + * logic if CONFIG_BOARDCTL_RESET is selected. + * + * Input Parameters: + * status - Status information provided with the reset event. This + * meaning of this status information is board-specific. If not + * used by a board, the value zero may be provided in calls to + * board_reset(). + * + * Returned Value: + * If this function returns, then it was not possible to power-off the + * board due to some constraints. The return value in this case is a + * board-specific reason for the failure to shutdown. + * + ****************************************************************************/ + +int board_reset(int status) +{ + syslog(LOG_INFO, "reboot status=%d\n", status); + + switch (status) + { + case EXIT_SUCCESS: + up_shutdown_handler(); + break; + case CONFIG_BOARD_ASSERT_RESET_VALUE: + default: + break; + } + + up_systemreset(); + + return 0; +} + +#endif /* CONFIG_BOARDCTL_RESET */ diff --git a/boards/risc-v/esp32c2/esp8684-devkitm/src/esp8684-devkitm.h b/boards/risc-v/esp32c2/esp8684-devkitm/src/esp8684-devkitm.h new file mode 100644 index 0000000000000..07b646db3daa3 --- /dev/null +++ b/boards/risc-v/esp32c2/esp8684-devkitm/src/esp8684-devkitm.h @@ -0,0 +1,82 @@ +/**************************************************************************** + * boards/risc-v/esp32c2/esp8684-devkitm/src/esp8684-devkitm.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_RISCV_ESP32C2_ESP8684_DEVKITM_SRC_ESP8684_DEVKITM_H +#define __BOARDS_RISCV_ESP32C2_ESP8684_DEVKITM_SRC_ESP8684_DEVKITM_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: esp_bringup + * + * Description: + * Perform architecture-specific initialization. + * + * CONFIG_BOARD_LATE_INITIALIZE=y : + * Called from board_late_initialize(). + * + * Input Parameters: + * None. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned on + * any failure. + * + ****************************************************************************/ + +int esp_bringup(void); + +/**************************************************************************** + * Name: esp_gpio_init + * + * Description: + * Configure the GPIO driver. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +#ifdef CONFIG_DEV_GPIO +int esp_gpio_init(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __BOARDS_RISCV_ESP32C2_ESP8684_DEVKITM_SRC_ESP8684_DEVKITM_H */