diff --git a/ibex_top.core b/ibex_top.core
index b772066a9..08cae5407 100644
--- a/ibex_top.core
+++ b/ibex_top.core
@@ -19,6 +19,8 @@ filesets:
       - lowrisc:prim:onehot_check
       - lowrisc:prim:onehot
       - lowrisc:prim:util
+      - "fileset_partner ? (partner:prim_generic:all)"
+      - "!fileset_partner ? (lowrisc:prim_generic:all)"
     files:
       - rtl/ibex_register_file_ff.sv # generic FF-based
       - rtl/ibex_register_file_fpga.sv # FPGA
diff --git a/ibex_top_tracing.core b/ibex_top_tracing.core
index 799fb956d..92b0f5a2e 100644
--- a/ibex_top_tracing.core
+++ b/ibex_top_tracing.core
@@ -9,8 +9,6 @@ filesets:
     depend:
       - lowrisc:ibex:ibex_top
       - lowrisc:ibex:ibex_tracer
-      - "fileset_partner ? (partner:prim_generic:all)"
-      - "!fileset_partner ? (lowrisc:prim_generic:all)"
     files:
       - rtl/ibex_top_tracing.sv
     file_type: systemVerilogSource