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FPGA: correct 'categories' for hls flow/interfaces code samples (#2383)
Correct 'categories' for hls flow/interfaces code samples so they group together nicely in the sample browser
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DirectProgramming/C++SYCL_FPGA/Tutorials/Features/hls_flow_interfaces/component_interfaces_comparison/sample.json

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{
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"guid": "7d8482f5-39f1-4cf1-aa2e-a1f72cfc47cb",
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"name": "Component Interfaces Comparison",
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"categories": ["Toolkit/oneAPI Direct Programming/C++SYCL FPGA/Getting Started Tutorials"],
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"categories": ["Toolkit/oneAPI Direct Programming/C++SYCL FPGA/Getting Started Tutorials", "Toolkit/oneAPI Direct Programming/C++SYCL FPGA/Tutorials/Features/HLS Flow: Interfaces"],
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"description": "Intel® FPGA tutorial introducing different invocation/data interfaces that can be used for IP components",
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"toolchain": ["icpx"],
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"os": ["linux", "windows"],

DirectProgramming/C++SYCL_FPGA/Tutorials/Features/hls_flow_interfaces/mmhost/sample.json

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{
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"guid": "CE509751-B84A-44D1-A391-2007937F3A7F",
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"name": "Avalon Memory-Mapped Host Interfaces",
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"categories": ["Toolkit/oneAPI Direct Programming/C++SYCL FPGA/Tutorials/Features/HLS FLow: Interfaces"],
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"categories": ["Toolkit/oneAPI Direct Programming/C++SYCL FPGA/Tutorials/Features/HLS Flow: Interfaces"],
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"description": "An Intel® FPGA tutorial demonstrating how to annotate pointer arguments to customize Avalon memory-mapped host interfaces",
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"toolchain": ["icpx"],
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"os": ["linux", "windows"],

DirectProgramming/C++SYCL_FPGA/Tutorials/Features/hls_flow_interfaces/streaming_data_interfaces/sample.json

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{
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"guid": "aeaca2ce-126e-452b-a6e3-2a3d5b1dbf55",
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"name": "Streaming Data Interfaces",
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"categories": ["Toolkit/oneAPI Direct Programming/C++SYCL FPGA/Tutorials/HLS Flow: Interfaces"],
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"categories": ["Toolkit/oneAPI Direct Programming/C++SYCL FPGA/Tutorials/Features/HLS Flow: Interfaces"],
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"description": "An Intel® FPGA tutorial demonstrating how to use pipes to implement streaming interfaces on IP Components",
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"toolchain": ["icpx"],
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"os": ["linux", "windows"],

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