fix: route avx512vl_128 FMA ops through fma3<avx2_128>

avx512vl_128 derived from avx2_128, whose dispatch chain reaches no FMA3
kernel provider, so fnma/fnms fell back to the generic neg(x*y)+/-z form
(an extra vxorpd ahead of vfmadd) even on a real AVX-512 build. Its 256-bit
sibling avx512vl_256 already derives from fma3<avx2> and was unaffected.

Apply the same fma3<> inheritance pattern as avxvnni and avx512vl_256:
introduce fma3<avx2_128> (a strict superset of avx2_128 that adds the
128-bit FMA3 kernels, built by re-including xsimd_fma3_sse.hpp with
sse4_2 -> avx2_128, exactly as fma3<avx2> is built from xsimd_fma3_avx.hpp),
and derive avx512vl_128 from it. Because fma3<avx2_128> : avx2_128, all
avx2_128 integer kernels remain reachable -- FMA is added on top, nothing
lost. The tag is gated by XSIMD_WITH_FMA3_AVX2, so without FMA the kernels
are absent and dispatch falls through to avx2_128/common unchanged.

Validated under Intel SDE -skx: avx512vl_128 fnma/fnms/fma/fms/fmas emit
128-bit vf* (no vxorpd) and match scalar std::fma for float and double;
avxvnni and fma3<avx2> codegen unchanged; all FMA-capable x86 arches
compile across sse/avx2/avxvnni/avx512 flag sets.

Author: DiamonDinoia

include/xsimd/arch/xsimd_fma3_avx2_128.hpp

@@ -0,0 +1,46 @@
+/***************************************************************************
+ * Copyright (c) Johan Mabille, Sylvain Corlay, Wolf Vollprecht and         *
+ * Martin Renou                                                             *
+ * Copyright (c) QuantStack                                                 *
+ * Copyright (c) Serge Guelton                                              *
+ *                                                                          *
+ * Distributed under the terms of the BSD 3-Clause License.                 *
+ *                                                                          *
+ * The full license is in the file LICENSE, distributed with this software. *
+ ****************************************************************************/
+
+#ifndef XSIMD_FMA3_AVX2_128_HPP
+#define XSIMD_FMA3_AVX2_128_HPP
+
+#include "../types/xsimd_fma3_avx2_128_register.hpp"
+
+// Allow inclusion of xsimd_fma3_sse.hpp
+#ifdef XSIMD_FMA3_SSE_HPP
+#undef XSIMD_FMA3_SSE_HPP
+#define XSIMD_FORCE_FMA3_SSE_HPP
+#endif
+
+// Disallow inclusion of ./xsimd_fma3_sse_register.hpp
+#ifndef XSIMD_FMA3_SSE_REGISTER_HPP
+#define XSIMD_FMA3_SSE_REGISTER_HPP
+#define XSIMD_FORCE_FMA3_SSE_REGISTER_HPP
+#endif
+
+// Include ./xsimd_fma3_sse.hpp but s/sse4_2/avx2_128
+#define sse4_2 avx2_128
+#include "./xsimd_fma3_sse.hpp"
+#undef sse4_2
+#undef XSIMD_FMA3_SSE_HPP
+
+// Carefully restore guards
+#ifdef XSIMD_FORCE_FMA3_SSE_HPP
+#define XSIMD_FMA3_SSE_HPP
+#undef XSIMD_FORCE_FMA3_SSE_HPP
+#endif
+
+#ifdef XSIMD_FORCE_FMA3_SSE_REGISTER_HPP
+#undef XSIMD_FMA3_SSE_REGISTER_HPP
+#undef XSIMD_FORCE_FMA3_SSE_REGISTER_HPP
+#endif
+
+#endif

include/xsimd/arch/xsimd_isa.hpp

@@ -71,6 +71,7 @@
 #endif
 
 #if XSIMD_WITH_FMA3_AVX2
+#include "./xsimd_fma3_avx2_128.hpp"
 #include "./xsimd_fma3_avx2.hpp"
 #endif
 

include/xsimd/types/xsimd_all_registers.hpp

@@ -24,6 +24,7 @@
 #include "./xsimd_avx512vnni_avx512vbmi2_register.hpp"
 #include "./xsimd_avx_register.hpp"
 #include "./xsimd_avxvnni_register.hpp"
+#include "./xsimd_fma3_avx2_128_register.hpp"
 #include "./xsimd_fma3_avx2_register.hpp"
 #include "./xsimd_fma3_avx_register.hpp"
 #include "./xsimd_fma3_sse_register.hpp"

include/xsimd/types/xsimd_avx512vl_register.hpp

@@ -13,6 +13,7 @@
 #define XSIMD_AVX512VL_REGISTER_HPP
 
 #include "./xsimd_avx512cd_register.hpp"
+#include "./xsimd_fma3_avx2_128_register.hpp"
 
 namespace xsimd
 {
@@ -34,7 +35,7 @@ namespace xsimd
      *
      * AVX512VL instructions extension for 128 bits registers
      */
-    struct avx512vl_128 : avx2_128
+    struct avx512vl_128 : fma3<avx2_128>
     {
         static constexpr bool supported() noexcept { return XSIMD_WITH_AVX512VL; }
         static constexpr bool available() noexcept { return true; }

include/xsimd/types/xsimd_fma3_avx2_128_register.hpp

@@ -0,0 +1,50 @@
+/***************************************************************************
+ * Copyright (c) Johan Mabille, Sylvain Corlay, Wolf Vollprecht and         *
+ * Martin Renou                                                             *
+ * Copyright (c) QuantStack                                                 *
+ * Copyright (c) Serge Guelton                                              *
+ *                                                                          *
+ * Distributed under the terms of the BSD 3-Clause License.                 *
+ *                                                                          *
+ * The full license is in the file LICENSE, distributed with this software. *
+ ****************************************************************************/
+
+#ifndef XSIMD_FMA3_AVX2_128_REGISTER_HPP
+#define XSIMD_FMA3_AVX2_128_REGISTER_HPP
+
+#include "./xsimd_avx2_register.hpp"
+
+namespace xsimd
+{
+    template <typename arch>
+    struct fma3;
+
+    /**
+     * @ingroup architectures
+     *
+     * AVX2 + FMA instructions, for 128 bits registers
+     */
+    template <>
+    struct fma3<avx2_128> : avx2_128
+    {
+        static constexpr bool supported() noexcept { return XSIMD_WITH_FMA3_AVX2; }
+        static constexpr bool available() noexcept { return true; }
+        static constexpr char const* name() noexcept { return "fma3+avx2/128"; }
+    };
+
+#if XSIMD_WITH_FMA3_AVX2
+
+#if !XSIMD_WITH_AVX2
+#error "architecture inconsistency: fma3+avx2/128 requires avx2"
+#endif
+
+    namespace types
+    {
+
+        XSIMD_DECLARE_SIMD_REGISTER_ALIAS(fma3<avx2_128>, avx2_128);
+
+    }
+#endif
+
+}
+#endif