simd: x86-64-v2 realization (SSE4.2 without AVX) via the scalar backend

[AdaWorldAPI]

Adds a compile-time SIMD realization for x86-64-v2 builds: SSE4.2 without AVX (Nehalem/Westmere, Silvermont-class Atom, VMs that hide AVX). Baseline x86-64 builds (no SSE4.2) are unchanged: they keep the AVX2 arm and the cpu_guard AVX2 startup floor. No runtime feature checks.

What changes

• Selection: all(target_arch = "x86_64", target_feature = "sse4.2", not(target_feature = "avx")). Reached with target-cpu=native on a v2-only CPU, or with the new .cargo/config-v2.toml (-Ctarget-cpu=x86-64-v2).
• Routing: simd.rs sends this arm to simd_scalar.rs. Every type in simd_avx2.rs/simd_avx512.rs wraps a 256- or 512-bit register, so none can be the v2 realization; plain [T; N] arrays that LLVM compiles to SSE are used instead.
• API gap: simd_scalar.rs gains F32Mask16::to_bitmask and unsafe F32x16::gather (same contract as the AVX2 polyfill). The one gather call site, in hpc/cam_pq.rs, gets a // SAFETY: comment.
• cpu_guard: the AVX2 floor exempts sse4.2 && !avx2, which is exactly the AVX arm plus the v2 arm. The startup message names config-v2.toml.
• Tests: tests that called simd_avx2 directly now go through the crate::simd facade or are gated off v2. That includes simd_avx2's own tests, u8x32_tests and f16_precision_tests modules.
• CI: new realization/v2 row in simd-matrix.yaml, and a v2-qemu arm in scripts/masking-parity.sh.

Evidence

• masking-parity.sh v2-qemu passes all 15 groups under qemu-x86_64-static -cpu Nehalem. The objdump witness finds no %ymm, %zmm, mask register or VEX op. Disable run: with the simd.rs routing reverted, the binary SIGILLs under Nehalem.
• Per-test sweep of all 2541 v2 lib tests, each in its own process under Nehalem: 28 SIGILLs, all in simd_avx2's own test modules. No library path faulted. After gating them, the full v2 suite passes: 2474 passed, 0 failed, 31 ignored.
• Clippy -D warnings clean on v2, v3, v4, avx and baseline builds. Codegen witness avx2/avx512 PASS. cargo fmt --check clean.
• sentinel-qa: gather CONDITIONAL, satisfied by the call-site SAFETY comment; to_bitmask PARITY-OK.

Open

crate::simd_avx2 stays public on v2 builds and nothing checks for AVX2 at startup there, so a direct caller SIGILLs. This is documented in the simd.rs module doc; the safe path is the crate::simd re-exports.

Plan: .claude/plans/simd-sse-v2-tier-v1.md.

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https://claude.ai/code/session_011BMJnDBAfzcuQh5HeT39Rh

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Reviewing files that changed from the base of the PR and between db4daa8 and 6ca7efd.

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📒 Files selected for processing (11)

• .cargo/config-v2.toml
• .claude/blackboard.md
• .claude/plans/simd-sse-v2-tier-v1.md
• .github/workflows/simd-matrix.yaml
• CLAUDE.md
• scripts/masking-parity.sh
• src/cpu_guard.rs
• src/hpc/cam_pq.rs
• src/simd.rs
• src/simd_avx2.rs
• src/simd_scalar.rs

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