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joergroedeljoergroedel
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Merge branches 'apple/dart', 'arm/rockchip', 'arm/smmu', 'virtio', 'x86/vt-d', 'x86/amd' and 'core' into next
8 parents 610a9b8 + b6b2264 + f8aa519 + 3453c2b + 6f01a73 + 80b79e1 + c7fc123 + bb57f67 commit 75f74f8

63 files changed

Lines changed: 1278 additions & 1042 deletions

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‎Documentation/devicetree/bindings/iommu/apple,dart.yaml‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,7 @@ properties:
2424
compatible:
2525
enum:
2626
- apple,t8103-dart
27+
- apple,t8103-usb4-dart
2728
- apple,t8110-dart
2829
- apple,t6000-dart
2930

‎Documentation/devicetree/bindings/iommu/arm,smmu.yaml‎

Lines changed: 74 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -56,6 +56,8 @@ properties:
5656
- qcom,sm8350-smmu-500
5757
- qcom,sm8450-smmu-500
5858
- qcom,sm8550-smmu-500
59+
- qcom,sm8650-smmu-500
60+
- qcom,x1e80100-smmu-500
5961
- const: qcom,smmu-500
6062
- const: arm,mmu-500
6163

@@ -89,6 +91,8 @@ properties:
8991
- qcom,sm8150-smmu-500
9092
- qcom,sm8250-smmu-500
9193
- qcom,sm8350-smmu-500
94+
- qcom,sm8450-smmu-500
95+
- qcom,sm8550-smmu-500
9296
- const: qcom,adreno-smmu
9397
- const: qcom,smmu-500
9498
- const: arm,mmu-500
@@ -429,6 +433,30 @@ allOf:
429433
- description: interface clock required to access smmu's registers
430434
through the TCU's programming interface.
431435

436+
- if:
437+
properties:
438+
compatible:
439+
items:
440+
- enum:
441+
- qcom,sm8350-smmu-500
442+
- const: qcom,adreno-smmu
443+
- const: qcom,smmu-500
444+
- const: arm,mmu-500
445+
then:
446+
properties:
447+
clock-names:
448+
items:
449+
- const: bus
450+
- const: iface
451+
- const: ahb
452+
- const: hlos1_vote_gpu_smmu
453+
- const: cx_gmu
454+
- const: hub_cx_int
455+
- const: hub_aon
456+
clocks:
457+
minItems: 7
458+
maxItems: 7
459+
432460
- if:
433461
properties:
434462
compatible:
@@ -453,6 +481,50 @@ allOf:
453481
- description: Voter clock required for HLOS SMMU access
454482
- description: Interface clock required for register access
455483

484+
- if:
485+
properties:
486+
compatible:
487+
const: qcom,sm8450-smmu-500
488+
then:
489+
properties:
490+
clock-names:
491+
items:
492+
- const: gmu
493+
- const: hub
494+
- const: hlos
495+
- const: bus
496+
- const: iface
497+
- const: ahb
498+
499+
clocks:
500+
items:
501+
- description: GMU clock
502+
- description: GPU HUB clock
503+
- description: HLOS vote clock
504+
- description: GPU memory bus clock
505+
- description: GPU SNoC bus clock
506+
- description: GPU AHB clock
507+
508+
- if:
509+
properties:
510+
compatible:
511+
const: qcom,sm8550-smmu-500
512+
then:
513+
properties:
514+
clock-names:
515+
items:
516+
- const: hlos
517+
- const: bus
518+
- const: iface
519+
- const: ahb
520+
521+
clocks:
522+
items:
523+
- description: HLOS vote clock
524+
- description: GPU memory bus clock
525+
- description: GPU SNoC bus clock
526+
- description: GPU AHB clock
527+
456528
# Disallow clocks for all other platforms with specific compatibles
457529
- if:
458530
properties:
@@ -472,9 +544,8 @@ allOf:
472544
- qcom,sdx65-smmu-500
473545
- qcom,sm6350-smmu-500
474546
- qcom,sm6375-smmu-500
475-
- qcom,sm8350-smmu-500
476-
- qcom,sm8450-smmu-500
477-
- qcom,sm8550-smmu-500
547+
- qcom,sm8650-smmu-500
548+
- qcom,x1e80100-smmu-500
478549
then:
479550
properties:
480551
clock-names: false

‎Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml‎

Lines changed: 8 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -19,9 +19,14 @@ description: |+
1919
2020
properties:
2121
compatible:
22-
enum:
23-
- rockchip,iommu
24-
- rockchip,rk3568-iommu
22+
oneOf:
23+
- enum:
24+
- rockchip,iommu
25+
- rockchip,rk3568-iommu
26+
- items:
27+
- enum:
28+
- rockchip,rk3588-iommu
29+
- const: rockchip,rk3568-iommu
2530

2631
reg:
2732
items:

‎arch/Kconfig‎

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Original file line numberDiff line numberDiff line change
@@ -301,6 +301,11 @@ config ARCH_HAS_DMA_CLEAR_UNCACHED
301301
config ARCH_HAS_CPU_FINALIZE_INIT
302302
bool
303303

304+
# The architecture has a per-task state that includes the mm's PASID
305+
config ARCH_HAS_CPU_PASID
306+
bool
307+
select IOMMU_MM_DATA
308+
304309
# Select if arch init_task must go in the __init_task_data section
305310
config ARCH_TASK_STRUCT_ON_STACK
306311
bool

‎arch/arc/mm/dma.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -91,7 +91,7 @@ void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
9191
* Plug in direct dma map ops.
9292
*/
9393
void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
94-
const struct iommu_ops *iommu, bool coherent)
94+
bool coherent)
9595
{
9696
/*
9797
* IOC hardware snoops all DMA traffic keeping the caches consistent

‎arch/arm/mm/dma-mapping-nommu.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -34,7 +34,7 @@ void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
3434
}
3535

3636
void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
37-
const struct iommu_ops *iommu, bool coherent)
37+
bool coherent)
3838
{
3939
if (IS_ENABLED(CONFIG_CPU_V7M)) {
4040
/*

‎arch/arm/mm/dma-mapping.c‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1713,7 +1713,7 @@ void arm_iommu_detach_device(struct device *dev)
17131713
EXPORT_SYMBOL_GPL(arm_iommu_detach_device);
17141714

17151715
static void arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
1716-
const struct iommu_ops *iommu, bool coherent)
1716+
bool coherent)
17171717
{
17181718
struct dma_iommu_mapping *mapping;
17191719

@@ -1748,7 +1748,7 @@ static void arm_teardown_iommu_dma_ops(struct device *dev)
17481748
#else
17491749

17501750
static void arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
1751-
const struct iommu_ops *iommu, bool coherent)
1751+
bool coherent)
17521752
{
17531753
}
17541754

@@ -1757,7 +1757,7 @@ static void arm_teardown_iommu_dma_ops(struct device *dev) { }
17571757
#endif /* CONFIG_ARM_DMA_USE_IOMMU */
17581758

17591759
void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
1760-
const struct iommu_ops *iommu, bool coherent)
1760+
bool coherent)
17611761
{
17621762
/*
17631763
* Due to legacy code that sets the ->dma_coherent flag from a bus
@@ -1776,8 +1776,8 @@ void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
17761776
if (dev->dma_ops)
17771777
return;
17781778

1779-
if (iommu)
1780-
arm_setup_iommu_dma_ops(dev, dma_base, size, iommu, coherent);
1779+
if (device_iommu_mapped(dev))
1780+
arm_setup_iommu_dma_ops(dev, dma_base, size, coherent);
17811781

17821782
xen_setup_dma_ops(dev);
17831783
dev->archdata.dma_ops_setup = true;

‎arch/arm64/mm/dma-mapping.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,7 @@ void arch_teardown_dma_ops(struct device *dev)
4747
#endif
4848

4949
void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
50-
const struct iommu_ops *iommu, bool coherent)
50+
bool coherent)
5151
{
5252
int cls = cache_line_size_of_cpu();
5353

@@ -58,7 +58,7 @@ void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
5858
ARCH_DMA_MINALIGN, cls);
5959

6060
dev->dma_coherent = coherent;
61-
if (iommu)
61+
if (device_iommu_mapped(dev))
6262
iommu_setup_dma_ops(dev, dma_base, dma_base + size - 1);
6363

6464
xen_setup_dma_ops(dev);

‎arch/mips/mm/dma-noncoherent.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -138,7 +138,7 @@ void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
138138

139139
#ifdef CONFIG_ARCH_HAS_SETUP_DMA_OPS
140140
void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
141-
const struct iommu_ops *iommu, bool coherent)
141+
bool coherent)
142142
{
143143
dev->dma_coherent = coherent;
144144
}

‎arch/riscv/mm/dma-noncoherent.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -129,7 +129,7 @@ void arch_dma_prep_coherent(struct page *page, size_t size)
129129
}
130130

131131
void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
132-
const struct iommu_ops *iommu, bool coherent)
132+
bool coherent)
133133
{
134134
WARN_TAINT(!coherent && riscv_cbom_block_size > ARCH_DMA_MINALIGN,
135135
TAINT_CPU_OUT_OF_SPEC,

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