1515#include "mock.h"
1616
1717static int interleave_arithmetic ;
18+ static bool extended_linear_cache ;
1819
1920#define FAKE_QTG_ID 42
2021
@@ -26,6 +27,9 @@ static int interleave_arithmetic;
2627#define NR_CXL_PORT_DECODERS 8
2728#define NR_BRIDGES (NR_CXL_HOST_BRIDGES + NR_CXL_SINGLE_HOST + NR_CXL_RCH)
2829
30+ #define MOCK_AUTO_REGION_SIZE_DEFAULT SZ_512M
31+ static int mock_auto_region_size = MOCK_AUTO_REGION_SIZE_DEFAULT ;
32+
2933static struct platform_device * cxl_acpi ;
3034static struct platform_device * cxl_host_bridge [NR_CXL_HOST_BRIDGES ];
3135#define NR_MULTI_ROOT (NR_CXL_HOST_BRIDGES * NR_CXL_ROOT_PORTS)
@@ -426,6 +430,22 @@ static struct cxl_mock_res *alloc_mock_res(resource_size_t size, int align)
426430 return res ;
427431}
428432
433+ /* Only update CFMWS0 as this is used by the auto region. */
434+ static void cfmws_elc_update (struct acpi_cedt_cfmws * window , int index )
435+ {
436+ if (!extended_linear_cache )
437+ return ;
438+
439+ if (index != 0 )
440+ return ;
441+
442+ /*
443+ * The window size should be 2x of the CXL region size where half is
444+ * DRAM and half is CXL
445+ */
446+ window -> window_size = mock_auto_region_size * 2 ;
447+ }
448+
429449static int populate_cedt (void )
430450{
431451 struct cxl_mock_res * res ;
@@ -450,6 +470,7 @@ static int populate_cedt(void)
450470 for (i = cfmws_start ; i <= cfmws_end ; i ++ ) {
451471 struct acpi_cedt_cfmws * window = mock_cfmws [i ];
452472
473+ cfmws_elc_update (window , i );
453474 res = alloc_mock_res (window -> window_size , SZ_256M );
454475 if (!res )
455476 return - ENOMEM ;
@@ -591,6 +612,25 @@ mock_acpi_evaluate_integer(acpi_handle handle, acpi_string pathname,
591612 return AE_OK ;
592613}
593614
615+ static int
616+ mock_hmat_get_extended_linear_cache_size (struct resource * backing_res ,
617+ int nid , resource_size_t * cache_size )
618+ {
619+ struct acpi_cedt_cfmws * window = mock_cfmws [0 ];
620+ struct resource cfmws0_res =
621+ DEFINE_RES_MEM (window -> base_hpa , window -> window_size );
622+
623+ if (!extended_linear_cache ||
624+ !resource_contains (& cfmws0_res , backing_res )) {
625+ return hmat_get_extended_linear_cache_size (backing_res ,
626+ nid , cache_size );
627+ }
628+
629+ * cache_size = mock_auto_region_size ;
630+
631+ return 0 ;
632+ }
633+
594634static struct pci_bus mock_pci_bus [NR_BRIDGES ];
595635static struct acpi_pci_root mock_pci_root [ARRAY_SIZE (mock_pci_bus )] = {
596636 [0 ] = {
@@ -738,7 +778,6 @@ static void mock_init_hdm_decoder(struct cxl_decoder *cxld)
738778 struct cxl_endpoint_decoder * cxled ;
739779 struct cxl_switch_decoder * cxlsd ;
740780 struct cxl_port * port , * iter ;
741- const int size = SZ_512M ;
742781 struct cxl_memdev * cxlmd ;
743782 struct cxl_dport * dport ;
744783 struct device * dev ;
@@ -781,9 +820,11 @@ static void mock_init_hdm_decoder(struct cxl_decoder *cxld)
781820 }
782821
783822 base = window -> base_hpa ;
823+ if (extended_linear_cache )
824+ base += mock_auto_region_size ;
784825 cxld -> hpa_range = (struct range ) {
785826 .start = base ,
786- .end = base + size - 1 ,
827+ .end = base + mock_auto_region_size - 1 ,
787828 };
788829
789830 cxld -> interleave_ways = 2 ;
@@ -792,7 +833,8 @@ static void mock_init_hdm_decoder(struct cxl_decoder *cxld)
792833 cxld -> flags = CXL_DECODER_F_ENABLE ;
793834 cxled -> state = CXL_DECODER_STATE_AUTO ;
794835 port -> commit_end = cxld -> id ;
795- devm_cxl_dpa_reserve (cxled , 0 , size / cxld -> interleave_ways , 0 );
836+ devm_cxl_dpa_reserve (cxled , 0 ,
837+ mock_auto_region_size / cxld -> interleave_ways , 0 );
796838 cxld -> commit = mock_decoder_commit ;
797839 cxld -> reset = mock_decoder_reset ;
798840
@@ -841,7 +883,7 @@ static void mock_init_hdm_decoder(struct cxl_decoder *cxld)
841883 cxld -> interleave_granularity = 4096 ;
842884 cxld -> hpa_range = (struct range ) {
843885 .start = base ,
844- .end = base + size - 1 ,
886+ .end = base + mock_auto_region_size - 1 ,
845887 };
846888 put_device (dev );
847889 }
@@ -1085,6 +1127,8 @@ static struct cxl_mock_ops cxl_mock_ops = {
10851127 .devm_cxl_endpoint_decoders_setup = mock_cxl_endpoint_decoders_setup ,
10861128 .cxl_endpoint_parse_cdat = mock_cxl_endpoint_parse_cdat ,
10871129 .devm_cxl_add_dport_by_dev = mock_cxl_add_dport_by_dev ,
1130+ .hmat_get_extended_linear_cache_size =
1131+ mock_hmat_get_extended_linear_cache_size ,
10881132 .list = LIST_HEAD_INIT (cxl_mock_ops .list ),
10891133};
10901134
@@ -1574,6 +1618,8 @@ static __exit void cxl_test_exit(void)
15741618
15751619module_param (interleave_arithmetic , int , 0444 );
15761620MODULE_PARM_DESC (interleave_arithmetic , "Modulo:0, XOR:1" );
1621+ module_param (extended_linear_cache , bool , 0444 );
1622+ MODULE_PARM_DESC (extended_linear_cache , "Enable extended linear cache support" );
15771623module_init (cxl_test_init );
15781624module_exit (cxl_test_exit );
15791625MODULE_LICENSE ("GPL v2" );
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