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Merge tag 'mtk-soc-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/drivers
MediaTek soc driver updates for v6.17 This adds a single cleanup commit for the mtk-mutex driver, clarifying the usage of the MUTEX_MOD1, MUTEX_MOD2 registers for applying display controller sub-component mute settings on all MediaTek SoCs. * tag 'mtk-soc-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux: soc: mediatek: mtk-mutex: Fix confusing usage of MUTEX_MOD2 Link: https://lore.kernel.org/r/20250711083656.33538-4-angelogioacchino.delregno@collabora.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 parents ed82b8d + 331db44 commit 983f3a8

1 file changed

Lines changed: 56 additions & 53 deletions

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drivers/soc/mediatek/mtk-mutex.c

Lines changed: 56 additions & 53 deletions
Original file line numberDiff line numberDiff line change
@@ -17,16 +17,35 @@
1717

1818
#define MT2701_MUTEX0_MOD0 0x2c
1919
#define MT2701_MUTEX0_SOF0 0x30
20+
#define MT2701_MUTEX0_MOD1 0x34
21+
2022
#define MT8183_MUTEX0_MOD0 0x30
23+
#define MT8183_MUTEX0_MOD1 0x34
2124
#define MT8183_MUTEX0_SOF0 0x2c
2225

2326
#define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n))
2427
#define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n))
2528
#define DISP_REG_MUTEX_RST(n) (0x28 + 0x20 * (n))
26-
#define DISP_REG_MUTEX_MOD(mutex_mod_reg, n) (mutex_mod_reg + 0x20 * (n))
27-
#define DISP_REG_MUTEX_MOD1(mutex_mod_reg, n) ((mutex_mod_reg) + 0x20 * (n) + 0x4)
29+
/*
30+
* Some SoCs may have multiple MUTEX_MOD registers as more than 32 mods
31+
* are present, hence requiring multiple 32-bits registers.
32+
*
33+
* The mutex_table_mod fully represents that by defining the number of
34+
* the mod sequentially, later used as a bit number, which can be more
35+
* than 0..31.
36+
*
37+
* In order to retain compatibility with older SoCs, we perform R/W on
38+
* the single 32 bits registers, but this requires us to translate the
39+
* mutex ID bit accordingly.
40+
*/
41+
#define DISP_REG_MUTEX_MOD(mutex, id, n) ({ \
42+
const typeof(mutex) _mutex = (mutex); \
43+
u32 _offset = (id) < 32 ? \
44+
_mutex->data->mutex_mod_reg : \
45+
_mutex->data->mutex_mod1_reg; \
46+
_offset + 0x20 * (n); \
47+
})
2848
#define DISP_REG_MUTEX_SOF(mutex_sof_reg, n) (mutex_sof_reg + 0x20 * (n))
29-
#define DISP_REG_MUTEX_MOD2(n) (0x34 + 0x20 * (n))
3049

3150
#define INT_MUTEX BIT(1)
3251

@@ -334,6 +353,7 @@ struct mtk_mutex_data {
334353
const u8 *mutex_table_mod;
335354
const u16 *mutex_sof;
336355
const u16 mutex_mod_reg;
356+
const u16 mutex_mod1_reg;
337357
const u16 mutex_sof_reg;
338358
const bool no_clk;
339359
};
@@ -714,27 +734,31 @@ static const struct mtk_mutex_data mt2701_mutex_driver_data = {
714734
.mutex_mod = mt2701_mutex_mod,
715735
.mutex_sof = mt2712_mutex_sof,
716736
.mutex_mod_reg = MT2701_MUTEX0_MOD0,
737+
.mutex_mod1_reg = MT2701_MUTEX0_MOD1,
717738
.mutex_sof_reg = MT2701_MUTEX0_SOF0,
718739
};
719740

720741
static const struct mtk_mutex_data mt2712_mutex_driver_data = {
721742
.mutex_mod = mt2712_mutex_mod,
722743
.mutex_sof = mt2712_mutex_sof,
723744
.mutex_mod_reg = MT2701_MUTEX0_MOD0,
745+
.mutex_mod1_reg = MT2701_MUTEX0_MOD1,
724746
.mutex_sof_reg = MT2701_MUTEX0_SOF0,
725747
};
726748

727749
static const struct mtk_mutex_data mt6795_mutex_driver_data = {
728750
.mutex_mod = mt8173_mutex_mod,
729751
.mutex_sof = mt6795_mutex_sof,
730752
.mutex_mod_reg = MT2701_MUTEX0_MOD0,
753+
.mutex_mod1_reg = MT2701_MUTEX0_MOD1,
731754
.mutex_sof_reg = MT2701_MUTEX0_SOF0,
732755
};
733756

734757
static const struct mtk_mutex_data mt8167_mutex_driver_data = {
735758
.mutex_mod = mt8167_mutex_mod,
736759
.mutex_sof = mt8167_mutex_sof,
737760
.mutex_mod_reg = MT2701_MUTEX0_MOD0,
761+
.mutex_mod1_reg = MT2701_MUTEX0_MOD1,
738762
.mutex_sof_reg = MT2701_MUTEX0_SOF0,
739763
.no_clk = true,
740764
};
@@ -743,20 +767,23 @@ static const struct mtk_mutex_data mt8173_mutex_driver_data = {
743767
.mutex_mod = mt8173_mutex_mod,
744768
.mutex_sof = mt2712_mutex_sof,
745769
.mutex_mod_reg = MT2701_MUTEX0_MOD0,
770+
.mutex_mod1_reg = MT2701_MUTEX0_MOD1,
746771
.mutex_sof_reg = MT2701_MUTEX0_SOF0,
747772
};
748773

749774
static const struct mtk_mutex_data mt8183_mutex_driver_data = {
750775
.mutex_mod = mt8183_mutex_mod,
751776
.mutex_sof = mt8183_mutex_sof,
752777
.mutex_mod_reg = MT8183_MUTEX0_MOD0,
778+
.mutex_mod1_reg = MT8183_MUTEX0_MOD1,
753779
.mutex_sof_reg = MT8183_MUTEX0_SOF0,
754780
.mutex_table_mod = mt8183_mutex_table_mod,
755781
.no_clk = true,
756782
};
757783

758784
static const struct mtk_mutex_data mt8186_mdp_mutex_driver_data = {
759785
.mutex_mod_reg = MT8183_MUTEX0_MOD0,
786+
.mutex_mod1_reg = MT8183_MUTEX0_MOD1,
760787
.mutex_sof_reg = MT8183_MUTEX0_SOF0,
761788
.mutex_table_mod = mt8186_mdp_mutex_table_mod,
762789
};
@@ -765,19 +792,22 @@ static const struct mtk_mutex_data mt8186_mutex_driver_data = {
765792
.mutex_mod = mt8186_mutex_mod,
766793
.mutex_sof = mt8186_mutex_sof,
767794
.mutex_mod_reg = MT8183_MUTEX0_MOD0,
795+
.mutex_mod1_reg = MT8183_MUTEX0_MOD1,
768796
.mutex_sof_reg = MT8183_MUTEX0_SOF0,
769797
};
770798

771799
static const struct mtk_mutex_data mt8188_mutex_driver_data = {
772800
.mutex_mod = mt8188_mutex_mod,
773801
.mutex_sof = mt8188_mutex_sof,
774802
.mutex_mod_reg = MT8183_MUTEX0_MOD0,
803+
.mutex_mod1_reg = MT8183_MUTEX0_MOD1,
775804
.mutex_sof_reg = MT8183_MUTEX0_SOF0,
776805
};
777806

778807
static const struct mtk_mutex_data mt8188_vpp_mutex_driver_data = {
779808
.mutex_sof = mt8188_mutex_sof,
780809
.mutex_mod_reg = MT8183_MUTEX0_MOD0,
810+
.mutex_mod1_reg = MT8183_MUTEX0_MOD1,
781811
.mutex_sof_reg = MT8183_MUTEX0_SOF0,
782812
.mutex_table_mod = mt8188_mdp_mutex_table_mod,
783813
};
@@ -786,19 +816,22 @@ static const struct mtk_mutex_data mt8192_mutex_driver_data = {
786816
.mutex_mod = mt8192_mutex_mod,
787817
.mutex_sof = mt8183_mutex_sof,
788818
.mutex_mod_reg = MT8183_MUTEX0_MOD0,
819+
.mutex_mod1_reg = MT8183_MUTEX0_MOD1,
789820
.mutex_sof_reg = MT8183_MUTEX0_SOF0,
790821
};
791822

792823
static const struct mtk_mutex_data mt8195_mutex_driver_data = {
793824
.mutex_mod = mt8195_mutex_mod,
794825
.mutex_sof = mt8195_mutex_sof,
795826
.mutex_mod_reg = MT8183_MUTEX0_MOD0,
827+
.mutex_mod1_reg = MT8183_MUTEX0_MOD1,
796828
.mutex_sof_reg = MT8183_MUTEX0_SOF0,
797829
};
798830

799831
static const struct mtk_mutex_data mt8195_vpp_mutex_driver_data = {
800832
.mutex_sof = mt8195_mutex_sof,
801833
.mutex_mod_reg = MT8183_MUTEX0_MOD0,
834+
.mutex_mod1_reg = MT8183_MUTEX0_MOD1,
802835
.mutex_sof_reg = MT8183_MUTEX0_SOF0,
803836
.mutex_table_mod = mt8195_mutex_table_mod,
804837
};
@@ -807,6 +840,7 @@ static const struct mtk_mutex_data mt8365_mutex_driver_data = {
807840
.mutex_mod = mt8365_mutex_mod,
808841
.mutex_sof = mt8183_mutex_sof,
809842
.mutex_mod_reg = MT8183_MUTEX0_MOD0,
843+
.mutex_mod1_reg = MT8183_MUTEX0_MOD1,
810844
.mutex_sof_reg = MT8183_MUTEX0_SOF0,
811845
.no_clk = true,
812846
};
@@ -859,7 +893,7 @@ void mtk_mutex_add_comp(struct mtk_mutex *mutex,
859893
struct mtk_mutex_ctx *mtx = container_of(mutex, struct mtk_mutex_ctx,
860894
mutex[mutex->id]);
861895
unsigned int reg;
862-
unsigned int sof_id;
896+
unsigned int sof_id, mod_id;
863897
unsigned int offset;
864898

865899
WARN_ON(&mtx->mutex[mutex->id] != mutex);
@@ -890,18 +924,11 @@ void mtk_mutex_add_comp(struct mtk_mutex *mutex,
890924
sof_id = MUTEX_SOF_DP_INTF1;
891925
break;
892926
default:
893-
if (mtx->data->mutex_mod[id] < 32) {
894-
offset = DISP_REG_MUTEX_MOD(mtx->data->mutex_mod_reg,
895-
mutex->id);
896-
reg = readl_relaxed(mtx->regs + offset);
897-
reg |= 1 << mtx->data->mutex_mod[id];
898-
writel_relaxed(reg, mtx->regs + offset);
899-
} else {
900-
offset = DISP_REG_MUTEX_MOD2(mutex->id);
901-
reg = readl_relaxed(mtx->regs + offset);
902-
reg |= 1 << (mtx->data->mutex_mod[id] - 32);
903-
writel_relaxed(reg, mtx->regs + offset);
904-
}
927+
offset = DISP_REG_MUTEX_MOD(mtx, mtx->data->mutex_mod[id], mutex->id);
928+
mod_id = mtx->data->mutex_mod[id] % 32;
929+
reg = readl_relaxed(mtx->regs + offset);
930+
reg |= BIT(mod_id);
931+
writel_relaxed(reg, mtx->regs + offset);
905932
return;
906933
}
907934

@@ -917,6 +944,7 @@ void mtk_mutex_remove_comp(struct mtk_mutex *mutex,
917944
struct mtk_mutex_ctx *mtx = container_of(mutex, struct mtk_mutex_ctx,
918945
mutex[mutex->id]);
919946
unsigned int reg;
947+
unsigned int mod_id;
920948
unsigned int offset;
921949

922950
WARN_ON(&mtx->mutex[mutex->id] != mutex);
@@ -936,18 +964,11 @@ void mtk_mutex_remove_comp(struct mtk_mutex *mutex,
936964
mutex->id));
937965
break;
938966
default:
939-
if (mtx->data->mutex_mod[id] < 32) {
940-
offset = DISP_REG_MUTEX_MOD(mtx->data->mutex_mod_reg,
941-
mutex->id);
942-
reg = readl_relaxed(mtx->regs + offset);
943-
reg &= ~(1 << mtx->data->mutex_mod[id]);
944-
writel_relaxed(reg, mtx->regs + offset);
945-
} else {
946-
offset = DISP_REG_MUTEX_MOD2(mutex->id);
947-
reg = readl_relaxed(mtx->regs + offset);
948-
reg &= ~(1 << (mtx->data->mutex_mod[id] - 32));
949-
writel_relaxed(reg, mtx->regs + offset);
950-
}
967+
offset = DISP_REG_MUTEX_MOD(mtx, mtx->data->mutex_mod[id], mutex->id);
968+
mod_id = mtx->data->mutex_mod[id] % 32;
969+
reg = readl_relaxed(mtx->regs + offset);
970+
reg &= ~BIT(mod_id);
971+
writel_relaxed(reg, mtx->regs + offset);
951972
break;
952973
}
953974
}
@@ -1023,7 +1044,7 @@ int mtk_mutex_write_mod(struct mtk_mutex *mutex,
10231044
struct mtk_mutex_ctx *mtx = container_of(mutex, struct mtk_mutex_ctx,
10241045
mutex[mutex->id]);
10251046
unsigned int reg;
1026-
u32 reg_offset, id_offset = 0;
1047+
u32 offset, mod_id;
10271048

10281049
WARN_ON(&mtx->mutex[mutex->id] != mutex);
10291050

@@ -1033,34 +1054,16 @@ int mtk_mutex_write_mod(struct mtk_mutex *mutex,
10331054
return -EINVAL;
10341055
}
10351056

1036-
/*
1037-
* Some SoCs may have multiple MUTEX_MOD registers as more than 32 mods
1038-
* are present, hence requiring multiple 32-bits registers.
1039-
*
1040-
* The mutex_table_mod fully represents that by defining the number of
1041-
* the mod sequentially, later used as a bit number, which can be more
1042-
* than 0..31.
1043-
*
1044-
* In order to retain compatibility with older SoCs, we perform R/W on
1045-
* the single 32 bits registers, but this requires us to translate the
1046-
* mutex ID bit accordingly.
1047-
*/
1048-
if (mtx->data->mutex_table_mod[idx] < 32) {
1049-
reg_offset = DISP_REG_MUTEX_MOD(mtx->data->mutex_mod_reg,
1050-
mutex->id);
1051-
} else {
1052-
reg_offset = DISP_REG_MUTEX_MOD1(mtx->data->mutex_mod_reg,
1053-
mutex->id);
1054-
id_offset = 32;
1055-
}
1057+
offset = DISP_REG_MUTEX_MOD(mtx, mtx->data->mutex_table_mod[idx], mutex->id);
1058+
mod_id = mtx->data->mutex_table_mod[idx] % 32;
10561059

1057-
reg = readl_relaxed(mtx->regs + reg_offset);
1060+
reg = readl_relaxed(mtx->regs + offset);
10581061
if (clear)
1059-
reg &= ~BIT(mtx->data->mutex_table_mod[idx] - id_offset);
1062+
reg &= ~BIT(mod_id);
10601063
else
1061-
reg |= BIT(mtx->data->mutex_table_mod[idx] - id_offset);
1064+
reg |= BIT(mod_id);
10621065

1063-
writel_relaxed(reg, mtx->regs + reg_offset);
1066+
writel_relaxed(reg, mtx->regs + offset);
10641067

10651068
return 0;
10661069
}

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