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noopwafeljannau
noopwafel
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jannau
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arm64: dts: apple: Add PCIe nodes for t8122
This only includes the first port, because it's the only port that is present on my hardware, and only includes the pwren gpio for J613. Uses the t6020 base compatible as that is what the M3 hardware appears to be compatible with, rather than the configuration applied by the generic base compatible. Signed-off-by: Alyssa Milburn <amilburn@zall.org> Co-developed-by: Michael Reeves <michael.reeves077@gmail.com> Signed-off-by: Michael Reeves <michael.reeves077@gmail.com>
1 parent 3c9a1d4 commit a0eb1bc

7 files changed

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‎arch/arm64/boot/dts/apple/t8122-j433.dts‎

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@@ -16,4 +16,30 @@
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/ {
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compatible = "apple,j433", "apple,t8122", "apple,arm-platform";
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model = "Apple iMac (24-inch, 2x USB-C, M3, 2023)";
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aliases {
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ethernet0 = &ethernet0;
22+
};
23+
};
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&wifi0 {
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brcm,board-type = "apple,azores";
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};
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&bluetooth0 {
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brcm,board-type = "apple,azores";
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};
32+
33+
&port01 {
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bus-range = <2 2>;
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status = "okay";
36+
ethernet0: ethernet@0,0 {
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reg = <0x20000 0x0 0x0 0x0 0x0>;
38+
/* To be filled by the loader */
39+
local-mac-address = [00 10 18 00 00 00];
40+
};
41+
};
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&pcie1_dart {
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status = "okay";
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};

‎arch/arm64/boot/dts/apple/t8122-j434.dts‎

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@@ -17,3 +17,34 @@
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compatible = "apple,j434", "apple,t8122", "apple,arm-platform";
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model = "Apple iMac (24-inch, 4x USB-C, M3, 2023)";
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};
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&wifi0 {
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brcm,board-type = "apple,iona";
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};
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&bluetooth0 {
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brcm,board-type = "apple,iona";
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};
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&port01 {
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bus-range = <2 2>;
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status = "okay";
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ethernet0: ethernet@0,0 {
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reg = <0x20000 0x0 0x0 0x0 0x0>;
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/* To be filled by the loader */
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local-mac-address = [00 10 18 00 00 00];
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};
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};
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&port02 {
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bus-range = <3 3>;
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status = "okay";
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};
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&pcie1_dart {
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status = "okay";
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};
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&pcie2_dart {
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status = "okay";
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};

‎arch/arm64/boot/dts/apple/t8122-j504.dts‎

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@@ -31,6 +31,32 @@
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};
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};
3333

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&wifi0 {
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brcm,board-type = "apple,tresco";
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};
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&bluetooth0 {
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brcm,board-type = "apple,tresco";
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};
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&port01 {
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/* SD card reader */
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bus-range = <2 2>;
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status = "okay";
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sdhci0: mmc@0,0 {
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compatible = "pci17a0,9755";
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reg = <0x20000 0x0 0x0 0x0 0x0>;
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cd-inverted;
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wp-inverted;
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};
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};
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&pcie1_dart {
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status = "okay";
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};
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&fpwm1 {
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status = "okay";
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};

‎arch/arm64/boot/dts/apple/t8122-j613.dts‎

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@@ -30,6 +30,14 @@
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};
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};
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&wifi0 {
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brcm,board-type = "apple,dnieper";
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};
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&bluetooth0 {
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brcm,board-type = "apple,dnieper";
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};
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&fpwm1 {
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status = "okay";
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};

‎arch/arm64/boot/dts/apple/t8122-j615.dts‎

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@@ -30,6 +30,14 @@
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};
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};
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&wifi0 {
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brcm,board-type = "apple,tuzla";
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};
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&bluetooth0 {
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brcm,board-type = "apple,tuzla";
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};
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&fpwm1 {
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status = "okay";
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};

‎arch/arm64/boot/dts/apple/t8122-jxxx.dtsi‎

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@@ -11,7 +11,9 @@
1111

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/ {
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aliases {
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bluetooth0 = &bluetooth0;
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serial0 = &serial0;
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wifi0 = &wifi0;
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};
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chosen {
@@ -46,3 +48,27 @@
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&serial0 {
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status = "okay";
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};
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/*
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* Force the bus number assignments so that we can declare some of the
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* on-board devices and properties that are populated by the bootloader
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* (such as MAC addresses).
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*/
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&port00 {
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bus-range = <1 1>;
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wifi0: wifi@0,0 {
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compatible = "pci14e4,4434";
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reg = <0x10000 0x0 0x0 0x0 0x0>;
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/* To be filled by the loader */
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local-mac-address = [00 00 00 00 00 00];
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apple,antenna-sku = "XX";
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};
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bluetooth0: bluetooth@0,1 {
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compatible = "pci14e4,5f72";
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reg = <0x10100 0x0 0x0 0x0 0x0>;
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/* To be filled by the loader */
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local-bd-address = [00 00 00 00 00 00];
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};
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};

‎arch/arm64/boot/dts/apple/t8122.dtsi‎

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@@ -357,6 +357,13 @@
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<APPLE_PINMUX(148, 1)>;
358358
};
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360+
pcie_pins: pcie-pins {
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// clkreq pins
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pinmux = <APPLE_PINMUX(183, 1)>,
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<APPLE_PINMUX(184, 1)>,
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<APPLE_PINMUX(185, 1)>,
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<APPLE_PINMUX(186, 1)>;
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};
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};
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362369
pinctrl_nub: pinctrl@2e41f0000 {
@@ -504,6 +511,167 @@
504511
power-domain-names = "ans", "apcie0";
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resets = <&ps_ans>;
506513
};
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pcie0_dart: iommu@594000000 {
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compatible = "apple,t8122-dart", "apple,t8110-dart";
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reg = <0x5 0x94000000 0x0 0x4000>;
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#iommu-cells = <1>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 924 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&ps_apcie_gp>;
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};
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pcie1_dart: iommu@595000000 {
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compatible = "apple,t8122-dart", "apple,t8110-dart";
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reg = <0x5 0x95000000 0x0 0x4000>;
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#iommu-cells = <1>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 933 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&ps_apcie_gp>;
531+
status = "disabled";
532+
};
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pcie2_dart: iommu@596000000 {
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compatible = "apple,t8122-dart", "apple,t8110-dart";
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reg = <0x6 0x96000000 0x0 0x4000>;
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#iommu-cells = <1>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 942 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&ps_apcie_gp>;
541+
status = "disabled";
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};
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pcie3_dart: iommu@597000000 {
545+
compatible = "apple,t8122-dart", "apple,t8110-dart";
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reg = <0x6 0x97000000 0x0 0x4000>;
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#iommu-cells = <1>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 951 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&ps_apcie_gp>;
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status = "disabled";
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};
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pcie0: pcie@580000000 {
555+
compatible = "apple,t8122-pcie", "apple,t6020-pcie";
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device_type = "pci";
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reg = <0x5 0x80000000 0x0 0x1000000>, /* config */
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<0x5 0x91000000 0x0 0x4000>, /* rc */
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<0x5 0x94008000 0x0 0x4000>, /* port0 */
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<0x5 0x95008000 0x0 0x4000>, /* port1 */
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<0x5 0x96008000 0x0 0x4000>, /* port2 */
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<0x5 0x97008000 0x0 0x4000>, /* port3 */
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<0x5 0x9e00c000 0x0 0x4000>, /* phy0 */
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<0x5 0x9e010000 0x0 0x4000>, /* phy1 */
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<0x5 0x9e014000 0x0 0x4000>, /* phy2 */
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<0x5 0x9e018000 0x0 0x4000>; /* phy3 */
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reg-names = "config", "rc", "port0", "port1", "port2", "port3", "phy0", "phy1", "phy2", "phy3";
569+
570+
interrupt-parent = <&aic>;
571+
interrupts = <AIC_IRQ 923 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 932 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 941 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 950 IRQ_TYPE_LEVEL_HIGH>;
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msi-controller;
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msi-parent = <&pcie0>;
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msi-ranges = <&aic AIC_IRQ 1075 IRQ_TYPE_EDGE_RISING 32>;
579+
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iommu-map = <0x100 &pcie0_dart 0 1>,
581+
<0x200 &pcie1_dart 1 1>,
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<0x300 &pcie2_dart 2 1>,
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<0x300 &pcie3_dart 3 1>;
584+
iommu-map-mask = <0xff00>;
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586+
bus-range = <0 4>;
587+
#address-cells = <3>;
588+
#size-cells = <2>;
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ranges = <0x43000000 0x5 0xa0000000 0x5 0xa0000000 0x0 0x20000000>,
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<0x02000000 0x0 0xc0000000 0x5 0xc0000000 0x0 0x40000000>;
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592+
power-domains = <&ps_apcie_gp>;
593+
pinctrl-0 = <&pcie_pins>;
594+
pinctrl-names = "default";
595+
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port00: pci@0,0 {
597+
device_type = "pci";
598+
reg = <0x0 0x0 0x0 0x0 0x0>;
599+
reset-gpios = <&pinctrl_ap 187 GPIO_ACTIVE_LOW>; // perst
600+
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#address-cells = <3>;
602+
#size-cells = <2>;
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ranges;
604+
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interrupt-controller;
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#interrupt-cells = <1>;
607+
608+
interrupt-map-mask = <0 0 0 7>;
609+
interrupt-map = <0 0 0 1 &port00 0 0 0 0>,
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<0 0 0 2 &port00 0 0 0 1>,
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<0 0 0 3 &port00 0 0 0 2>,
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<0 0 0 4 &port00 0 0 0 3>;
613+
};
614+
615+
port01: pci@1,0 {
616+
device_type = "pci";
617+
reg = <0x800 0x0 0x0 0x0 0x0>;
618+
reset-gpios = <&pinctrl_ap 188 GPIO_ACTIVE_LOW>; // perst
619+
620+
#address-cells = <3>;
621+
#size-cells = <2>;
622+
ranges;
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624+
interrupt-controller;
625+
#interrupt-cells = <1>;
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627+
interrupt-map-mask = <0 0 0 7>;
628+
interrupt-map = <0 0 0 1 &port01 0 0 0 0>,
629+
<0 0 0 2 &port01 0 0 0 1>,
630+
<0 0 0 3 &port01 0 0 0 2>,
631+
<0 0 0 4 &port01 0 0 0 3>;
632+
status = "disabled";
633+
};
634+
635+
port02: pci@2,0 {
636+
device_type = "pci";
637+
reg = <0x1000 0x0 0x0 0x0 0x0>;
638+
reset-gpios = <&pinctrl_ap 189 GPIO_ACTIVE_LOW>; // perst
639+
640+
#address-cells = <3>;
641+
#size-cells = <2>;
642+
ranges;
643+
644+
interrupt-controller;
645+
#interrupt-cells = <1>;
646+
647+
interrupt-map-mask = <0 0 0 7>;
648+
interrupt-map = <0 0 0 1 &port02 0 0 0 0>,
649+
<0 0 0 2 &port02 0 0 0 1>,
650+
<0 0 0 3 &port02 0 0 0 2>,
651+
<0 0 0 4 &port02 0 0 0 3>;
652+
status = "disabled";
653+
};
654+
655+
port03: pci@3,0 {
656+
device_type = "pci";
657+
reg = <0x1800 0x0 0x0 0x0 0x0>;
658+
reset-gpios = <&pinctrl_ap 190 GPIO_ACTIVE_LOW>; // perst
659+
660+
#address-cells = <3>;
661+
#size-cells = <2>;
662+
ranges;
663+
664+
interrupt-controller;
665+
#interrupt-cells = <1>;
666+
667+
interrupt-map-mask = <0 0 0 7>;
668+
interrupt-map = <0 0 0 1 &port03 0 0 0 0>,
669+
<0 0 0 2 &port03 0 0 0 1>,
670+
<0 0 0 3 &port03 0 0 0 2>,
671+
<0 0 0 4 &port03 0 0 0 3>;
672+
status = "disabled";
673+
};
674+
};
507675
};
508676
};
509677

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