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jhnikula
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alexandrebelloni
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i3c: mipi-i3c-hci: Convert remaining DBG() prints to dev_dbg()
Get rid of local DBG() macro and convert remaining debug prints to dev_dbg() which can be controlled without code recompile when kernel is built with dynamic debug support. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20250827103009.243771-6-jarkko.nikula@linux.intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
1 parent a00e15f commit a4ea64a

7 files changed

Lines changed: 73 additions & 56 deletions

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‎drivers/i3c/master/mipi-i3c-hci/cmd_v1.c‎

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -317,7 +317,9 @@ static int hci_cmd_v1_daa(struct i3c_hci *hci)
317317
break;
318318
next_addr = ret;
319319

320-
DBG("next_addr = 0x%02x, DAA using DAT %d", next_addr, dat_idx);
320+
dev_dbg(&hci->master.dev,
321+
"next_addr = 0x%02x, DAA using DAT %d",
322+
next_addr, dat_idx);
321323
mipi_i3c_hci_dat_v1.set_dynamic_addr(hci, dat_idx, next_addr);
322324
mipi_i3c_hci_dct_index_reset(hci);
323325

@@ -349,8 +351,9 @@ static int hci_cmd_v1_daa(struct i3c_hci *hci)
349351
}
350352

351353
i3c_hci_dct_get_val(hci, 0, &pid, &dcr, &bcr);
352-
DBG("assigned address %#x to device PID=0x%llx DCR=%#x BCR=%#x",
353-
next_addr, pid, dcr, bcr);
354+
dev_dbg(&hci->master.dev,
355+
"assigned address %#x to device PID=0x%llx DCR=%#x BCR=%#x",
356+
next_addr, pid, dcr, bcr);
354357

355358
mipi_i3c_hci_dat_v1.free_entry(hci, dat_idx);
356359
dat_idx = -1;

‎drivers/i3c/master/mipi-i3c-hci/cmd_v2.c‎

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -261,7 +261,7 @@ static int hci_cmd_v2_daa(struct i3c_hci *hci)
261261
if (ret < 0)
262262
break;
263263
next_addr = ret;
264-
DBG("next_addr = 0x%02x", next_addr);
264+
dev_dbg(&hci->master.dev, "next_addr = 0x%02x", next_addr);
265265
xfer[0].cmd_tid = hci_get_tid();
266266
xfer[0].cmd_desc[0] =
267267
CMD_0_ATTR_A |
@@ -293,8 +293,9 @@ static int hci_cmd_v2_daa(struct i3c_hci *hci)
293293
pid = (pid << 32) | device_id[0];
294294
bcr = FIELD_GET(W1_MASK(55, 48), device_id[1]);
295295
dcr = FIELD_GET(W1_MASK(63, 56), device_id[1]);
296-
DBG("assigned address %#x to device PID=0x%llx DCR=%#x BCR=%#x",
297-
next_addr, pid, dcr, bcr);
296+
dev_dbg(&hci->master.dev,
297+
"assigned address %#x to device PID=0x%llx DCR=%#x BCR=%#x",
298+
next_addr, pid, dcr, bcr);
298299
/*
299300
* TODO: Extend the subsystem layer to allow for registering
300301
* new device and provide BCR/DCR/PID at the same time.

‎drivers/i3c/master/mipi-i3c-hci/core.c‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -147,7 +147,7 @@ static int i3c_hci_bus_init(struct i3c_master_controller *m)
147147
amd_set_resp_buf_thld(hci);
148148

149149
reg_set(HC_CONTROL, HC_CONTROL_BUS_ENABLE);
150-
DBG("HC_CONTROL = %#x", reg_read(HC_CONTROL));
150+
dev_dbg(&hci->master.dev, "HC_CONTROL = %#x", reg_read(HC_CONTROL));
151151

152152
return 0;
153153
}
@@ -192,8 +192,8 @@ static int i3c_hci_send_ccc_cmd(struct i3c_master_controller *m,
192192
DECLARE_COMPLETION_ONSTACK(done);
193193
int i, last, ret = 0;
194194

195-
DBG("cmd=%#x rnw=%d ndests=%d data[0].len=%d",
196-
ccc->id, ccc->rnw, ccc->ndests, ccc->dests[0].payload.len);
195+
dev_dbg(&hci->master.dev, "cmd=%#x rnw=%d ndests=%d data[0].len=%d",
196+
ccc->id, ccc->rnw, ccc->ndests, ccc->dests[0].payload.len);
197197

198198
xfer = hci_alloc_xfer(nxfers);
199199
if (!xfer)
@@ -251,8 +251,8 @@ static int i3c_hci_send_ccc_cmd(struct i3c_master_controller *m,
251251
}
252252

253253
if (ccc->rnw)
254-
DBG("got: %*ph",
255-
ccc->dests[0].payload.len, ccc->dests[0].payload.data);
254+
dev_dbg(&hci->master.dev, "got: %*ph",
255+
ccc->dests[0].payload.len, ccc->dests[0].payload.data);
256256

257257
out:
258258
hci_free_xfer(xfer, nxfers);
@@ -277,7 +277,7 @@ static int i3c_hci_priv_xfers(struct i3c_dev_desc *dev,
277277
unsigned int size_limit;
278278
int i, last, ret = 0;
279279

280-
DBG("nxfers = %d", nxfers);
280+
dev_dbg(&hci->master.dev, "nxfers = %d", nxfers);
281281

282282
xfer = hci_alloc_xfer(nxfers);
283283
if (!xfer)
@@ -335,7 +335,7 @@ static int i3c_hci_i2c_xfers(struct i2c_dev_desc *dev,
335335
DECLARE_COMPLETION_ONSTACK(done);
336336
int i, last, ret = 0;
337337

338-
DBG("nxfers = %d", nxfers);
338+
dev_dbg(&hci->master.dev, "nxfers = %d", nxfers);
339339

340340
xfer = hci_alloc_xfer(nxfers);
341341
if (!xfer)
@@ -587,7 +587,7 @@ static int i3c_hci_init(struct i3c_hci *hci)
587587
}
588588

589589
hci->caps = reg_read(HC_CAPABILITIES);
590-
DBG("caps = %#x", hci->caps);
590+
dev_dbg(&hci->master.dev, "caps = %#x", hci->caps);
591591

592592
size_in_dwords = hci->version_major < 1 ||
593593
(hci->version_major == 1 && hci->version_minor < 1);

‎drivers/i3c/master/mipi-i3c-hci/dma.c‎

Lines changed: 9 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -248,8 +248,9 @@ static int hci_dma_init(struct i3c_hci *hci)
248248
regval = rh_reg_read(CR_SETUP);
249249
rh->xfer_struct_sz = FIELD_GET(CR_XFER_STRUCT_SIZE, regval);
250250
rh->resp_struct_sz = FIELD_GET(CR_RESP_STRUCT_SIZE, regval);
251-
DBG("xfer_struct_sz = %d, resp_struct_sz = %d",
252-
rh->xfer_struct_sz, rh->resp_struct_sz);
251+
dev_dbg(&hci->master.dev,
252+
"xfer_struct_sz = %d, resp_struct_sz = %d",
253+
rh->xfer_struct_sz, rh->resp_struct_sz);
253254
xfers_sz = rh->xfer_struct_sz * rh->xfer_entries;
254255
resps_sz = rh->resp_struct_sz * rh->xfer_entries;
255256

@@ -523,11 +524,11 @@ static void hci_dma_xfer_done(struct i3c_hci *hci, struct hci_rh_data *rh)
523524
ring_resp = rh->resp + rh->resp_struct_sz * done_ptr;
524525
resp = *ring_resp;
525526
tid = RESP_TID(resp);
526-
DBG("resp = 0x%08x", resp);
527+
dev_dbg(&hci->master.dev, "resp = 0x%08x", resp);
527528

528529
xfer = rh->src_xfers[done_ptr];
529530
if (!xfer) {
530-
DBG("orphaned ring entry");
531+
dev_dbg(&hci->master.dev, "orphaned ring entry");
531532
} else {
532533
hci_dma_unmap_xfer(hci, xfer, 1);
533534
xfer->ring_entry = -1;
@@ -630,7 +631,7 @@ static void hci_dma_process_ibi(struct i3c_hci *hci, struct hci_rh_data *rh)
630631

631632
ring_ibi_status = rh->ibi_status + rh->ibi_status_sz * ptr;
632633
ibi_status = *ring_ibi_status;
633-
DBG("status = %#x", ibi_status);
634+
dev_dbg(&hci->master.dev, "status = %#x", ibi_status);
634635

635636
if (ibi_status_error) {
636637
/* we no longer care */
@@ -658,7 +659,9 @@ static void hci_dma_process_ibi(struct i3c_hci *hci, struct hci_rh_data *rh)
658659

659660
if (last_ptr == -1) {
660661
/* this IBI sequence is not yet complete */
661-
DBG("no LAST_STATUS available (e=%d d=%d)", enq_ptr, deq_ptr);
662+
dev_dbg(&hci->master.dev,
663+
"no LAST_STATUS available (e=%d d=%d)",
664+
enq_ptr, deq_ptr);
662665
return;
663666
}
664667
deq_ptr = last_ptr + 1;

‎drivers/i3c/master/mipi-i3c-hci/ext_caps.c‎

Lines changed: 7 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -35,7 +35,7 @@ static int hci_extcap_hardware_id(struct i3c_hci *hci, void __iomem *base)
3535
switch (hci->vendor_mipi_id) {
3636
case MIPI_VENDOR_NXP:
3737
hci->quirks |= HCI_QUIRK_RAW_CCC;
38-
DBG("raw CCC quirks set");
38+
dev_dbg(&hci->master.dev, "raw CCC quirks set");
3939
break;
4040
}
4141

@@ -77,7 +77,8 @@ static int hci_extcap_xfer_modes(struct i3c_hci *hci, void __iomem *base)
7777
for (index = 0; index < entries; index++) {
7878
u32 mode_entry = readl(base);
7979

80-
DBG("mode %d: 0x%08x", index, mode_entry);
80+
dev_dbg(&hci->master.dev, "mode %d: 0x%08x",
81+
index, mode_entry);
8182
/* TODO: will be needed when I3C core does more than SDR */
8283
base += 4;
8384
}
@@ -97,7 +98,8 @@ static int hci_extcap_xfer_rates(struct i3c_hci *hci, void __iomem *base)
9798
dev_info(&hci->master.dev, "available data rates:\n");
9899
for (index = 0; index < entries; index++) {
99100
rate_entry = readl(base);
100-
DBG("entry %d: 0x%08x", index, rate_entry);
101+
dev_dbg(&hci->master.dev, "entry %d: 0x%08x",
102+
index, rate_entry);
101103
rate = FIELD_GET(XFERRATE_ACTUAL_RATE_KHZ, rate_entry);
102104
rate_id = FIELD_GET(XFERRATE_RATE_ID, rate_entry);
103105
mode_id = FIELD_GET(XFERRATE_MODE_ID, rate_entry);
@@ -268,7 +270,8 @@ int i3c_hci_parse_ext_caps(struct i3c_hci *hci)
268270
cap_header = readl(curr_cap);
269271
cap_id = FIELD_GET(CAP_HEADER_ID, cap_header);
270272
cap_length = FIELD_GET(CAP_HEADER_LENGTH, cap_header);
271-
DBG("id=0x%02x length=%d", cap_id, cap_length);
273+
dev_dbg(&hci->master.dev, "id=0x%02x length=%d",
274+
cap_id, cap_length);
272275
if (!cap_length)
273276
break;
274277
if (curr_cap + cap_length * 4 >= end) {

‎drivers/i3c/master/mipi-i3c-hci/hci.h‎

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -12,9 +12,6 @@
1212

1313
#include <linux/io.h>
1414

15-
/* Handy logging macro to save on line length */
16-
#define DBG(x, ...) pr_devel("%s: " x "\n", __func__, ##__VA_ARGS__)
17-
1815
/* 32-bit word aware bit and mask macros */
1916
#define W0_MASK(h, l) GENMASK((h) - 0, (l) - 0)
2017
#define W1_MASK(h, l) GENMASK((h) - 32, (l) - 32)

‎drivers/i3c/master/mipi-i3c-hci/pio.c‎

Lines changed: 39 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -213,8 +213,8 @@ static void hci_pio_cleanup(struct i3c_hci *hci)
213213
pio_reg_write(INTR_SIGNAL_ENABLE, 0x0);
214214

215215
if (pio) {
216-
DBG("status = %#x/%#x",
217-
pio_reg_read(INTR_STATUS), pio_reg_read(INTR_SIGNAL_ENABLE));
216+
dev_dbg(&hci->master.dev, "status = %#x/%#x",
217+
pio_reg_read(INTR_STATUS), pio_reg_read(INTR_SIGNAL_ENABLE));
218218
BUG_ON(pio->curr_xfer);
219219
BUG_ON(pio->curr_rx);
220220
BUG_ON(pio->curr_tx);
@@ -226,13 +226,17 @@ static void hci_pio_cleanup(struct i3c_hci *hci)
226226

227227
static void hci_pio_write_cmd(struct i3c_hci *hci, struct hci_xfer *xfer)
228228
{
229-
DBG("cmd_desc[%d] = 0x%08x", 0, xfer->cmd_desc[0]);
230-
DBG("cmd_desc[%d] = 0x%08x", 1, xfer->cmd_desc[1]);
229+
dev_dbg(&hci->master.dev, "cmd_desc[%d] = 0x%08x",
230+
0, xfer->cmd_desc[0]);
231+
dev_dbg(&hci->master.dev, "cmd_desc[%d] = 0x%08x",
232+
1, xfer->cmd_desc[1]);
231233
pio_reg_write(COMMAND_QUEUE_PORT, xfer->cmd_desc[0]);
232234
pio_reg_write(COMMAND_QUEUE_PORT, xfer->cmd_desc[1]);
233235
if (hci->cmd == &mipi_i3c_hci_cmd_v2) {
234-
DBG("cmd_desc[%d] = 0x%08x", 2, xfer->cmd_desc[2]);
235-
DBG("cmd_desc[%d] = 0x%08x", 3, xfer->cmd_desc[3]);
236+
dev_dbg(&hci->master.dev, "cmd_desc[%d] = 0x%08x",
237+
2, xfer->cmd_desc[2]);
238+
dev_dbg(&hci->master.dev, "cmd_desc[%d] = 0x%08x",
239+
3, xfer->cmd_desc[3]);
236240
pio_reg_write(COMMAND_QUEUE_PORT, xfer->cmd_desc[2]);
237241
pio_reg_write(COMMAND_QUEUE_PORT, xfer->cmd_desc[3]);
238242
}
@@ -254,7 +258,8 @@ static bool hci_pio_do_rx(struct i3c_hci *hci, struct hci_pio_data *pio)
254258
nr_words = min(xfer->data_left / 4, pio->rx_thresh_size);
255259
/* extract data from FIFO */
256260
xfer->data_left -= nr_words * 4;
257-
DBG("now %d left %d", nr_words * 4, xfer->data_left);
261+
dev_dbg(&hci->master.dev, "now %d left %d",
262+
nr_words * 4, xfer->data_left);
258263
while (nr_words--)
259264
*p++ = pio_reg_read(XFER_DATA_PORT);
260265
}
@@ -269,7 +274,7 @@ static void hci_pio_do_trailing_rx(struct i3c_hci *hci,
269274
struct hci_xfer *xfer = pio->curr_rx;
270275
u32 *p;
271276

272-
DBG("%d remaining", count);
277+
dev_dbg(&hci->master.dev, "%d remaining", count);
273278

274279
p = xfer->data;
275280
p += (xfer->data_len - xfer->data_left) / 4;
@@ -278,7 +283,8 @@ static void hci_pio_do_trailing_rx(struct i3c_hci *hci,
278283
unsigned int nr_words = count / 4;
279284
/* extract data from FIFO */
280285
xfer->data_left -= nr_words * 4;
281-
DBG("now %d left %d", nr_words * 4, xfer->data_left);
286+
dev_dbg(&hci->master.dev, "now %d left %d",
287+
nr_words * 4, xfer->data_left);
282288
while (nr_words--)
283289
*p++ = pio_reg_read(XFER_DATA_PORT);
284290
}
@@ -321,7 +327,8 @@ static bool hci_pio_do_tx(struct i3c_hci *hci, struct hci_pio_data *pio)
321327
nr_words = min(xfer->data_left / 4, pio->tx_thresh_size);
322328
/* push data into the FIFO */
323329
xfer->data_left -= nr_words * 4;
324-
DBG("now %d left %d", nr_words * 4, xfer->data_left);
330+
dev_dbg(&hci->master.dev, "now %d left %d",
331+
nr_words * 4, xfer->data_left);
325332
while (nr_words--)
326333
pio_reg_write(XFER_DATA_PORT, *p++);
327334
}
@@ -336,7 +343,7 @@ static bool hci_pio_do_tx(struct i3c_hci *hci, struct hci_pio_data *pio)
336343
*/
337344
if (!(pio_reg_read(INTR_STATUS) & STAT_TX_THLD))
338345
return false;
339-
DBG("trailing %d", xfer->data_left);
346+
dev_dbg(&hci->master.dev, "trailing %d", xfer->data_left);
340347
pio_reg_write(XFER_DATA_PORT, *p);
341348
xfer->data_left = 0;
342349
}
@@ -481,7 +488,7 @@ static bool hci_pio_process_resp(struct i3c_hci *hci, struct hci_pio_data *pio)
481488
u32 resp = pio_reg_read(RESPONSE_QUEUE_PORT);
482489
unsigned int tid = RESP_TID(resp);
483490

484-
DBG("resp = 0x%08x", resp);
491+
dev_dbg(&hci->master.dev, "resp = 0x%08x", resp);
485492
if (tid != xfer->cmd_tid) {
486493
dev_err(&hci->master.dev,
487494
"response tid=%d when expecting %d\n",
@@ -522,14 +529,15 @@ static bool hci_pio_process_resp(struct i3c_hci *hci, struct hci_pio_data *pio)
522529
* still exists.
523530
*/
524531
if (pio->curr_rx == xfer) {
525-
DBG("short RX ?");
532+
dev_dbg(&hci->master.dev, "short RX ?");
526533
pio->curr_rx = pio->curr_rx->next_data;
527534
} else if (pio->curr_tx == xfer) {
528-
DBG("short TX ?");
535+
dev_dbg(&hci->master.dev, "short TX ?");
529536
pio->curr_tx = pio->curr_tx->next_data;
530537
} else if (xfer->data_left) {
531-
DBG("PIO xfer count = %d after response",
532-
xfer->data_left);
538+
dev_dbg(&hci->master.dev,
539+
"PIO xfer count = %d after response",
540+
xfer->data_left);
533541
}
534542

535543
pio->curr_resp = xfer->next_resp;
@@ -591,7 +599,7 @@ static int hci_pio_queue_xfer(struct i3c_hci *hci, struct hci_xfer *xfer, int n)
591599
struct hci_xfer *prev_queue_tail;
592600
int i;
593601

594-
DBG("n = %d", n);
602+
dev_dbg(&hci->master.dev, "n = %d", n);
595603

596604
/* link xfer instances together and initialize data count */
597605
for (i = 0; i < n; i++) {
@@ -611,8 +619,9 @@ static int hci_pio_queue_xfer(struct i3c_hci *hci, struct hci_xfer *xfer, int n)
611619
if (!hci_pio_process_cmd(hci, pio))
612620
pio->enabled_irqs |= STAT_CMD_QUEUE_READY;
613621
pio_reg_write(INTR_SIGNAL_ENABLE, pio->enabled_irqs);
614-
DBG("status = %#x/%#x",
615-
pio_reg_read(INTR_STATUS), pio_reg_read(INTR_SIGNAL_ENABLE));
622+
dev_dbg(&hci->master.dev, "status = %#x/%#x",
623+
pio_reg_read(INTR_STATUS),
624+
pio_reg_read(INTR_SIGNAL_ENABLE));
616625
}
617626
spin_unlock_irq(&pio->lock);
618627
return 0;
@@ -686,10 +695,10 @@ static bool hci_pio_dequeue_xfer(struct i3c_hci *hci, struct hci_xfer *xfer, int
686695
int ret;
687696

688697
spin_lock_irq(&pio->lock);
689-
DBG("n=%d status=%#x/%#x", n,
690-
pio_reg_read(INTR_STATUS), pio_reg_read(INTR_SIGNAL_ENABLE));
691-
DBG("main_status = %#x/%#x",
692-
readl(hci->base_regs + 0x20), readl(hci->base_regs + 0x28));
698+
dev_dbg(&hci->master.dev, "n=%d status=%#x/%#x", n,
699+
pio_reg_read(INTR_STATUS), pio_reg_read(INTR_SIGNAL_ENABLE));
700+
dev_dbg(&hci->master.dev, "main_status = %#x/%#x",
701+
readl(hci->base_regs + 0x20), readl(hci->base_regs + 0x28));
693702

694703
ret = hci_pio_dequeue_xfer_common(hci, pio, xfer, n);
695704
spin_unlock_irq(&pio->lock);
@@ -733,8 +742,8 @@ static void hci_pio_err(struct i3c_hci *hci, struct hci_pio_data *pio,
733742
mipi_i3c_hci_pio_reset(hci);
734743
mipi_i3c_hci_resume(hci);
735744

736-
DBG("status=%#x/%#x",
737-
pio_reg_read(INTR_STATUS), pio_reg_read(INTR_SIGNAL_ENABLE));
745+
dev_dbg(&hci->master.dev, "status=%#x/%#x",
746+
pio_reg_read(INTR_STATUS), pio_reg_read(INTR_SIGNAL_ENABLE));
738747
}
739748

740749
static void hci_pio_set_ibi_thresh(struct i3c_hci *hci,
@@ -749,7 +758,7 @@ static void hci_pio_set_ibi_thresh(struct i3c_hci *hci,
749758
if (regval != pio->reg_queue_thresh) {
750759
pio_reg_write(QUEUE_THLD_CTRL, regval);
751760
pio->reg_queue_thresh = regval;
752-
DBG("%d", thresh_val);
761+
dev_dbg(&hci->master.dev, "%d", thresh_val);
753762
}
754763
}
755764

@@ -773,7 +782,8 @@ static bool hci_pio_get_ibi_segment(struct i3c_hci *hci,
773782
/* extract the data from the IBI port */
774783
nr_words = thresh_val;
775784
ibi->seg_cnt -= nr_words * 4;
776-
DBG("now %d left %d", nr_words * 4, ibi->seg_cnt);
785+
dev_dbg(&hci->master.dev, "now %d left %d",
786+
nr_words * 4, ibi->seg_cnt);
777787
while (nr_words--)
778788
*p++ = pio_reg_read(IBI_PORT);
779789
}
@@ -791,7 +801,7 @@ static bool hci_pio_get_ibi_segment(struct i3c_hci *hci,
791801
hci_pio_set_ibi_thresh(hci, pio, 1);
792802
if (!(pio_reg_read(INTR_STATUS) & STAT_IBI_STATUS_THLD))
793803
return false;
794-
DBG("trailing %d", ibi->seg_cnt);
804+
dev_dbg(&hci->master.dev, "trailing %d", ibi->seg_cnt);
795805
data = pio_reg_read(IBI_PORT);
796806
data = (__force u32) cpu_to_le32(data);
797807
while (ibi->seg_cnt--) {
@@ -820,7 +830,7 @@ static bool hci_pio_prep_new_ibi(struct i3c_hci *hci, struct hci_pio_data *pio)
820830
*/
821831

822832
ibi_status = pio_reg_read(IBI_PORT);
823-
DBG("status = %#x", ibi_status);
833+
dev_dbg(&hci->master.dev, "status = %#x", ibi_status);
824834
ibi->addr = FIELD_GET(IBI_TARGET_ADDR, ibi_status);
825835
if (ibi_status & IBI_ERROR) {
826836
dev_err(&hci->master.dev, "IBI error from %#x\n", ibi->addr);

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