@@ -74,6 +74,7 @@ struct chip_tsadc_table {
7474 * @tshut_temp: the hardware-controlled shutdown temperature value, with no trim
7575 * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
7676 * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
77+ * @grf_required: true, if a GRF is required for proper functionality
7778 * @initialize: SoC special initialize tsadc controller method
7879 * @irq_ack: clear the interrupt
7980 * @control: enable/disable method for the tsadc controller
@@ -97,6 +98,9 @@ struct rockchip_tsadc_chip {
9798 enum tshut_mode tshut_mode ;
9899 enum tshut_polarity tshut_polarity ;
99100
101+ /* GRF availability */
102+ bool grf_required ;
103+
100104 /* Chip-wide methods */
101105 void (* initialize )(struct regmap * grf ,
102106 void __iomem * reg , enum tshut_polarity p );
@@ -1098,6 +1102,7 @@ static const struct rockchip_tsadc_chip px30_tsadc_data = {
10981102 /* cpu, gpu */
10991103 .chn_offset = 0 ,
11001104 .chn_num = 2 , /* 2 channels for tsadc */
1105+ .grf_required = true,
11011106 .tshut_mode = TSHUT_MODE_CRU , /* default TSHUT via CRU */
11021107 .tshut_temp = 95000 ,
11031108 .initialize = rk_tsadcv4_initialize ,
@@ -1119,6 +1124,7 @@ static const struct rockchip_tsadc_chip rv1108_tsadc_data = {
11191124 /* cpu */
11201125 .chn_offset = 0 ,
11211126 .chn_num = 1 , /* one channel for tsadc */
1127+ .grf_required = false,
11221128 .tshut_mode = TSHUT_MODE_GPIO , /* default TSHUT via GPIO give PMIC */
11231129 .tshut_polarity = TSHUT_LOW_ACTIVE , /* default TSHUT LOW ACTIVE */
11241130 .tshut_temp = 95000 ,
@@ -1141,6 +1147,7 @@ static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
11411147 /* cpu */
11421148 .chn_offset = 0 ,
11431149 .chn_num = 1 , /* one channel for tsadc */
1150+ .grf_required = false,
11441151 .tshut_mode = TSHUT_MODE_GPIO , /* default TSHUT via GPIO give PMIC */
11451152 .tshut_polarity = TSHUT_LOW_ACTIVE , /* default TSHUT LOW ACTIVE */
11461153 .tshut_temp = 95000 ,
@@ -1163,6 +1170,7 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
11631170 /* cpu, gpu */
11641171 .chn_offset = 1 ,
11651172 .chn_num = 2 , /* two channels for tsadc */
1173+ .grf_required = false,
11661174 .tshut_mode = TSHUT_MODE_GPIO , /* default TSHUT via GPIO give PMIC */
11671175 .tshut_polarity = TSHUT_LOW_ACTIVE , /* default TSHUT LOW ACTIVE */
11681176 .tshut_temp = 95000 ,
@@ -1185,6 +1193,7 @@ static const struct rockchip_tsadc_chip rk3328_tsadc_data = {
11851193 /* cpu */
11861194 .chn_offset = 0 ,
11871195 .chn_num = 1 , /* one channels for tsadc */
1196+ .grf_required = false,
11881197 .tshut_mode = TSHUT_MODE_CRU , /* default TSHUT via CRU */
11891198 .tshut_temp = 95000 ,
11901199 .initialize = rk_tsadcv2_initialize ,
@@ -1206,6 +1215,7 @@ static const struct rockchip_tsadc_chip rk3366_tsadc_data = {
12061215 /* cpu, gpu */
12071216 .chn_offset = 0 ,
12081217 .chn_num = 2 , /* two channels for tsadc */
1218+ .grf_required = true,
12091219 .tshut_mode = TSHUT_MODE_GPIO , /* default TSHUT via GPIO give PMIC */
12101220 .tshut_polarity = TSHUT_LOW_ACTIVE , /* default TSHUT LOW ACTIVE */
12111221 .tshut_temp = 95000 ,
@@ -1228,6 +1238,7 @@ static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
12281238 /* cpu, gpu */
12291239 .chn_offset = 0 ,
12301240 .chn_num = 2 , /* two channels for tsadc */
1241+ .grf_required = false,
12311242 .tshut_mode = TSHUT_MODE_GPIO , /* default TSHUT via GPIO give PMIC */
12321243 .tshut_polarity = TSHUT_LOW_ACTIVE , /* default TSHUT LOW ACTIVE */
12331244 .tshut_temp = 95000 ,
@@ -1250,6 +1261,7 @@ static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
12501261 /* cpu, gpu */
12511262 .chn_offset = 0 ,
12521263 .chn_num = 2 , /* two channels for tsadc */
1264+ .grf_required = true,
12531265 .tshut_mode = TSHUT_MODE_GPIO , /* default TSHUT via GPIO give PMIC */
12541266 .tshut_polarity = TSHUT_LOW_ACTIVE , /* default TSHUT LOW ACTIVE */
12551267 .tshut_temp = 95000 ,
@@ -1272,6 +1284,7 @@ static const struct rockchip_tsadc_chip rk3568_tsadc_data = {
12721284 /* cpu, gpu */
12731285 .chn_offset = 0 ,
12741286 .chn_num = 2 , /* two channels for tsadc */
1287+ .grf_required = true,
12751288 .tshut_mode = TSHUT_MODE_GPIO , /* default TSHUT via GPIO give PMIC */
12761289 .tshut_polarity = TSHUT_LOW_ACTIVE , /* default TSHUT LOW ACTIVE */
12771290 .tshut_temp = 95000 ,
@@ -1294,6 +1307,7 @@ static const struct rockchip_tsadc_chip rk3576_tsadc_data = {
12941307 /* top, big_core, little_core, ddr, npu, gpu */
12951308 .chn_offset = 0 ,
12961309 .chn_num = 6 , /* six channels for tsadc */
1310+ .grf_required = false,
12971311 .tshut_mode = TSHUT_MODE_GPIO , /* default TSHUT via GPIO give PMIC */
12981312 .tshut_polarity = TSHUT_LOW_ACTIVE , /* default TSHUT LOW ACTIVE */
12991313 .tshut_temp = 95000 ,
@@ -1318,6 +1332,7 @@ static const struct rockchip_tsadc_chip rk3588_tsadc_data = {
13181332 /* top, big_core0, big_core1, little_core, center, gpu, npu */
13191333 .chn_offset = 0 ,
13201334 .chn_num = 7 , /* seven channels for tsadc */
1335+ .grf_required = false,
13211336 .tshut_mode = TSHUT_MODE_GPIO , /* default TSHUT via GPIO give PMIC */
13221337 .tshut_polarity = TSHUT_LOW_ACTIVE , /* default TSHUT LOW ACTIVE */
13231338 .tshut_temp = 95000 ,
@@ -1594,12 +1609,10 @@ static int rockchip_configure_from_dt(struct device *dev,
15941609 return - EINVAL ;
15951610 }
15961611
1597- /* The tsadc wont to handle the error in here since some SoCs didn't
1598- * need this property.
1599- */
16001612 thermal -> grf = syscon_regmap_lookup_by_phandle (np , "rockchip,grf" );
1601- if (IS_ERR (thermal -> grf ))
1602- dev_warn (dev , "Missing rockchip,grf property\n" );
1613+ if (IS_ERR (thermal -> grf ) && thermal -> chip -> grf_required )
1614+ return dev_err_probe (dev , PTR_ERR (thermal -> grf ),
1615+ "Missing rockchip,grf property\n" );
16031616
16041617 rockchip_get_trim_configuration (dev , np , thermal );
16051618
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