Research: shorten R420 phase-A quad 13 from 19 to 12 XORs (no new kappa)

[mtpsl]

This finite bit-circuit improvement shortens phase-A quad 13 of eumemic's PR543 R420 supplier from 19 to 12 binary XOR gates. Including its required literal reverse cleanup, the complete native word saves 14 scalar ADDs: 26,916 → 26,902. No new κ is claimed.

The exact forward integer transfer matrix is unchanged; the reversed nonnegative transfer matrix decreases entrywise. All 660 symbolic input columns, including every arbitrary dirty helper, retain the required endpoint. Every register's ordered frame path, 420 helpers, nine retained copies and paid rank mass 5112 remain unchanged.

Only research/r420-quad13/ is added. It contains the frozen circuit recipe, exact matrices and certificate, source pins, proof, bounded search, reproducible verifier and local sprint claim. The selected frontier and upstream/ are unchanged.

Reproduce and scope

python3 -B research/r420-quad13/verify.py

Expected:

PASS_R420_QUAD13 gates=19->12 native_adds=26916->26902 columns=660 rank_mass=5112 controls=8

Passed on macOS arm64 / Python 3.12.3, using only the standard library:

• The pinned predecessor E8/frame/dirty-column/H1–H5 audit and all 64 Boolean inputs of the six-register circuit.
• Independent set-valued interpretation of the actual native record exporter, including frame moves and COPY/ERASE lifecycle.
• Eight rejection controls, including F2-neutral positive-cost inflation, scalar-valid but nonliteral cleanup, missing dirty compensation and a dropped exported quad ADD.
• Optimized-Python verification, reproduction of the seed-13 bounded nomination (100,000 attempted rewrites), make selected-record-check, and staged whitespace validation.

This stops at the complete native word. Full repository make verify, multistage C++ formal columns, hosted invoices/moments, outer assembly, Lean and remote CI were not run or claimed. Integration into an accepted supplier requires its usual complete replay. The inherited all-size/compiler/common-label/mutable-basis/hosting/precision/tape/analytic assumptions remain. No optimal gate count or full multiplication theorem is claimed.

Provenance and overlap

Base: 66849e1475c930fd7732b1a0067ffee7e1e95f60, still main at submission refresh. PR543 source: 2065fe4f72a914d907f1046603f5a36f17018535; selected PR626 assembly: 660de893d27bb7abd1d5b01b1640207528a5c851.

Assignment seed 13, bit-supplier track. No pinned coordination issue existed, so the claim is local. The final refresh through #690 found no overlapping phase-A quad contribution. #670 and #674 shorten phase-B blocks; #688 composes and hosts those improvements; #686 changes frame-zero D compensation. This result changes a different circuit and depends on none of those concurrent packages. #661 fixes phase-B gate order and excludes circuit resynthesis. Composition with those changes is not claimed.

Credit remains with eumemic's PR543/493, Dylan Crow's format and exporter, DreamingOfClouds' retained totals/pricing, Zhihao Chen's scalar interface, and the full realization/hosting lineage preserved in the package README and original notice.

Prepared for @mtpsl with substantial OpenAI Codex assistance in the search, proof, checker and packaging, under Apache-2.0. No independent human review is claimed.