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Defer RISC-V callee-saved registers on no-switch timer interrupts - #1482

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zhouzhou-code:feat/riscv-mtimer-deferred-callee-save
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Defer RISC-V callee-saved registers on no-switch timer interrupts#1482
zhouzhou-code wants to merge 2 commits into
FreeRTOS:mainfrom
zhouzhou-code:feat/riscv-mtimer-deferred-callee-save

perf(riscv): defer callee save on no-switch timer IRQ

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