Add periodm period/width/duty cycle measuring module

Author: pcw-mesa

docs/man/man9/hostmot2.9

@@ -92,6 +92,7 @@ The valid entries in the format string are:
  [num_pwmgens=\fIN\fB]
  [num_3pwmgens=\fIN\fB]
  [num_oneshots=\fIN\fB]
+ [num_periodms=\fIN\fB]
  [num_rcpwmgens=\fIN\fB]
  [num_stepgens=\fIN\fB]
  [stepgen_width=\fIN\fB]
@@ -855,6 +856,66 @@ These monitor the filtered inputs.
 (bit rw) swtrigger1,swtrigger2
 software trigger inputs to trigger timer1 and timer2.
 
+.SS periodm
+The periodm is a period/width/duty cycle measuring module. It can measure period, frequency,
+pulse width and duty cycle. It can also average readings for noise filering.
+
+Pins:
+ 
+.TP
+(float r) period_us
+Input period in microseconds.
+
+.TP
+(float r) width_us
+Input pulse width in microseconds.
+
+.TP
+(float r) duty_cycle
+Input duty cycle (width/period) scaling and offset are changeable.
+
+.TP
+(float rw) duty_cycle_scale
+Sets the scale of the duty cycle value, default is 100.
+
+.TP
+(float rw) duty_cycle_offset
+Sets an offset to the duty cycle value, added after scaling. Default is 0.
+
+.TP
+(float rw) averages
+Number of periods/widths to average. From 1 to 4095. Update rate of period, width, duty cycle, and frequency
+will be input frequency/averages.
+
+.TP
+(float r) frequency
+Input frequency in Hz.
+
+.TP
+(float w) minimum_frequency
+Minimum input frequency in Hz, if input frequency is lower than this threshold, the valid bit will be cleared.
+
+.TP
+(float w) filtertc_us
+The periodm input in conditioned with a digital filter for noise rejection. The time constant 
+of this filter is settable via this pin in units of microseconds. Pulses shorter than this time
+constant will not be recognized.
+
+.TP
+(bit out) valid
+The valid output bit is true when the input signal is present and the input frequency exceeds the minimum frequency setting.
+  
+.TP
+(bit in) invert
+The invert bit sets the input polarity, when false, the input is direct which means the input high time
+determines the width. When set true, the input is inverted so the input low time determines the width. 
+
+.TP
+(bit out) input_status
+The input_status bit reads the real time filtered input status (affected by invert pin). 
+
+
+ 
 .SS rcpwmgen
 The rcpwmgen is a simple PWM generator optimized for use with standard RC servos that use pulse width to determine position.
 rcpwmgens have names like "hm2_\fI<BoardType>\fR.\fI<BoardNum>\fR.rcpwmgen.\fI<Instance>\fR" where <Instance> is a 2-digit number.

src/Makefile

@@ -1023,6 +1023,7 @@ hostmot2-objs :=			  \
     hal/drivers/mesa-hostmot2/pktuart.o   \
     hal/drivers/mesa-hostmot2/pwmgen.o	  \
     hal/drivers/mesa-hostmot2/oneshot.o	  \
+    hal/drivers/mesa-hostmot2/periodm.o	  \
     hal/drivers/mesa-hostmot2/raw.o	  \
     hal/drivers/mesa-hostmot2/rcpwmgen.o  \
     hal/drivers/mesa-hostmot2/resolver.o  \

src/hal/drivers/mesa-hostmot2/hostmot2.c

@@ -115,6 +115,7 @@ static void hm2_read(void *void_hm2, long period) {
     hm2_bspi_process_tram_read(hm2, period);
     hm2_absenc_process_tram_read(hm2, period);
     hm2_oneshot_process_tram_read(hm2);
+    hm2_periodm_process_tram_read(hm2);
     //UARTS PktUARTS need to be explicitly handled by an external component
 
     hm2_tp_pwmgen_process_read(hm2); // check the status of the fault bit
@@ -137,6 +138,7 @@ static void hm2_write(void *void_hm2, long period) {
     hm2_ioport_gpio_prepare_tram_write(hm2);
     hm2_pwmgen_prepare_tram_write(hm2);
     hm2_oneshot_prepare_tram_write(hm2);
+    hm2_periodm_prepare_tram_write(hm2);
     hm2_rcpwmgen_prepare_tram_write(hm2);
     hm2_inmux_prepare_tram_write(hm2);
     hm2_inm_prepare_tram_write(hm2);
@@ -146,6 +148,7 @@ static void hm2_write(void *void_hm2, long period) {
     hm2_bspi_prepare_tram_write(hm2, period);
     hm2_ssr_prepare_tram_write(hm2);
     hm2_outm_prepare_tram_write(hm2);
+
     //UARTS need to be explicitly handled by an external component
     hm2_tram_write(hm2);
 
@@ -155,6 +158,7 @@ static void hm2_write(void *void_hm2, long period) {
     hm2_watchdog_write(hm2, period);  // in case the user has written to the watchdog.timeout_ns param
     hm2_pwmgen_write(hm2);    // update pwmgen registers if needed
     hm2_oneshot_write(hm2);   // update oneshot registers if needed
+    hm2_periodm_write(hm2);   // update periodm registers if needed
     hm2_rcpwmgen_write(hm2);  // update rcpwmgen registers if needed
     hm2_inmux_write(hm2);     // update inmux control register if needed
     hm2_inm_write(hm2);       // update inm control register if needed
@@ -321,6 +325,7 @@ const char *hm2_get_general_function_name(int gtag) {
         case HM2_GTAG_DPAINTER:        return "Data Painter";
         case HM2_GTAG_SSR:             return "SSR";
         case HM2_GTAG_ONESHOT:         return "OneShot";
+        case HM2_GTAG_PERIODM:         return "PeriodM";
 
         default: {
             static char unknown[100];
@@ -400,6 +405,7 @@ static int hm2_parse_config_string(hostmot2_t *hm2, char *config_string) {
     hm2->config.num_ssrs = -1;
     hm2->config.num_outms = -1;
     hm2->config.num_oneshots = -1;
+    hm2->config.num_periodms = -1;
     hm2->config.enable_raw = 0;
     hm2->config.firmware = NULL;
 
@@ -462,6 +468,10 @@ static int hm2_parse_config_string(hostmot2_t *hm2, char *config_string) {
             token += 13;
             hm2->config.num_oneshots = simple_strtol(token, NULL, 0);
 
+        } else if (strncmp(token, "num_periodms=", 13) == 0) {
+            token += 13;
+            hm2->config.num_periodms = simple_strtol(token, NULL, 0);
+
         } else if (strncmp(token, "num_ssrs=", 9) == 0) {
             token += 9;
             hm2->config.num_ssrs = simple_strtol(token, NULL, 0);
@@ -558,6 +568,7 @@ static int hm2_parse_config_string(hostmot2_t *hm2, char *config_string) {
     HM2_DBG("    num_inms=%d\n",  hm2->config.num_inms);
     HM2_DBG("    num_outms=%d\n",  hm2->config.num_outms);
     HM2_DBG("    num_oneshots=%d\n",  hm2->config.num_oneshots);
+    HM2_DBG("    num_periodms=%d\n",  hm2->config.num_periodms);
     HM2_DBG("    num_ssrs=%d\n",  hm2->config.num_ssrs);
     HM2_DBG("    num_xy2mods=%d\n",  hm2->config.num_xy2mods);
     HM2_DBG("    num_3pwmgens=%d\n", hm2->config.num_tp_pwmgens);
@@ -1062,6 +1073,10 @@ static int hm2_parse_module_descriptors(hostmot2_t *hm2) {
                 md_accepted = hm2_oneshot_parse_md(hm2, md_index);
                 break;
 
+            case HM2_GTAG_PERIODM:
+                md_accepted = hm2_periodm_parse_md(hm2, md_index);
+                break;
+
           case HM2_GTAG_RCPWMGEN:
                 md_accepted = hm2_rcpwmgen_parse_md(hm2, md_index);
                 break;
@@ -1140,6 +1155,7 @@ static void hm2_cleanup(hostmot2_t *hm2) {
     hm2_ssr_cleanup(hm2);
     hm2_outm_cleanup(hm2);
     hm2_oneshot_cleanup(hm2);
+    hm2_periodm_cleanup(hm2);
     hm2_rcpwmgen_cleanup(hm2);
 
     // free all the tram entries
@@ -1162,6 +1178,7 @@ void hm2_print_modules(hostmot2_t *hm2) {
     hm2_ssr_print_module(hm2);
     hm2_outm_print_module(hm2);
     hm2_oneshot_print_module(hm2);
+    hm2_periodm_print_module(hm2);
     hm2_watchdog_print_module(hm2);
     hm2_inmux_print_module(hm2);
     hm2_inm_print_module(hm2);
@@ -1826,6 +1843,7 @@ void hm2_force_write(hostmot2_t *hm2) {
     hm2_inm_force_write(hm2);
     hm2_xy2mod_force_write(hm2);
     hm2_oneshot_force_write(hm2);
+    hm2_periodm_force_write(hm2);
 
     // NOTE: It's important that the SSR is written *after* the
     // ioport is written.  Initialization of the SSR requires that

src/hal/drivers/mesa-hostmot2/hostmot2.h

@@ -133,6 +133,7 @@
 #define HM2_GTAG_SSR               (195)
 #define HM2_GTAG_SMARTSERIALB      (198) // smart-serial with 224 data bits
 #define HM2_GTAG_ONESHOT           (199) // One shot
+#define HM2_GTAG_PERIODM           (200) // Period module
 
 
 //
@@ -649,6 +650,60 @@ typedef struct {
 
 } hm2_oneshot_t;
 
+//
+// period module
+// 
+
+
+typedef struct {
+
+    struct {
+
+        struct {
+            hal_float_t *period;
+            hal_float_t *width;
+            hal_float_t *dutycycle;
+            hal_float_t *frequency;
+            hal_float_t *filtertc;
+            hal_float_t *dutyscale;
+            hal_float_t *dutyoffset;
+            hal_float_t *minfreq;
+            hal_u32_t *averages;
+            hal_bit_t *polarity;
+            hal_bit_t *valid;
+            hal_bit_t *input;
+        } pin;
+
+    } hal;
+
+} hm2_periodm_instance_t;
+
+
+
+typedef struct {
+    int num_instances;
+    hm2_periodm_instance_t *instance;
+
+    rtapi_u32 clock_frequency;
+    rtapi_u8 version;
+
+    rtapi_u32 mode_read_addr;
+    rtapi_u32 *mode_read_reg;
+
+    rtapi_u32 mode_write_addr;
+    rtapi_u32 *mode_write_reg;
+
+    rtapi_u32 limit_addr;
+    rtapi_u32 *limit_reg;
+
+    rtapi_u32 period_addr;
+    rtapi_u32 *period_reg;
+
+    rtapi_u32 width_addr;
+    rtapi_u32 *width_reg;
+
+} hm2_periodm_t;
+
 //
 // rcpwmgen pwmgen optimized for RC servos
 // 
@@ -1576,6 +1631,7 @@ typedef struct {
         int num_ssrs;
         int num_outms;
         int num_oneshots;
+        int num_periodms;
         char sserial_modes[4][8];
         int enable_raw;
         char *firmware;
@@ -1626,6 +1682,7 @@ typedef struct {
     hm2_ssr_t ssr;
     hm2_outm_t outm;
     hm2_oneshot_t oneshot;
+    hm2_periodm_t periodm;
 
     hm2_raw_t *raw;
 
@@ -1786,6 +1843,17 @@ void hm2_oneshot_force_write(hostmot2_t *hm2);
 void hm2_oneshot_prepare_tram_write(hostmot2_t *hm2);
 void hm2_oneshot_process_tram_read(hostmot2_t *hm2);
 
+//
+// periodm functions
+//
+int hm2_periodm_parse_md(hostmot2_t *hm2, int md_index);
+void hm2_periodm_print_module(hostmot2_t *hm2);
+void hm2_periodm_cleanup(hostmot2_t *hm2);
+void hm2_periodm_write(hostmot2_t *hm2);
+void hm2_periodm_force_write(hostmot2_t *hm2);
+void hm2_periodm_prepare_tram_write(hostmot2_t *hm2);
+void hm2_periodm_process_tram_read(hostmot2_t *hm2);
+
 //
 // rcpwmgen functions
 //
@@ -1863,8 +1931,8 @@ int hm2_bspi_write_chan(char* name, int chan, rtapi_u32 val);
 int hm2_allocate_bspi_tram(char* name);
 int hm2_tram_add_bspi_frame(char *name, int chan, rtapi_u32 **wbuff, rtapi_u32 **rbuff);
 int hm2_bspi_setup_chan(char *name, int chan, int cs, int bits, double mhz,
-                        int delay, int cpol, int cpha, int noclear, int noecho,
-                        int samplelate);
+int delay, int cpol, int cpha, int noclear, int noecho,
+int samplelate);
 int hm2_bspi_set_read_function(char *name, int (*func)(void *subdata), void *subdata);
 int hm2_bspi_set_write_function(char *name, int (*func)(void *subdata), void *subdata);
 
@@ -1996,11 +2064,11 @@ void hm2_outm_print_module(hostmot2_t *hm2);
 // ONESHOT functions
 //
 
-int hm2_oneshot_parse_md(hostmot2_t *hm2, int md_index);
-void hm2_oneshot_cleanup(hostmot2_t *hm2);
-void hm2_oneshot_force_write(hostmot2_t *hm2);
-void hm2_oneshot_prepare_tram_write(hostmot2_t *hm2);
-void hm2_oneshot_print_module(hostmot2_t *hm2);
+//int hm2_oneshot_parse_md(hostmot2_t *hm2, int md_index);
+//void hm2_oneshot_cleanup(hostmot2_t *hm2);
+//void hm2_oneshot_force_write(hostmot2_t *hm2);
+//void hm2_oneshot_prepare_tram_write(hostmot2_t *hm2);
+//void hm2_oneshot_print_module(hostmot2_t *hm2);
 
 
 //