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hi3536dv100: drop the nbd8010s variant now that OpenIPC U-Boot handles the E - #151
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…s the E The variant (#150) uploaded the Xiongmai NBD8010S-KL-V2's stock SPL because the OpenIPC SPL reset that board mid-upload. The real cause was in the U-Boot, not the board: Xiongmai's "Hi3536E" is a Hi3536DV100 die that reads 0x02000000 at SYSCTRL+0xEE0 and needs its own PLL, DMC timing and PHY settings. Without them, software DDR training fails and calls reset_cpu(). OpenIPC/u-boot-hi3536dv100#1 now applies those settings on that chip ID and is published as u-boot-hi3536dv100-universal.bin in OpenIPC/firmware latest. This removes the variant, the 0x5840-byte vendor SPL blob and the tests that pinned it. burn keeps honouring SPL_BLOB, which hi3516av300:emmc still uses, and the session test still checks that blob's 0x5000 length. Verified on the NBD8010S-KL-V2 with plain -c hi3536dv100 and the published U-Boot (its SPL window is byte-identical to the build tested on hardware before merging): defib agent upload -c hi3536dv100 -p /dev/ttyUSB2 --power-cycle -> Agent ready; flash 0..0xF80000 CRC 0xa63bd6ca = backup defib burn -c hi3536dv100 -p /dev/ttyUSB2 --power-cycle -> "OpenIPC #", U-Boot 2010.06 (Oct 15 2026 - 17:06:41), DDR PLL CRG+0x2c = 0x209b (the E setting)
PR Summary by QodoUse universal U-Boot for Hi3536E instead of the NBD8010S variant
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Files changed (5)
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Code Review by Qodo
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…536E fix Qodo review on this branch. With the nbd8010s variant gone, the Hi3536E relies on the published u-boot-hi3536dv100-universal.bin. But the cache never refreshes: a copy downloaded before OpenIPC/u-boot-hi3536dv100#1 keeps being served under the same name, and its SPL resets a Hi3536E during DDR training. get_cached_path() now runs a per-asset content check and treats an entry that fails it as missing, so burn, install and agent upload fetch the current build. The hi3536dv100 check looks for two of the E variant's DMC timing values (0x34421a12, 0x4144b48d) in the SPL window. They sit in the literal pool whatever registers a rebuild allocates. The last pre-fix published build fails the check, and the current one passes. Explicit -f files are never checked. Offline, the stale copy is still used, with a warning: it works on plain DV100 boards. _download() deletes its destination on failure, so download_firmware() saves the stale bytes first and puts them back. Verified on the NBD8010S-KL-V2: with the pre-fix build seeded into the cache, `defib agent upload -c hi3536dv100 --power-cycle` downloaded the current one and the agent came up READY.
The variant (#150) uploaded the Xiongmai NBD8010S-KL-V2's stock SPL
because the OpenIPC SPL reset that board mid-upload. The real cause was
in the U-Boot, not the board: Xiongmai's "Hi3536E" is a Hi3536DV100 die
that reads 0x02000000 at SYSCTRL+0xEE0 and needs its own PLL, DMC timing
and PHY settings. Without them, software DDR training fails and calls
reset_cpu(). OpenIPC/u-boot-hi3536dv100#1 now applies those settings on
that chip ID and is published as u-boot-hi3536dv100-universal.bin in
OpenIPC/firmware latest.
This removes the variant, the 0x5840-byte vendor SPL blob and the tests
that pinned it. burn keeps honouring SPL_BLOB, which hi3516av300:emmc
still uses, and the session test still checks that blob's 0x5000 length.
Verified on the NBD8010S-KL-V2 with plain -c hi3536dv100 and the
published U-Boot (its SPL window is byte-identical to the build tested
on hardware before merging):
defib agent upload -c hi3536dv100 -p /dev/ttyUSB2 --power-cycle
-> Agent ready; flash 0..0xF80000 CRC 0xa63bd6ca = backup
defib burn -c hi3536dv100 -p /dev/ttyUSB2 --power-cycle
-> "OpenIPC #", U-Boot 2010.06 (Oct 15 2026 - 17:06:41),
DDR PLL CRG+0x2c = 0x209b (the E setting)