feat(fpga_diff): add external LLC boot SRAM

[klin02]

Summary

• add a 32 KiB 64-bit AXI BRAM at 0x37f00000 for external_llc boot software
• support byte writes through an AXI BRAM controller
• keep the new memory outside the JTAG flash address space

Validation

• sourced AXI_bridge.tcl and validated the block design with Vivado 2024.2
• confirmed a 4096 x 64 single-port BRAM
• confirmed the CPU 0x37f00000/0x8000 mapping and unchanged JTAG flash-only mapping