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- add RK3588 HDMI controller and HDPTX HDMI PHY support - add RK3528 HDMI PHY, SAI, codec, and audio clock support - extend VOP2 display routing and framebuffer scanout for RK3588 and RK3528 - update Rockchip HDMI, audio card, I2S/TDM, PHY, PM-domain integration - document rk3500 reserved display memory configuration` Signed-off-by: GuEe-GUI <2991707448@qq.com>
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🟡 Changes recommended
Unresolved critical defects break supported HDMI builds and risk inaccessible power domains, failed display initialization, audio underruns, and DMA program corruption.
10 open issues
What changed in this PR
Extends RT-Thread’s Rockchip display and audio support for RK3588 and RK3528, integrating new hardware drivers with the existing framebuffer, PHY, and audio frameworks.
扩展 RT-Thread 对 RK3588 和 RK3528 的显示及音频支持，将新增硬件驱动接入现有 framebuffer、PHY 和音频框架。
Changes / 主要变更：
- Add HDMI PHY support and extend HDMI/VOP2 routing and scanout. / 新增 HDMI PHY 支持，扩展 HDMI/VOP2 路由与显示输出。
- Add RK3528 SAI and DAC playback, shared audio-clock handling, and audio-card integration. / 新增 RK3528 SAI 与 DAC 播放、共享音频时钟处理及声卡集成。
- Update power integration and document framebuffer memory configuration. / 更新电源管理集成，并补充显存配置说明。
| File | Description |
|---|---|
components/drivers/include/drivers/phye.h |
Integrate HDMI PHY mode/options. / 接入 HDMI PHY 模式与参数。 |
components/drivers/include/drivers/phye-hdmi.h |
Define HDMI clock options. / 定义 HDMI 时钟参数。 |
bsp/rockchip/rk3500/README.md |
Document DMA memory sizing. / 说明 DMA 内存配置。 |
bsp/rockchip/rk3500/README_ZH.md |
Add Chinese memory guidance. / 补充中文显存配置说明。 |
bsp/rockchip/dm/soc/rga2/rga2_drv.c |
Recognize RGA2 core0 binding. / 支持 RGA2 core0 绑定。 |
bsp/rockchip/dm/pmdomain/pm-domain-rockchip.c |
Adjust power-domain handling. / 调整电源域处理。 |
bsp/rockchip/dm/phye/SConscript |
Build new HDMI PHY drivers. / 构建新增 HDMI PHY 驱动。 |
bsp/rockchip/dm/phye/phye-rockchip-mipi-dcphy.c |
Simplify includes and reduce logging. / 简化头文件并降低日志级别。 |
bsp/rockchip/dm/phye/phye-rockchip-inno-usb2.c |
Remove redundant includes. / 移除冗余头文件。 |
bsp/rockchip/dm/phye/phye-rockchip-inno-hdmi.c |
Add RK3528 PHY and pixel clock. / 新增 RK3528 PHY 与像素时钟。 |
bsp/rockchip/dm/phye/phye-rockchip-inno-dsidphy.c |
Consolidate includes. / 合并头文件引用。 |
bsp/rockchip/dm/phye/phye-rockchip-hdptx-hdmi.c |
Add RK3588 HDPTX PHY. / 新增 RK3588 HDPTX PHY。 |
bsp/rockchip/dm/phye/Kconfig |
Expose HDMI PHY options. / 提供 HDMI PHY 配置项。 |
bsp/rockchip/dm/mfd/rk8xx.c |
Add RK806 shutdown preparation. / 新增 RK806 关机准备处理。 |
bsp/rockchip/dm/include/rockchip-hdmi.h |
Declare QP audio interfaces. / 声明 QP 音频接口。 |
bsp/rockchip/dm/graphic/framebuffer/SConscript |
Include RK3588 HDMI source. / 加入 RK3588 HDMI 源文件。 |
bsp/rockchip/dm/graphic/framebuffer/hdmi-rockchip.c |
Integrate RK3528 PHY and QP audio dispatch. / 集成 RK3528 PHY 与 QP 音频分派。 |
bsp/rockchip/dm/graphic/framebuffer/fb-vop2.h |
Extend VOP2 registers and state. / 扩展 VOP2 寄存器与状态。 |
bsp/rockchip/dm/graphic/framebuffer/fb-vop2-vp.h |
Add video-port register definitions. / 新增视频端口寄存器定义。 |
bsp/rockchip/dm/graphic/framebuffer/fb-vop2-vp.c |
Extend clocks, routing, and plane setup. / 扩展时钟、路由及图层配置。 |
bsp/rockchip/dm/graphic/framebuffer/display-rockchip.c |
Update route fallback and probe retries. / 更新路由回退与探测重试。 |
bsp/rockchip/dm/clk/clk-rk3588.c |
Preserve I2S5 clock parent during rate changes. / 调频时保留 I2S5 父时钟。 |
bsp/rockchip/dm/audio/SConscript |
Build SAI, codec, and shared clock support. / 构建 SAI、编解码器及共享时钟支持。 |
bsp/rockchip/dm/audio/rockchip-sai.h |
Declare SAI playback interfaces. / 声明 SAI 播放接口。 |
bsp/rockchip/dm/audio/rockchip-sai.c |
Implement RK3528 SAI DMA playback. / 实现 RK3528 SAI DMA 播放。 |
bsp/rockchip/dm/audio/rockchip-i2s-tdm.h |
Add optional-driver stubs and underrun APIs. / 新增可选驱动桩函数与欠载接口。 |
bsp/rockchip/dm/audio/rockchip-i2s-tdm.c |
Update playback timing and lifecycle handling. / 更新播放时序与生命周期处理。 |
bsp/rockchip/dm/audio/rockchip-audio-clock.h |
Declare shared master-clock helper. / 声明共享主时钟辅助接口。 |
bsp/rockchip/dm/audio/rockchip-audio-clock.c |
Share I2S/SAI clock configuration. / 共享 I2S/SAI 时钟配置逻辑。 |
bsp/rockchip/dm/audio/rockchip-audio-card.c |
Integrate SAI/DAC and revise replay management. / 集成 SAI/DAC 并调整播放管理。 |
bsp/rockchip/dm/audio/Kconfig |
Add RK3528 audio selections. / 新增 RK3528 音频配置项。 |
bsp/rockchip/dm/audio/codec/rk817-codec.h |
Add disabled-driver stubs. / 新增驱动禁用时的桩函数。 |
bsp/rockchip/dm/audio/codec/rk3528-codec.h |
Declare RK3528 DAC controls. / 声明 RK3528 DAC 控制接口。 |
bsp/rockchip/dm/audio/codec/rk3528-codec.c |
Implement DAC playback, volume, and mute. / 实现 DAC 播放、音量及静音控制。 |
Review effort: Balanced
| rt_dma_chan_stop(card->dma_tx); | ||
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| /* The audio core submits one block at a time. */ | ||
| if ((err = rt_dma_prep_single(card->dma_tx, &transfer))) |
| * Pace each channel word from the configured sample rate so writes | ||
| * cannot overrun a FIFO whose level is not observable. | ||
| */ | ||
| rt_hw_us_delay(i2s->pio_word_delay_us); |
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| if GetDepend(['RT_GRAPHIC_CONNECTOR_HDMI']): | ||
| src += ['hdmi-rockchip.c'] | ||
| src += ['hdmi-rockchip.c', 'hdmi-rk3588.c'] |
Comment on lines
+815
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| if ((policy == DISPLAY_POLICY_AUTO || policy == DISPLAY_POLICY_HDMI) && | ||
| display_enable_hdmi0_fallback()) | ||
| { | ||
| return 0; | ||
| } | ||
|
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||
| if (!display_enable_routes()) | ||
| { | ||
| display_enable_hdmi0_fallback(); | ||
| } |
Comment on lines
+633
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+637
| if (vfb->soc->soc == VOP2FB_SOC_RK3528) | ||
| rt_strncpy(name, "clk_hdmiphy_pixel_io", sizeof(name)); | ||
| else | ||
| rt_snprintf(name, sizeof(name), "clk_hdmiphy_pixel%u", 0U); | ||
| pixel_clk = rt_clk_get_by_name(dev, name); |
| config RT_PHYE_ROCKCHIP_HDPTX_HDMI | ||
| bool "Rockchip Samsung HDPTX HDMI PHY (rk3588)" | ||
| depends on RT_USING_PHYE | ||
| depends on RT_USING_CLK |
Comment on lines
+641
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+659
| err = rt_clk_prepare_enable(hdptx->apb_clk); | ||
| if (!err) | ||
| { | ||
| err = rt_clk_prepare_enable(hdptx->ref_clk); | ||
| } | ||
| if (!err) | ||
| { | ||
| err = hdptx_program_ropll(hdptx, hdptx->tmds_clock); | ||
| } | ||
| if (!err) | ||
| { | ||
| return RT_EOK; | ||
| } | ||
|
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||
| hdptx->pixel_users = 0; | ||
| rt_clk_disable_unprepare(hdptx->ref_clk); | ||
| rt_clk_disable_unprepare(hdptx->apb_clk); | ||
|
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||
| return err; |
| domain_info = &pmu->info->domain_info[idx]; | ||
|
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| if (domain_info->pwr_mask) | ||
| if (!domain_info->pwr_mask) |
Comment on lines
+75
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+78
| /* Native timing advertised by the Rock 5B HDMI0 sink. */ | ||
| tim->pixelclock = 241500000; | ||
| tim->hactive = 2560; | ||
| tim->hfront_porch = 48; |
Comment on lines
+1400
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+1401
| port_sel &= ~(0xfu << (vfb->vp_id * 4)); | ||
| port_sel |= (vfb->vp_id & 3u) << 24; |
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