@@ -118,6 +118,7 @@ struct tegra_hte_line_data {
118118
119119struct tegra_hte_data {
120120 enum tegra_hte_type type ;
121+ u32 slices ;
121122 u32 map_sz ;
122123 u32 sec_map_sz ;
123124 const struct tegra_hte_line_mapped * map ;
@@ -323,6 +324,7 @@ static const struct tegra_hte_data t194_aon_hte = {
323324 .sec_map_sz = ARRAY_SIZE (tegra194_aon_gpio_sec_map ),
324325 .sec_map = tegra194_aon_gpio_sec_map ,
325326 .type = HTE_TEGRA_TYPE_GPIO ,
327+ .slices = 3 ,
326328};
327329
328330static const struct tegra_hte_data t234_aon_hte = {
@@ -331,12 +333,21 @@ static const struct tegra_hte_data t234_aon_hte = {
331333 .sec_map_sz = ARRAY_SIZE (tegra234_aon_gpio_sec_map ),
332334 .sec_map = tegra234_aon_gpio_sec_map ,
333335 .type = HTE_TEGRA_TYPE_GPIO ,
336+ .slices = 3 ,
334337};
335338
336- static const struct tegra_hte_data lic_hte = {
339+ static const struct tegra_hte_data t194_lic_hte = {
337340 .map_sz = 0 ,
338341 .map = NULL ,
339342 .type = HTE_TEGRA_TYPE_LIC ,
343+ .slices = 11 ,
344+ };
345+
346+ static const struct tegra_hte_data t234_lic_hte = {
347+ .map_sz = 0 ,
348+ .map = NULL ,
349+ .type = HTE_TEGRA_TYPE_LIC ,
350+ .slices = 17 ,
340351};
341352
342353static inline u32 tegra_hte_readl (struct tegra_hte_soc * hte , u32 reg )
@@ -639,9 +650,9 @@ static bool tegra_hte_match_from_linedata(const struct hte_chip *chip,
639650}
640651
641652static const struct of_device_id tegra_hte_of_match [] = {
642- { .compatible = "nvidia,tegra194-gte-lic" , .data = & lic_hte },
653+ { .compatible = "nvidia,tegra194-gte-lic" , .data = & t194_lic_hte },
643654 { .compatible = "nvidia,tegra194-gte-aon" , .data = & t194_aon_hte },
644- { .compatible = "nvidia,tegra234-gte-lic" , .data = & lic_hte },
655+ { .compatible = "nvidia,tegra234-gte-lic" , .data = & t234_lic_hte },
645656 { .compatible = "nvidia,tegra234-gte-aon" , .data = & t234_aon_hte },
646657 { }
647658};
@@ -679,13 +690,6 @@ static int tegra_hte_probe(struct platform_device *pdev)
679690
680691 dev = & pdev -> dev ;
681692
682- ret = of_property_read_u32 (dev -> of_node , "nvidia,slices" , & slices );
683- if (ret != 0 ) {
684- dev_err (dev , "Could not read slices\n" );
685- return - EINVAL ;
686- }
687- nlines = slices << 5 ;
688-
689693 hte_dev = devm_kzalloc (dev , sizeof (* hte_dev ), GFP_KERNEL );
690694 if (!hte_dev )
691695 return - ENOMEM ;
@@ -697,6 +701,13 @@ static int tegra_hte_probe(struct platform_device *pdev)
697701 dev_set_drvdata (& pdev -> dev , hte_dev );
698702 hte_dev -> prov_data = of_device_get_match_data (& pdev -> dev );
699703
704+ ret = of_property_read_u32 (dev -> of_node , "nvidia,slices" , & slices );
705+ if (ret != 0 )
706+ slices = hte_dev -> prov_data -> slices ;
707+
708+ dev_dbg (dev , "slices:%d\n" , slices );
709+ nlines = slices << 5 ;
710+
700711 hte_dev -> regs = devm_platform_ioremap_resource (pdev , 0 );
701712 if (IS_ERR (hte_dev -> regs ))
702713 return PTR_ERR (hte_dev -> regs );
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