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Merge tag 'amd-drm-fixes-7.0-2026-02-26' of https://gitlab.freedesktop.org/agd5f/linux into drm-fixes
amd-drm-fixes-7.0-2026-02-26: amdgpu: - UserQ fixes - DC fix - RAS fixes - VCN 5 fix - Slot reset fix - Remove MES workaround that's no longer needed Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patch.msgid.link/20260226161330.3549393-1-alexander.deucher@amd.com
2 parents 82a499d + 6b0d812 commit 103d53e

8 files changed

Lines changed: 42 additions & 28 deletions

File tree

drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -641,6 +641,7 @@ static void aca_error_fini(struct aca_error *aerr)
641641
aca_bank_error_remove(aerr, bank_error);
642642

643643
out_unlock:
644+
mutex_unlock(&aerr->lock);
644645
mutex_destroy(&aerr->lock);
645646
}
646647

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

Lines changed: 10 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -7059,6 +7059,15 @@ pci_ers_result_t amdgpu_pci_slot_reset(struct pci_dev *pdev)
70597059
dev_info(adev->dev, "PCI error: slot reset callback!!\n");
70607060

70617061
memset(&reset_context, 0, sizeof(reset_context));
7062+
INIT_LIST_HEAD(&device_list);
7063+
hive = amdgpu_get_xgmi_hive(adev);
7064+
if (hive) {
7065+
mutex_lock(&hive->hive_lock);
7066+
list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head)
7067+
list_add_tail(&tmp_adev->reset_list, &device_list);
7068+
} else {
7069+
list_add_tail(&adev->reset_list, &device_list);
7070+
}
70627071

70637072
if (adev->pcie_reset_ctx.swus)
70647073
link_dev = adev->pcie_reset_ctx.swus;
@@ -7099,19 +7108,13 @@ pci_ers_result_t amdgpu_pci_slot_reset(struct pci_dev *pdev)
70997108
reset_context.reset_req_dev = adev;
71007109
set_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags);
71017110
set_bit(AMDGPU_SKIP_COREDUMP, &reset_context.flags);
7102-
INIT_LIST_HEAD(&device_list);
71037111

7104-
hive = amdgpu_get_xgmi_hive(adev);
71057112
if (hive) {
7106-
mutex_lock(&hive->hive_lock);
71077113
reset_context.hive = hive;
7108-
list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) {
7114+
list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head)
71097115
tmp_adev->pcie_reset_ctx.in_link_reset = true;
7110-
list_add_tail(&tmp_adev->reset_list, &device_list);
7111-
}
71127116
} else {
71137117
set_bit(AMDGPU_SKIP_HW_RESET, &reset_context.flags);
7114-
list_add_tail(&adev->reset_list, &device_list);
71157118
}
71167119

71177120
r = amdgpu_device_asic_reset(adev, &device_list, &reset_context);

drivers/gpu/drm/amd/amdgpu/amdgpu_psp_ta.c

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -332,37 +332,39 @@ static ssize_t ta_if_invoke_debugfs_write(struct file *fp, const char *buf, size
332332
if (!context || !context->initialized) {
333333
dev_err(adev->dev, "TA is not initialized\n");
334334
ret = -EINVAL;
335-
goto err_free_shared_buf;
335+
goto free_shared_buf;
336336
}
337337

338338
if (!psp->ta_funcs || !psp->ta_funcs->fn_ta_invoke) {
339339
dev_err(adev->dev, "Unsupported function to invoke TA\n");
340340
ret = -EOPNOTSUPP;
341-
goto err_free_shared_buf;
341+
goto free_shared_buf;
342342
}
343343

344344
context->session_id = ta_id;
345345

346346
mutex_lock(&psp->ras_context.mutex);
347347
ret = prep_ta_mem_context(&context->mem_context, shared_buf, shared_buf_len);
348348
if (ret)
349-
goto err_free_shared_buf;
349+
goto unlock;
350350

351351
ret = psp_fn_ta_invoke(psp, cmd_id);
352352
if (ret || context->resp_status) {
353353
dev_err(adev->dev, "Failed to invoke TA via debugfs (%d) and status (0x%X)\n",
354354
ret, context->resp_status);
355355
if (!ret) {
356356
ret = -EINVAL;
357-
goto err_free_shared_buf;
357+
goto unlock;
358358
}
359359
}
360360

361361
if (copy_to_user((char *)&buf[copy_pos], context->mem_context.shared_buf, shared_buf_len))
362362
ret = -EFAULT;
363363

364-
err_free_shared_buf:
364+
unlock:
365365
mutex_unlock(&psp->ras_context.mutex);
366+
367+
free_shared_buf:
366368
kfree(shared_buf);
367369

368370
return ret;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

Lines changed: 18 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -35,6 +35,8 @@
3535
static const struct dma_fence_ops amdgpu_userq_fence_ops;
3636
static struct kmem_cache *amdgpu_userq_fence_slab;
3737

38+
#define AMDGPU_USERQ_MAX_HANDLES (1U << 16)
39+
3840
int amdgpu_userq_fence_slab_init(void)
3941
{
4042
amdgpu_userq_fence_slab = kmem_cache_create("amdgpu_userq_fence",
@@ -478,6 +480,11 @@ int amdgpu_userq_signal_ioctl(struct drm_device *dev, void *data,
478480
if (!amdgpu_userq_enabled(dev))
479481
return -ENOTSUPP;
480482

483+
if (args->num_syncobj_handles > AMDGPU_USERQ_MAX_HANDLES ||
484+
args->num_bo_write_handles > AMDGPU_USERQ_MAX_HANDLES ||
485+
args->num_bo_read_handles > AMDGPU_USERQ_MAX_HANDLES)
486+
return -EINVAL;
487+
481488
num_syncobj_handles = args->num_syncobj_handles;
482489
syncobj_handles = memdup_user(u64_to_user_ptr(args->syncobj_handles),
483490
size_mul(sizeof(u32), num_syncobj_handles));
@@ -664,6 +671,11 @@ int amdgpu_userq_wait_ioctl(struct drm_device *dev, void *data,
664671
if (!amdgpu_userq_enabled(dev))
665672
return -ENOTSUPP;
666673

674+
if (wait_info->num_syncobj_handles > AMDGPU_USERQ_MAX_HANDLES ||
675+
wait_info->num_bo_write_handles > AMDGPU_USERQ_MAX_HANDLES ||
676+
wait_info->num_bo_read_handles > AMDGPU_USERQ_MAX_HANDLES)
677+
return -EINVAL;
678+
667679
num_read_bo_handles = wait_info->num_bo_read_handles;
668680
bo_handles_read = memdup_user(u64_to_user_ptr(wait_info->bo_read_handles),
669681
size_mul(sizeof(u32), num_read_bo_handles));
@@ -833,7 +845,7 @@ int amdgpu_userq_wait_ioctl(struct drm_device *dev, void *data,
833845

834846
dma_resv_for_each_fence(&resv_cursor, gobj_read[i]->resv,
835847
DMA_RESV_USAGE_READ, fence) {
836-
if (WARN_ON_ONCE(num_fences >= wait_info->num_fences)) {
848+
if (num_fences >= wait_info->num_fences) {
837849
r = -EINVAL;
838850
goto free_fences;
839851
}
@@ -850,7 +862,7 @@ int amdgpu_userq_wait_ioctl(struct drm_device *dev, void *data,
850862

851863
dma_resv_for_each_fence(&resv_cursor, gobj_write[i]->resv,
852864
DMA_RESV_USAGE_WRITE, fence) {
853-
if (WARN_ON_ONCE(num_fences >= wait_info->num_fences)) {
865+
if (num_fences >= wait_info->num_fences) {
854866
r = -EINVAL;
855867
goto free_fences;
856868
}
@@ -874,8 +886,9 @@ int amdgpu_userq_wait_ioctl(struct drm_device *dev, void *data,
874886
goto free_fences;
875887

876888
dma_fence_unwrap_for_each(f, &iter, fence) {
877-
if (WARN_ON_ONCE(num_fences >= wait_info->num_fences)) {
889+
if (num_fences >= wait_info->num_fences) {
878890
r = -EINVAL;
891+
dma_fence_put(fence);
879892
goto free_fences;
880893
}
881894

@@ -898,8 +911,9 @@ int amdgpu_userq_wait_ioctl(struct drm_device *dev, void *data,
898911
if (r)
899912
goto free_fences;
900913

901-
if (WARN_ON_ONCE(num_fences >= wait_info->num_fences)) {
914+
if (num_fences >= wait_info->num_fences) {
902915
r = -EINVAL;
916+
dma_fence_put(fence);
903917
goto free_fences;
904918
}
905919

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -720,11 +720,6 @@ static int mes_v11_0_set_hw_resources(struct amdgpu_mes *mes)
720720
mes_set_hw_res_pkt.enable_reg_active_poll = 1;
721721
mes_set_hw_res_pkt.enable_level_process_quantum_check = 1;
722722
mes_set_hw_res_pkt.oversubscription_timer = 50;
723-
if ((mes->adev->mes.sched_version & AMDGPU_MES_VERSION_MASK) >= 0x7f)
724-
mes_set_hw_res_pkt.enable_lr_compute_wa = 1;
725-
else
726-
dev_info_once(mes->adev->dev,
727-
"MES FW version must be >= 0x7f to enable LR compute workaround.\n");
728723

729724
if (amdgpu_mes_log_enable) {
730725
mes_set_hw_res_pkt.enable_mes_event_int_logging = 1;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -779,11 +779,6 @@ static int mes_v12_0_set_hw_resources(struct amdgpu_mes *mes, int pipe)
779779
mes_set_hw_res_pkt.use_different_vmid_compute = 1;
780780
mes_set_hw_res_pkt.enable_reg_active_poll = 1;
781781
mes_set_hw_res_pkt.enable_level_process_quantum_check = 1;
782-
if ((mes->adev->mes.sched_version & AMDGPU_MES_VERSION_MASK) >= 0x82)
783-
mes_set_hw_res_pkt.enable_lr_compute_wa = 1;
784-
else
785-
dev_info_once(adev->dev,
786-
"MES FW version must be >= 0x82 to enable LR compute workaround.\n");
787782

788783
/*
789784
* Keep oversubscribe timer for sdma . When we have unmapped doorbell

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -174,6 +174,10 @@ static int vcn_v5_0_0_sw_init(struct amdgpu_ip_block *ip_block)
174174
fw_shared->present_flag_0 = cpu_to_le32(AMDGPU_FW_SHARED_FLAG_0_UNIFIED_QUEUE);
175175
fw_shared->sq.is_enabled = 1;
176176

177+
fw_shared->present_flag_0 |= cpu_to_le32(AMDGPU_VCN_SMU_DPM_INTERFACE_FLAG);
178+
fw_shared->smu_dpm_interface.smu_interface_type = (adev->flags & AMD_IS_APU) ?
179+
AMDGPU_VCN_SMU_DPM_INTERFACE_APU : AMDGPU_VCN_SMU_DPM_INTERFACE_DGPU;
180+
177181
if (amdgpu_vcnfw_log)
178182
amdgpu_vcn_fwlog_init(&adev->vcn.inst[i]);
179183

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -170,11 +170,11 @@ struct dc_stream_state *dc_create_stream_for_sink(
170170
if (sink == NULL)
171171
goto fail;
172172

173-
stream = kzalloc_obj(struct dc_stream_state);
173+
stream = kzalloc_obj(struct dc_stream_state, GFP_ATOMIC);
174174
if (stream == NULL)
175175
goto fail;
176176

177-
stream->update_scratch = kzalloc((int32_t) dc_update_scratch_space_size(), GFP_KERNEL);
177+
stream->update_scratch = kzalloc((int32_t) dc_update_scratch_space_size(), GFP_ATOMIC);
178178
if (stream->update_scratch == NULL)
179179
goto fail;
180180

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