@@ -285,85 +285,6 @@ static const struct imx_rproc_att imx_rproc_att_imx6sx[] = {
285285 { 0x80000000 , 0x80000000 , 0x60000000 , 0 },
286286};
287287
288- static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mn_mmio = {
289- .src_reg = IMX7D_SRC_SCR ,
290- .src_mask = IMX7D_M4_RST_MASK ,
291- .src_start = IMX7D_M4_START ,
292- .src_stop = IMX8M_M7_STOP ,
293- .gpr_reg = IMX8M_GPR22 ,
294- .gpr_wait = IMX8M_GPR22_CM7_CPUWAIT ,
295- .att = imx_rproc_att_imx8mn ,
296- .att_size = ARRAY_SIZE (imx_rproc_att_imx8mn ),
297- .method = IMX_RPROC_MMIO ,
298- };
299-
300- static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mn = {
301- .att = imx_rproc_att_imx8mn ,
302- .att_size = ARRAY_SIZE (imx_rproc_att_imx8mn ),
303- .method = IMX_RPROC_SMC ,
304- };
305-
306- static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mq = {
307- .src_reg = IMX7D_SRC_SCR ,
308- .src_mask = IMX7D_M4_RST_MASK ,
309- .src_start = IMX7D_M4_START ,
310- .src_stop = IMX7D_M4_STOP ,
311- .att = imx_rproc_att_imx8mq ,
312- .att_size = ARRAY_SIZE (imx_rproc_att_imx8mq ),
313- .method = IMX_RPROC_MMIO ,
314- };
315-
316- static const struct imx_rproc_dcfg imx_rproc_cfg_imx8qm = {
317- .att = imx_rproc_att_imx8qm ,
318- .att_size = ARRAY_SIZE (imx_rproc_att_imx8qm ),
319- .method = IMX_RPROC_SCU_API ,
320- };
321-
322- static const struct imx_rproc_dcfg imx_rproc_cfg_imx8qxp = {
323- .att = imx_rproc_att_imx8qxp ,
324- .att_size = ARRAY_SIZE (imx_rproc_att_imx8qxp ),
325- .method = IMX_RPROC_SCU_API ,
326- };
327-
328- static const struct imx_rproc_dcfg imx_rproc_cfg_imx8ulp = {
329- .att = imx_rproc_att_imx8ulp ,
330- .att_size = ARRAY_SIZE (imx_rproc_att_imx8ulp ),
331- .method = IMX_RPROC_NONE ,
332- };
333-
334- static const struct imx_rproc_dcfg imx_rproc_cfg_imx7ulp = {
335- .att = imx_rproc_att_imx7ulp ,
336- .att_size = ARRAY_SIZE (imx_rproc_att_imx7ulp ),
337- .method = IMX_RPROC_NONE ,
338- .flags = IMX_RPROC_NEED_SYSTEM_OFF ,
339- };
340-
341- static const struct imx_rproc_dcfg imx_rproc_cfg_imx7d = {
342- .src_reg = IMX7D_SRC_SCR ,
343- .src_mask = IMX7D_M4_RST_MASK ,
344- .src_start = IMX7D_M4_START ,
345- .src_stop = IMX7D_M4_STOP ,
346- .att = imx_rproc_att_imx7d ,
347- .att_size = ARRAY_SIZE (imx_rproc_att_imx7d ),
348- .method = IMX_RPROC_MMIO ,
349- };
350-
351- static const struct imx_rproc_dcfg imx_rproc_cfg_imx6sx = {
352- .src_reg = IMX6SX_SRC_SCR ,
353- .src_mask = IMX6SX_M4_RST_MASK ,
354- .src_start = IMX6SX_M4_START ,
355- .src_stop = IMX6SX_M4_STOP ,
356- .att = imx_rproc_att_imx6sx ,
357- .att_size = ARRAY_SIZE (imx_rproc_att_imx6sx ),
358- .method = IMX_RPROC_MMIO ,
359- };
360-
361- static const struct imx_rproc_dcfg imx_rproc_cfg_imx93 = {
362- .att = imx_rproc_att_imx93 ,
363- .att_size = ARRAY_SIZE (imx_rproc_att_imx93 ),
364- .method = IMX_RPROC_SMC ,
365- };
366-
367288static int imx_rproc_start (struct rproc * rproc )
368289{
369290 struct imx_rproc * priv = rproc -> priv ;
@@ -1222,6 +1143,85 @@ static void imx_rproc_remove(struct platform_device *pdev)
12221143 destroy_workqueue (priv -> workqueue );
12231144}
12241145
1146+ static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mn_mmio = {
1147+ .src_reg = IMX7D_SRC_SCR ,
1148+ .src_mask = IMX7D_M4_RST_MASK ,
1149+ .src_start = IMX7D_M4_START ,
1150+ .src_stop = IMX8M_M7_STOP ,
1151+ .gpr_reg = IMX8M_GPR22 ,
1152+ .gpr_wait = IMX8M_GPR22_CM7_CPUWAIT ,
1153+ .att = imx_rproc_att_imx8mn ,
1154+ .att_size = ARRAY_SIZE (imx_rproc_att_imx8mn ),
1155+ .method = IMX_RPROC_MMIO ,
1156+ };
1157+
1158+ static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mn = {
1159+ .att = imx_rproc_att_imx8mn ,
1160+ .att_size = ARRAY_SIZE (imx_rproc_att_imx8mn ),
1161+ .method = IMX_RPROC_SMC ,
1162+ };
1163+
1164+ static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mq = {
1165+ .src_reg = IMX7D_SRC_SCR ,
1166+ .src_mask = IMX7D_M4_RST_MASK ,
1167+ .src_start = IMX7D_M4_START ,
1168+ .src_stop = IMX7D_M4_STOP ,
1169+ .att = imx_rproc_att_imx8mq ,
1170+ .att_size = ARRAY_SIZE (imx_rproc_att_imx8mq ),
1171+ .method = IMX_RPROC_MMIO ,
1172+ };
1173+
1174+ static const struct imx_rproc_dcfg imx_rproc_cfg_imx8qm = {
1175+ .att = imx_rproc_att_imx8qm ,
1176+ .att_size = ARRAY_SIZE (imx_rproc_att_imx8qm ),
1177+ .method = IMX_RPROC_SCU_API ,
1178+ };
1179+
1180+ static const struct imx_rproc_dcfg imx_rproc_cfg_imx8qxp = {
1181+ .att = imx_rproc_att_imx8qxp ,
1182+ .att_size = ARRAY_SIZE (imx_rproc_att_imx8qxp ),
1183+ .method = IMX_RPROC_SCU_API ,
1184+ };
1185+
1186+ static const struct imx_rproc_dcfg imx_rproc_cfg_imx8ulp = {
1187+ .att = imx_rproc_att_imx8ulp ,
1188+ .att_size = ARRAY_SIZE (imx_rproc_att_imx8ulp ),
1189+ .method = IMX_RPROC_NONE ,
1190+ };
1191+
1192+ static const struct imx_rproc_dcfg imx_rproc_cfg_imx7ulp = {
1193+ .att = imx_rproc_att_imx7ulp ,
1194+ .att_size = ARRAY_SIZE (imx_rproc_att_imx7ulp ),
1195+ .method = IMX_RPROC_NONE ,
1196+ .flags = IMX_RPROC_NEED_SYSTEM_OFF ,
1197+ };
1198+
1199+ static const struct imx_rproc_dcfg imx_rproc_cfg_imx7d = {
1200+ .src_reg = IMX7D_SRC_SCR ,
1201+ .src_mask = IMX7D_M4_RST_MASK ,
1202+ .src_start = IMX7D_M4_START ,
1203+ .src_stop = IMX7D_M4_STOP ,
1204+ .att = imx_rproc_att_imx7d ,
1205+ .att_size = ARRAY_SIZE (imx_rproc_att_imx7d ),
1206+ .method = IMX_RPROC_MMIO ,
1207+ };
1208+
1209+ static const struct imx_rproc_dcfg imx_rproc_cfg_imx6sx = {
1210+ .src_reg = IMX6SX_SRC_SCR ,
1211+ .src_mask = IMX6SX_M4_RST_MASK ,
1212+ .src_start = IMX6SX_M4_START ,
1213+ .src_stop = IMX6SX_M4_STOP ,
1214+ .att = imx_rproc_att_imx6sx ,
1215+ .att_size = ARRAY_SIZE (imx_rproc_att_imx6sx ),
1216+ .method = IMX_RPROC_MMIO ,
1217+ };
1218+
1219+ static const struct imx_rproc_dcfg imx_rproc_cfg_imx93 = {
1220+ .att = imx_rproc_att_imx93 ,
1221+ .att_size = ARRAY_SIZE (imx_rproc_att_imx93 ),
1222+ .method = IMX_RPROC_SMC ,
1223+ };
1224+
12251225static const struct of_device_id imx_rproc_of_match [] = {
12261226 { .compatible = "fsl,imx7ulp-cm4" , .data = & imx_rproc_cfg_imx7ulp },
12271227 { .compatible = "fsl,imx7d-cm4" , .data = & imx_rproc_cfg_imx7d },
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