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AngeloGioacchino Del Regnobebarino
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clk: mediatek: clk-mt8186-topckgen: Migrate to mtk_clk_simple_probe()
As done with MT8192, migrate MT8186 topckgen away from a custom probe function and use mtk_clk_simple_{probe, remove}(). Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Miles Chen <miles.chen@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20230120092053.182923-21-angelogioacchino.delregno@collabora.com Tested-by: Mingming Su <mingming.su@mediatek.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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1 file changed

Lines changed: 19 additions & 84 deletions

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drivers/clk/mediatek/clk-mt8186-topckgen.c

Lines changed: 19 additions & 84 deletions
Original file line numberDiff line numberDiff line change
@@ -681,11 +681,6 @@ static struct mtk_composite top_muxes[] = {
681681
0x0320, 4, 0x0334, 8, 0),
682682
};
683683

684-
static const struct of_device_id of_match_clk_mt8186_topck[] = {
685-
{ .compatible = "mediatek,mt8186-topckgen", },
686-
{}
687-
};
688-
689684
/* Register mux notifier for MFG mux */
690685
static int clk_mt8186_reg_mfg_mux_notifier(struct device *dev, struct clk *clk)
691686
{
@@ -708,88 +703,28 @@ static int clk_mt8186_reg_mfg_mux_notifier(struct device *dev, struct clk *clk)
708703
return devm_mtk_clk_mux_notifier_register(dev, clk, mfg_mux_nb);
709704
}
710705

711-
static int clk_mt8186_topck_probe(struct platform_device *pdev)
712-
{
713-
struct clk_hw_onecell_data *clk_data;
714-
struct device_node *node = pdev->dev.of_node;
715-
int r;
716-
void __iomem *base;
717-
718-
clk_data = mtk_alloc_clk_data(CLK_TOP_NR_CLK);
719-
if (!clk_data)
720-
return -ENOMEM;
721-
722-
base = devm_platform_ioremap_resource(pdev, 0);
723-
if (IS_ERR(base)) {
724-
r = PTR_ERR(base);
725-
goto free_top_data;
726-
}
727-
728-
r = mtk_clk_register_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks),
729-
clk_data);
730-
if (r)
731-
goto free_top_data;
732-
733-
r = mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data);
734-
if (r)
735-
goto unregister_fixed_clks;
736-
737-
r = mtk_clk_register_muxes(&pdev->dev, top_mtk_muxes,
738-
ARRAY_SIZE(top_mtk_muxes), node,
739-
&mt8186_clk_lock, clk_data);
740-
if (r)
741-
goto unregister_factors;
742-
743-
r = mtk_clk_register_composites(&pdev->dev, top_muxes,
744-
ARRAY_SIZE(top_muxes), base,
745-
&mt8186_clk_lock, clk_data);
746-
if (r)
747-
goto unregister_muxes;
748-
749-
r = clk_mt8186_reg_mfg_mux_notifier(&pdev->dev,
750-
clk_data->hws[CLK_TOP_MFG]->clk);
751-
if (r)
752-
goto unregister_composite_muxes;
753-
754-
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
755-
if (r)
756-
goto unregister_composite_muxes;
757-
758-
platform_set_drvdata(pdev, clk_data);
759-
760-
return r;
761-
762-
unregister_composite_muxes:
763-
mtk_clk_unregister_composites(top_muxes, ARRAY_SIZE(top_muxes), clk_data);
764-
unregister_muxes:
765-
mtk_clk_unregister_muxes(top_mtk_muxes, ARRAY_SIZE(top_mtk_muxes), clk_data);
766-
unregister_factors:
767-
mtk_clk_unregister_factors(top_divs, ARRAY_SIZE(top_divs), clk_data);
768-
unregister_fixed_clks:
769-
mtk_clk_unregister_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks), clk_data);
770-
free_top_data:
771-
mtk_free_clk_data(clk_data);
772-
return r;
773-
}
774-
775-
static int clk_mt8186_topck_remove(struct platform_device *pdev)
776-
{
777-
struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev);
778-
struct device_node *node = pdev->dev.of_node;
779-
780-
of_clk_del_provider(node);
781-
mtk_clk_unregister_composites(top_muxes, ARRAY_SIZE(top_muxes), clk_data);
782-
mtk_clk_unregister_muxes(top_mtk_muxes, ARRAY_SIZE(top_mtk_muxes), clk_data);
783-
mtk_clk_unregister_factors(top_divs, ARRAY_SIZE(top_divs), clk_data);
784-
mtk_clk_unregister_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks), clk_data);
785-
mtk_free_clk_data(clk_data);
706+
static const struct mtk_clk_desc topck_desc = {
707+
.fixed_clks = top_fixed_clks,
708+
.num_fixed_clks = ARRAY_SIZE(top_fixed_clks),
709+
.factor_clks = top_divs,
710+
.num_factor_clks = ARRAY_SIZE(top_divs),
711+
.mux_clks = top_mtk_muxes,
712+
.num_mux_clks = ARRAY_SIZE(top_mtk_muxes),
713+
.composite_clks = top_muxes,
714+
.num_composite_clks = ARRAY_SIZE(top_muxes),
715+
.clk_lock = &mt8186_clk_lock,
716+
.clk_notifier_func = clk_mt8186_reg_mfg_mux_notifier,
717+
.mfg_clk_idx = CLK_TOP_MFG,
718+
};
786719

787-
return 0;
788-
}
720+
static const struct of_device_id of_match_clk_mt8186_topck[] = {
721+
{ .compatible = "mediatek,mt8186-topckgen", .data = &topck_desc },
722+
{ /* sentinel */ }
723+
};
789724

790725
static struct platform_driver clk_mt8186_topck_drv = {
791-
.probe = clk_mt8186_topck_probe,
792-
.remove = clk_mt8186_topck_remove,
726+
.probe = mtk_clk_simple_probe,
727+
.remove = mtk_clk_simple_remove,
793728
.driver = {
794729
.name = "clk-mt8186-topck",
795730
.of_match_table = of_match_clk_mt8186_topck,

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