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esmilbebarino
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clk: starfive: jh7100: Support more clock types
Unlike the system clocks there are audio clocks that combine both multiplexer/divider and gate/multiplexer/divider, so add support for that. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Link: https://lore.kernel.org/r/20220126173953.1016706-7-kernel@esmil.dk Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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drivers/clk/starfive/clk-starfive-jh7100.c

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@@ -534,6 +534,27 @@ static const struct clk_ops jh7100_clk_gmux_ops = {
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.debug_init = jh7100_clk_debug_init,
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};
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static const struct clk_ops jh7100_clk_mdiv_ops = {
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.recalc_rate = jh7100_clk_recalc_rate,
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.determine_rate = jh7100_clk_determine_rate,
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.get_parent = jh7100_clk_get_parent,
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.set_parent = jh7100_clk_set_parent,
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.set_rate = jh7100_clk_set_rate,
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.debug_init = jh7100_clk_debug_init,
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};
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static const struct clk_ops jh7100_clk_gmd_ops = {
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.enable = jh7100_clk_enable,
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.disable = jh7100_clk_disable,
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.is_enabled = jh7100_clk_is_enabled,
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.recalc_rate = jh7100_clk_recalc_rate,
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.determine_rate = jh7100_clk_determine_rate,
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.get_parent = jh7100_clk_get_parent,
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.set_parent = jh7100_clk_set_parent,
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.set_rate = jh7100_clk_set_rate,
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.debug_init = jh7100_clk_debug_init,
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};
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static const struct clk_ops jh7100_clk_inv_ops = {
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.get_phase = jh7100_clk_get_phase,
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.set_phase = jh7100_clk_set_phase,
@@ -543,6 +564,11 @@ static const struct clk_ops jh7100_clk_inv_ops = {
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const struct clk_ops *starfive_jh7100_clk_ops(u32 max)
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{
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if (max & JH7100_CLK_DIV_MASK) {
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if (max & JH7100_CLK_MUX_MASK) {
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if (max & JH7100_CLK_ENABLE)
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return &jh7100_clk_gmd_ops;
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return &jh7100_clk_mdiv_ops;
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}
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if (max & JH7100_CLK_ENABLE)
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return &jh7100_clk_gdiv_ops;
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if (max == JH7100_CLK_FRAC_MAX)

drivers/clk/starfive/clk-starfive-jh7100.h

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@@ -70,6 +70,21 @@ struct jh7100_clk_data {
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.parents = { __VA_ARGS__ }, \
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}
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#define JH7100_MDIV(_idx, _name, _max, _nparents, ...) [_idx] = { \
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.name = _name, \
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.flags = 0, \
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.max = (((_nparents) - 1) << JH7100_CLK_MUX_SHIFT) | (_max), \
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.parents = { __VA_ARGS__ }, \
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}
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#define JH7100__GMD(_idx, _name, _flags, _max, _nparents, ...) [_idx] = { \
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.name = _name, \
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.flags = _flags, \
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.max = JH7100_CLK_ENABLE | \
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(((_nparents) - 1) << JH7100_CLK_MUX_SHIFT) | (_max), \
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.parents = { __VA_ARGS__ }, \
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}
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#define JH7100__INV(_idx, _name, _parent) [_idx] = { \
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.name = _name, \
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.flags = CLK_SET_RATE_PARENT, \

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