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Merge tag 'soc-newsoc-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull new ARM SoC support from Arnd Bergmann: "There are two new SoC families this time, and both appear fairly similar: The Nuvoton MA35D1 and the STMicroelectronics STM32MP2 are both dual-core Cortex-A35 based chips for the low-power industrial embedded market, and they mark the first 64-bit product in a widely used family of 32-bit Arm MCUs and SoCs. The way into the kernel is completely different here: The team at ST has a long history of working upstream with their STM32MP1 and other SoCs, and they produced a complete port to arm64 together with the initial announcement. Nuvoton also has multiple SoC product lines with current or previous upstream support, but those are maintained by third parties and are unrelated. The patch series from Nuvoton's Jacky Huang had to go through many revisisions to get to this point and is still missing a few drivers including the serial port for the moment. The branch contains the devicetree files as well as all the code changes, in order to have something that can be tested standalone" * tag 'soc-newsoc-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (25 commits) clk: nuvoton: Use clk_parent_data instead of string for parent clock clk: nuvoton: Update all constant hex values to lowercase clk: nuvoton: Add clk-ma35d1.h for driver extern functions remoteproc: stm32: use correct format strings on 64-bit MAINTAINERS: add entry for ARM/STM32 ARCHITECTURE arm64: defconfig: enable ARCH_STM32 and STM32 serial driver arm64: dts: st: add stm32mp257f-ev1 board support dt-bindings: stm32: document stm32mp257f-ev1 board arm64: dts: st: introduce stm32mp25 pinctrl files arm64: dts: st: introduce stm32mp25 SoCs family arm64: introduce STM32 family on Armv8 architecture dt-bindings: stm32: add st,stm32mp25-syscfg compatible for syscon pinctrl: stm32: add stm32mp257 pinctrl support dt-bindings: pinctrl: stm32: support for stm32mp257 and additional packages Documentation/process: add soc maintainer handbook reset: RESET_NUVOTON_MA35D1 should depend on ARCH_MA35 reset: Add Nuvoton ma35d1 reset driver support clk: nuvoton: Add clock driver for ma35d1 clock controller arm64: dts: nuvoton: Add initial ma35d1 device tree dt-bindings: serial: Document ma35d1 uart controller ...
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‎Documentation/devicetree/bindings/arm/nuvoton/nuvoton,ma35d1.yaml‎

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/arm/nuvoton/nuvoton,ma35d1.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Nuvoton MA35 series SoC based platforms
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maintainers:
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- Jacky Huang <ychuang3@nuvoton.com>
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description: |
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Boards with an ARMv8 based Nuvoton MA35 series SoC shall have
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the following properties.
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properties:
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$nodename:
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const: '/'
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compatible:
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oneOf:
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- description: MA35D1 based boards
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items:
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- enum:
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- nuvoton,ma35d1-iot
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- nuvoton,ma35d1-som
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- const: nuvoton,ma35d1
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additionalProperties: true
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...

Documentation/devicetree/bindings/arm/npcm/npcm.yaml renamed to Documentation/devicetree/bindings/arm/nuvoton/nuvoton,npcm.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/arm/npcm/npcm.yaml#
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$id: http://devicetree.org/schemas/arm/nuvoton/nuvoton,npcm.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NPCM Platforms

‎Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml‎

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oneOf:
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- items:
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- enum:
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- st,stm32mp157-syscfg
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- st,stm32mp151-pwr-mcu
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- st,stm32-syscfg
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- st,stm32-power-config
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- st,stm32-syscfg
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- st,stm32-tamp
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- st,stm32f4-gcan
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- st,stm32mp151-pwr-mcu
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- st,stm32mp157-syscfg
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- st,stm32mp25-syscfg
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- const: syscon
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- items:
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- const: st,stm32-tamp

‎Documentation/devicetree/bindings/arm/stm32/stm32.yaml‎

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- const: phytec,phycore-stm32mp157c-som
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- const: st,stm32mp157
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- description: ST STM32MP257 based Boards
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items:
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- enum:
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- st,stm32mp257f-ev1
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- const: st,stm32mp257
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additionalProperties: true
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...

‎Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/nuvoton,ma35d1-clk.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Nuvoton MA35D1 Clock Controller Module
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maintainers:
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- Chi-Fang Li <cfli0@nuvoton.com>
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- Jacky Huang <ychuang3@nuvoton.com>
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description: |
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The MA35D1 clock controller generates clocks for the whole chip,
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including system clocks and all peripheral clocks.
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See also:
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include/dt-bindings/clock/ma35d1-clk.h
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properties:
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compatible:
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items:
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- const: nuvoton,ma35d1-clk
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reg:
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maxItems: 1
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"#clock-cells":
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const: 1
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clocks:
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maxItems: 1
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nuvoton,pll-mode:
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description:
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A list of PLL operation mode corresponding to CAPLL, DDRPLL, APLL,
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EPLL, and VPLL in sequential.
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maxItems: 5
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items:
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enum:
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- integer
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- fractional
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- spread-spectrum
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$ref: /schemas/types.yaml#/definitions/non-unique-string-array
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required:
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- compatible
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- reg
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- "#clock-cells"
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- clocks
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additionalProperties: false
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examples:
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- |
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clock-controller@40460200 {
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compatible = "nuvoton,ma35d1-clk";
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reg = <0x40460200 0x100>;
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#clock-cells = <1>;
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clocks = <&clk_hxt>;
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};
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...

‎Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml‎

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- st,stm32mp135-pinctrl
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- st,stm32mp157-pinctrl
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- st,stm32mp157-z-pinctrl
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- st,stm32mp257-pinctrl
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- st,stm32mp257-z-pinctrl
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'#address-cells':
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Indicates the SOC package used.
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More details in include/dt-bindings/pinctrl/stm32-pinfunc.h
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [1, 2, 4, 8]
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enum: [0x1, 0x2, 0x4, 0x8, 0x100, 0x400, 0x800]
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patternProperties:
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'^gpio@[0-9a-f]*$':

‎Documentation/devicetree/bindings/reset/nuvoton,ma35d1-reset.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/reset/nuvoton,ma35d1-reset.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Nuvoton MA35D1 Reset Controller
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maintainers:
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- Chi-Fang Li <cfli0@nuvoton.com>
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- Jacky Huang <ychuang3@nuvoton.com>
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description:
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The system reset controller can be used to reset various peripheral
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controllers in MA35D1 SoC.
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properties:
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compatible:
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items:
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- const: nuvoton,ma35d1-reset
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reg:
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maxItems: 1
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'#reset-cells':
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const: 1
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required:
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- compatible
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- reg
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- '#reset-cells'
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additionalProperties: false
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examples:
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# system reset controller node:
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- |
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system-management@40460000 {
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compatible = "nuvoton,ma35d1-reset";
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reg = <0x40460000 0x200>;
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#reset-cells = <1>;
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};
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...
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‎Documentation/devicetree/bindings/serial/nuvoton,ma35d1-serial.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/serial/nuvoton,ma35d1-serial.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Nuvoton MA35D1 Universal Asynchronous Receiver/Transmitter (UART)
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maintainers:
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- Min-Jen Chen <mjchen@nuvoton.com>
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- Jacky Huang <ychuang3@nuvoton.com>
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allOf:
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- $ref: serial.yaml
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properties:
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compatible:
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const: nuvoton,ma35d1-uart
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
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serial@40700000 {
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compatible = "nuvoton,ma35d1-uart";
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reg = <0x40700000 0x100>;
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interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk UART0_GATE>;
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};
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...

Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml renamed to Documentation/devicetree/bindings/soc/nuvoton/nuvoton,npcm-gcr.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/arm/npcm/nuvoton,gcr.yaml#
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$id: http://devicetree.org/schemas/soc/nuvoton/nuvoton,npcm-gcr.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Global Control Registers block in Nuvoton SoCs

‎Documentation/process/maintainer-handbooks.rst‎

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:numbered:
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:maxdepth: 2
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maintainer-tip
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maintainer-netdev
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maintainer-soc
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maintainer-tip

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