Skip to content

Commit f50a000

Browse files
ychuang3arndb
authored andcommitted
clk: nuvoton: Use clk_parent_data instead of string for parent clock
For the declaration of parent clocks, use struct clk_parent_data instead of a string. Due to the change in the passed arguments, replace the usage of devm_clk_hw_register_mux() with clk_hw_register_mux_parent_data() for all cases. Signed-off-by: Jacky Huang <ychuang3@nuvoton.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
1 parent ebd617b commit f50a000

1 file changed

Lines changed: 219 additions & 87 deletions

File tree

drivers/clk/nuvoton/clk-ma35d1.c

Lines changed: 219 additions & 87 deletions
Original file line numberDiff line numberDiff line change
@@ -63,167 +63,298 @@ static DEFINE_SPINLOCK(ma35d1_lock);
6363
#define PLL_MODE_SS 2
6464

6565
static const struct clk_parent_data ca35clk_sel_clks[] = {
66-
{ .index = 0 }, /* HXT */
67-
{ .index = 1 }, /* CAPLL */
68-
{ .index = 2 } /* DDRPLL */
66+
{ .fw_name = "hxt", },
67+
{ .fw_name = "capll", },
68+
{ .fw_name = "ddrpll", },
6969
};
7070

71-
static const char *const sysclk0_sel_clks[] = {
72-
"epll_div2", "syspll"
71+
static const struct clk_parent_data sysclk0_sel_clks[] = {
72+
{ .fw_name = "epll_div2", },
73+
{ .fw_name = "syspll", },
7374
};
7475

75-
static const char *const sysclk1_sel_clks[] = {
76-
"hxt", "syspll"
76+
static const struct clk_parent_data sysclk1_sel_clks[] = {
77+
{ .fw_name = "hxt", },
78+
{ .fw_name = "syspll", },
7779
};
7880

79-
static const char *const axiclk_sel_clks[] = {
80-
"capll_div2", "capll_div4"
81+
static const struct clk_parent_data axiclk_sel_clks[] = {
82+
{ .fw_name = "capll_div2", },
83+
{ .fw_name = "capll_div4", },
8184
};
8285

83-
static const char *const ccap_sel_clks[] = {
84-
"hxt", "vpll", "apll", "syspll"
86+
static const struct clk_parent_data ccap_sel_clks[] = {
87+
{ .fw_name = "hxt", },
88+
{ .fw_name = "vpll", },
89+
{ .fw_name = "apll", },
90+
{ .fw_name = "syspll", },
8591
};
8692

87-
static const char *const sdh_sel_clks[] = {
88-
"syspll", "apll", "dummy", "dummy"
93+
static const struct clk_parent_data sdh_sel_clks[] = {
94+
{ .fw_name = "syspll", },
95+
{ .fw_name = "apll", },
8996
};
9097

91-
static const char *const dcu_sel_clks[] = {
92-
"epll_div2", "syspll"
98+
static const struct clk_parent_data dcu_sel_clks[] = {
99+
{ .fw_name = "epll_div2", },
100+
{ .fw_name = "syspll", },
93101
};
94102

95-
static const char *const gfx_sel_clks[] = {
96-
"epll", "syspll"
103+
static const struct clk_parent_data gfx_sel_clks[] = {
104+
{ .fw_name = "epll", },
105+
{ .fw_name = "syspll", },
97106
};
98107

99-
static const char *const dbg_sel_clks[] = {
100-
"hirc", "syspll"
108+
static const struct clk_parent_data dbg_sel_clks[] = {
109+
{ .fw_name = "hirc", },
110+
{ .fw_name = "syspll", },
101111
};
102112

103-
static const char *const timer0_sel_clks[] = {
104-
"hxt", "lxt", "pclk0", "dummy", "dummy", "lirc", "dummy", "hirc"
113+
static const struct clk_parent_data timer0_sel_clks[] = {
114+
{ .fw_name = "hxt", },
115+
{ .fw_name = "lxt", },
116+
{ .fw_name = "pclk0", },
117+
{ .index = -1, },
118+
{ .index = -1, },
119+
{ .fw_name = "lirc", },
120+
{ .index = -1, },
121+
{ .fw_name = "hirc", },
105122
};
106123

107-
static const char *const timer1_sel_clks[] = {
108-
"hxt", "lxt", "pclk0", "dummy", "dummy", "lirc", "dummy", "hirc"
124+
static const struct clk_parent_data timer1_sel_clks[] = {
125+
{ .fw_name = "hxt", },
126+
{ .fw_name = "lxt", },
127+
{ .fw_name = "pclk0", },
128+
{ .index = -1, },
129+
{ .index = -1, },
130+
{ .fw_name = "lirc", },
131+
{ .index = -1, },
132+
{ .fw_name = "hirc", },
109133
};
110134

111-
static const char *const timer2_sel_clks[] = {
112-
"hxt", "lxt", "pclk1", "dummy", "dummy", "lirc", "dummy", "hirc"
135+
static const struct clk_parent_data timer2_sel_clks[] = {
136+
{ .fw_name = "hxt", },
137+
{ .fw_name = "lxt", },
138+
{ .fw_name = "pclk1", },
139+
{ .index = -1, },
140+
{ .index = -1, },
141+
{ .fw_name = "lirc", },
142+
{ .index = -1, },
143+
{ .fw_name = "hirc", },
113144
};
114145

115-
static const char *const timer3_sel_clks[] = {
116-
"hxt", "lxt", "pclk1", "dummy", "dummy", "lirc", "dummy", "hirc"
146+
static const struct clk_parent_data timer3_sel_clks[] = {
147+
{ .fw_name = "hxt", },
148+
{ .fw_name = "lxt", },
149+
{ .fw_name = "pclk1", },
150+
{ .index = -1, },
151+
{ .index = -1, },
152+
{ .fw_name = "lirc", },
153+
{ .index = -1, },
154+
{ .fw_name = "hirc", },
117155
};
118156

119-
static const char *const timer4_sel_clks[] = {
120-
"hxt", "lxt", "pclk2", "dummy", "dummy", "lirc", "dummy", "hirc"
157+
static const struct clk_parent_data timer4_sel_clks[] = {
158+
{ .fw_name = "hxt", },
159+
{ .fw_name = "lxt", },
160+
{ .fw_name = "pclk2", },
161+
{ .index = -1, },
162+
{ .index = -1, },
163+
{ .fw_name = "lirc", },
164+
{ .index = -1, },
165+
{ .fw_name = "hirc", },
121166
};
122167

123-
static const char *const timer5_sel_clks[] = {
124-
"hxt", "lxt", "pclk2", "dummy", "dummy", "lirc", "dummy", "hirc"
168+
static const struct clk_parent_data timer5_sel_clks[] = {
169+
{ .fw_name = "hxt", },
170+
{ .fw_name = "lxt", },
171+
{ .fw_name = "pclk2", },
172+
{ .index = -1, },
173+
{ .index = -1, },
174+
{ .fw_name = "lirc", },
175+
{ .index = -1, },
176+
{ .fw_name = "hirc", },
125177
};
126178

127-
static const char *const timer6_sel_clks[] = {
128-
"hxt", "lxt", "pclk0", "dummy", "dummy", "lirc", "dummy", "hirc"
179+
static const struct clk_parent_data timer6_sel_clks[] = {
180+
{ .fw_name = "hxt", },
181+
{ .fw_name = "lxt", },
182+
{ .fw_name = "pclk0", },
183+
{ .index = -1, },
184+
{ .index = -1, },
185+
{ .fw_name = "lirc", },
186+
{ .index = -1, },
187+
{ .fw_name = "hirc", },
129188
};
130189

131-
static const char *const timer7_sel_clks[] = {
132-
"hxt", "lxt", "pclk0", "dummy", "dummy", "lirc", "dummy", "hirc"
190+
static const struct clk_parent_data timer7_sel_clks[] = {
191+
{ .fw_name = "hxt", },
192+
{ .fw_name = "lxt", },
193+
{ .fw_name = "pclk0", },
194+
{ .index = -1, },
195+
{ .index = -1, },
196+
{ .fw_name = "lirc", },
197+
{ .index = -1, },
198+
{ .fw_name = "hirc", },
133199
};
134200

135-
static const char *const timer8_sel_clks[] = {
136-
"hxt", "lxt", "pclk1", "dummy", "dummy", "lirc", "dummy", "hirc"
201+
static const struct clk_parent_data timer8_sel_clks[] = {
202+
{ .fw_name = "hxt", },
203+
{ .fw_name = "lxt", },
204+
{ .fw_name = "pclk1", },
205+
{ .index = -1, },
206+
{ .index = -1, },
207+
{ .fw_name = "lirc", },
208+
{ .index = -1, },
209+
{ .fw_name = "hirc", },
137210
};
138211

139-
static const char *const timer9_sel_clks[] = {
140-
"hxt", "lxt", "pclk1", "dummy", "dummy", "lirc", "dummy", "hirc"
212+
static const struct clk_parent_data timer9_sel_clks[] = {
213+
{ .fw_name = "hxt", },
214+
{ .fw_name = "lxt", },
215+
{ .fw_name = "pclk1", },
216+
{ .index = -1, },
217+
{ .index = -1, },
218+
{ .fw_name = "lirc", },
219+
{ .index = -1, },
220+
{ .fw_name = "hirc", },
141221
};
142222

143-
static const char *const timer10_sel_clks[] = {
144-
"hxt", "lxt", "pclk2", "dummy", "dummy", "lirc", "dummy", "hirc"
223+
static const struct clk_parent_data timer10_sel_clks[] = {
224+
{ .fw_name = "hxt", },
225+
{ .fw_name = "lxt", },
226+
{ .fw_name = "pclk2", },
227+
{ .index = -1, },
228+
{ .index = -1, },
229+
{ .fw_name = "lirc", },
230+
{ .index = -1, },
231+
{ .fw_name = "hirc", },
145232
};
146233

147-
static const char *const timer11_sel_clks[] = {
148-
"hxt", "lxt", "pclk2", "dummy", "dummy", "lirc", "dummy", "hirc"
234+
static const struct clk_parent_data timer11_sel_clks[] = {
235+
{ .fw_name = "hxt", },
236+
{ .fw_name = "lxt", },
237+
{ .fw_name = "pclk2", },
238+
{ .index = -1, },
239+
{ .index = -1, },
240+
{ .fw_name = "lirc", },
241+
{ .index = -1, },
242+
{ .fw_name = "hirc", },
149243
};
150244

151-
static const char *const uart_sel_clks[] = {
152-
"hxt", "sysclk1_div2", "dummy", "dummy"
245+
static const struct clk_parent_data uart_sel_clks[] = {
246+
{ .fw_name = "hxt", },
247+
{ .fw_name = "sysclk1_div2", },
153248
};
154249

155-
static const char *const wdt0_sel_clks[] = {
156-
"dummy", "lxt", "pclk3_div4096", "lirc"
250+
static const struct clk_parent_data wdt0_sel_clks[] = {
251+
{ .index = -1, },
252+
{ .fw_name = "lxt", },
253+
{ .fw_name = "pclk3_div4096", },
254+
{ .fw_name = "lirc", },
157255
};
158256

159-
static const char *const wdt1_sel_clks[] = {
160-
"dummy", "lxt", "pclk3_div4096", "lirc"
257+
static const struct clk_parent_data wdt1_sel_clks[] = {
258+
{ .index = -1, },
259+
{ .fw_name = "lxt", },
260+
{ .fw_name = "pclk3_div4096", },
261+
{ .fw_name = "lirc", },
161262
};
162263

163-
static const char *const wdt2_sel_clks[] = {
164-
"dummy", "lxt", "pclk4_div4096", "lirc"
264+
static const struct clk_parent_data wdt2_sel_clks[] = {
265+
{ .index = -1, },
266+
{ .fw_name = "lxt", },
267+
{ .fw_name = "pclk4_div4096", },
268+
{ .fw_name = "lirc", },
165269
};
166270

167-
static const char *const wwdt0_sel_clks[] = {
168-
"dummy", "dummy", "pclk3_div4096", "lirc"
271+
static const struct clk_parent_data wwdt0_sel_clks[] = {
272+
{ .index = -1, },
273+
{ .index = -1, },
274+
{ .fw_name = "pclk3_div4096", },
275+
{ .fw_name = "lirc", },
169276
};
170277

171-
static const char *const wwdt1_sel_clks[] = {
172-
"dummy", "dummy", "pclk3_div4096", "lirc"
278+
static const struct clk_parent_data wwdt1_sel_clks[] = {
279+
{ .index = -1, },
280+
{ .index = -1, },
281+
{ .fw_name = "pclk3_div4096", },
282+
{ .fw_name = "lirc", },
173283
};
174284

175-
static const char *const wwdt2_sel_clks[] = {
176-
"dummy", "dummy", "pclk4_div4096", "lirc"
285+
static const struct clk_parent_data wwdt2_sel_clks[] = {
286+
{ .index = -1, },
287+
{ .index = -1, },
288+
{ .fw_name = "pclk4_div4096", },
289+
{ .fw_name = "lirc", },
177290
};
178291

179-
static const char *const spi0_sel_clks[] = {
180-
"pclk1", "apll", "dummy", "dummy"
292+
static const struct clk_parent_data spi0_sel_clks[] = {
293+
{ .fw_name = "pclk1", },
294+
{ .fw_name = "apll", },
181295
};
182296

183-
static const char *const spi1_sel_clks[] = {
184-
"pclk2", "apll", "dummy", "dummy"
297+
static const struct clk_parent_data spi1_sel_clks[] = {
298+
{ .fw_name = "pclk2", },
299+
{ .fw_name = "apll", },
185300
};
186301

187-
static const char *const spi2_sel_clks[] = {
188-
"pclk1", "apll", "dummy", "dummy"
302+
static const struct clk_parent_data spi2_sel_clks[] = {
303+
{ .fw_name = "pclk1", },
304+
{ .fw_name = "apll", },
189305
};
190306

191-
static const char *const spi3_sel_clks[] = {
192-
"pclk2", "apll", "dummy", "dummy"
307+
static const struct clk_parent_data spi3_sel_clks[] = {
308+
{ .fw_name = "pclk2", },
309+
{ .fw_name = "apll", },
193310
};
194311

195-
static const char *const qspi0_sel_clks[] = {
196-
"pclk0", "apll", "dummy", "dummy"
312+
static const struct clk_parent_data qspi0_sel_clks[] = {
313+
{ .fw_name = "pclk0", },
314+
{ .fw_name = "apll", },
197315
};
198316

199-
static const char *const qspi1_sel_clks[] = {
200-
"pclk0", "apll", "dummy", "dummy"
317+
static const struct clk_parent_data qspi1_sel_clks[] = {
318+
{ .fw_name = "pclk0", },
319+
{ .fw_name = "apll", },
201320
};
202321

203-
static const char *const i2s0_sel_clks[] = {
204-
"apll", "sysclk1_div2", "dummy", "dummy"
322+
static const struct clk_parent_data i2s0_sel_clks[] = {
323+
{ .fw_name = "apll", },
324+
{ .fw_name = "sysclk1_div2", },
205325
};
206326

207-
static const char *const i2s1_sel_clks[] = {
208-
"apll", "sysclk1_div2", "dummy", "dummy"
327+
static const struct clk_parent_data i2s1_sel_clks[] = {
328+
{ .fw_name = "apll", },
329+
{ .fw_name = "sysclk1_div2", },
209330
};
210331

211-
static const char *const can_sel_clks[] = {
212-
"apll", "vpll"
332+
static const struct clk_parent_data can_sel_clks[] = {
333+
{ .fw_name = "apll", },
334+
{ .fw_name = "vpll", },
213335
};
214336

215-
static const char *const cko_sel_clks[] = {
216-
"hxt", "lxt", "hirc", "lirc", "capll_div4", "syspll",
217-
"ddrpll", "epll_div2", "apll", "vpll", "dummy", "dummy",
218-
"dummy", "dummy", "dummy", "dummy"
337+
static const struct clk_parent_data cko_sel_clks[] = {
338+
{ .fw_name = "hxt", },
339+
{ .fw_name = "lxt", },
340+
{ .fw_name = "hirc", },
341+
{ .fw_name = "lirc", },
342+
{ .fw_name = "capll_div4", },
343+
{ .fw_name = "syspll", },
344+
{ .fw_name = "ddrpll", },
345+
{ .fw_name = "epll_div2", },
346+
{ .fw_name = "apll", },
347+
{ .fw_name = "vpll", },
219348
};
220349

221-
static const char *const smc_sel_clks[] = {
222-
"hxt", "pclk4"
350+
static const struct clk_parent_data smc_sel_clks[] = {
351+
{ .fw_name = "hxt", },
352+
{ .fw_name = "pclk4", },
223353
};
224354

225-
static const char *const kpi_sel_clks[] = {
226-
"hxt", "lxt"
355+
static const struct clk_parent_data kpi_sel_clks[] = {
356+
{ .fw_name = "hxt", },
357+
{ .fw_name = "lxt", },
227358
};
228359

229360
static const struct clk_div_table ip_div_table[] = {
@@ -255,11 +386,12 @@ static struct clk_hw *ma35d1_clk_mux_parent(struct device *dev, const char *name
255386

256387
static struct clk_hw *ma35d1_clk_mux(struct device *dev, const char *name,
257388
void __iomem *reg, u8 shift, u8 width,
258-
const char *const *parents, int num_parents)
389+
const struct clk_parent_data *pdata,
390+
int num_pdata)
259391
{
260-
return devm_clk_hw_register_mux(dev, name, parents, num_parents,
261-
CLK_SET_RATE_NO_REPARENT, reg, shift,
262-
width, 0, &ma35d1_lock);
392+
return clk_hw_register_mux_parent_data(dev, name, pdata, num_pdata,
393+
CLK_SET_RATE_NO_REPARENT, reg, shift,
394+
width, 0, &ma35d1_lock);
263395
}
264396

265397
static struct clk_hw *ma35d1_clk_divider(struct device *dev, const char *name,

0 commit comments

Comments
 (0)