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Merge tag 'renesas-dts-for-v6.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.20 (take two) - Add cpufreq, thermal, GPIO IRQ, and CAN-FD support for the RZ/T2H and RZ/N2H SoCs and their EVK boards, - Add more serial (RSCI) and CAN-FD support for the RZ/V2H and RZ/V2N SoCs, - Drop unused .dtsi files, - Add I3C support for the RZ/G3E SMARC SoM, - Add GPIO support for the RZ/N1 SoC, - Miscellaneous fixes and improvements. * tag 'renesas-dts-for-v6.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (27 commits) arm64: dts: renesas: rzt2h-rzn2h-evk: Reorder ADC nodes ARM: dts: r9a06g032: Add support for GPIO interrupts ARM: dts: r9a06g032: Add GPIO controllers arm64: dts: renesas: rzg3e-smarc-som: Enable I3C support arm64: dts: renesas: Use lowercase hex arm64: dts: renesas: Use hyphens in node names arm/arm64: dts: renesas: Drop unused .dtsi arm64: dts: renesas: rzt2h-n2h-evk-common: Use GPIO for SD0 write protect arm64: dts: renesas: r9a09g057: Add CANFD node arm64: dts: renesas: r9a09g056: Add CANFD node arm64: dts: renesas: r9a09g087m44-rzn2h-evk: Enable CANFD arm64: dts: renesas: r9a09g077m44-rzt2h-evk: Enable CANFD arm64: dts: renesas: r9a09g087: Add CANFD node arm64: dts: renesas: r9a09g077: Add CANFD node arm64: dts: renesas: r9a09g057: Add RSCI nodes arm64: dts: renesas: r9a09g056: Add RSCI nodes arm64: dts: renesas: r9a09g087m44-rzn2h-evk: Add GPIO keys arm64: dts: renesas: r9a09g077m44-rzt2h-evk: Add GPIO keys arm64: dts: renesas: r9a09g087: Add GPIO IRQ support arm64: dts: renesas: r9a09g077: Add GPIO IRQ support ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 parents 6e646ea + 5979010 commit ab8292d

47 files changed

Lines changed: 1426 additions & 986 deletions

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‎arch/arm/boot/dts/renesas/gr-peach-audiocamerashield.dtsi‎

Lines changed: 0 additions & 75 deletions
This file was deleted.

‎arch/arm/boot/dts/renesas/r8a77xx-aa121td01-panel.dtsi‎

Lines changed: 0 additions & 39 deletions
This file was deleted.

‎arch/arm/boot/dts/renesas/r9a06g032.dtsi‎

Lines changed: 159 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -515,6 +515,165 @@
515515
<GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
516516
};
517517

518+
/*
519+
* The GPIO mapping to the corresponding pins is not obvious.
520+
* See the hardware documentation for details.
521+
*/
522+
gpio0: gpio@5000b000 {
523+
compatible = "snps,dw-apb-gpio";
524+
reg = <0x5000b000 0x80>;
525+
#address-cells = <1>;
526+
#size-cells = <0>;
527+
clocks = <&sysctrl R9A06G032_HCLK_GPIO0>;
528+
clock-names = "bus";
529+
530+
/* GPIO0a[0] connected to pin GPIO0 */
531+
/* GPIO0a[1..2] connected to pins GPIO3..4 */
532+
/* GPIO0a[3..4] connected to pins GPIO9..10 */
533+
/* GPIO0a[5] connected to pin GPIO12 */
534+
/* GPIO0a[6..7] connected to pins GPIO15..16 */
535+
/* GPIO0a[8..9] connected to pins GPIO21..22 */
536+
/* GPIO0a[10] connected to pin GPIO24 */
537+
/* GPIO0a[11..12] connected to pins GPIO27..28 */
538+
/* GPIO0a[13..14] connected to pins GPIO33..34 */
539+
/* GPIO0a[15] connected to pin GPIO36 */
540+
/* GPIO0a[16..17] connected to pins GPIO39..40 */
541+
/* GPIO0a[18..19] connected to pins GPIO45..46 */
542+
/* GPIO0a[20] connected to pin GPIO48 */
543+
/* GPIO0a[21..22] connected to pins GPIO51..52 */
544+
/* GPIO0a[23..24] connected to pins GPIO57..58 */
545+
/* GPIO0a[25..31] connected to pins GPIO62..68 */
546+
gpio0a: gpio-port@0 {
547+
compatible = "snps,dw-apb-gpio-port";
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reg = <0>;
549+
gpio-controller;
550+
#gpio-cells = <2>;
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snps,nr-gpios = <32>;
552+
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interrupt-controller;
554+
interrupt-parent = <&gpioirqmux>;
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interrupts = < 0 1 2 3 4 5 6 7
556+
8 9 10 11 12 13 14 15
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16 17 18 19 20 21 22 23
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24 25 26 27 28 29 30 31>;
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#interrupt-cells = <2>;
560+
};
561+
562+
/* GPIO0b[0..1] connected to pins GPIO1..2 */
563+
/* GPIO0b[2..5] connected to pins GPIO5..8 */
564+
/* GPIO0b[6] connected to pin GPIO11 */
565+
/* GPIO0b[7..8] connected to pins GPIO13..14 */
566+
/* GPIO0b[9..12] connected to pins GPIO17..20 */
567+
/* GPIO0b[13] connected to pin GPIO23 */
568+
/* GPIO0b[14..15] connected to pins GPIO25..26 */
569+
/* GPIO0b[16..19] connected to pins GPIO29..32 */
570+
/* GPIO0b[20] connected to pin GPIO35 */
571+
/* GPIO0b[21..22] connected to pins GPIO37..38 */
572+
/* GPIO0b[23..26] connected to pins GPIO41..44 */
573+
/* GPIO0b[27] connected to pin GPIO47 */
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/* GPIO0b[28..29] connected to pins GPIO49..50 */
575+
/* GPIO0b[30..31] connected to pins GPIO53..54 */
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gpio0b: gpio-port@1 {
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compatible = "snps,dw-apb-gpio-port";
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reg = <1>;
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gpio-controller;
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#gpio-cells = <2>;
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snps,nr-gpios = <32>;
582+
};
583+
};
584+
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gpio1: gpio@5000c000 {
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compatible = "snps,dw-apb-gpio";
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reg = <0x5000c000 0x80>;
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#address-cells = <1>;
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#size-cells = <0>;
590+
clocks = <&sysctrl R9A06G032_HCLK_GPIO1>;
591+
clock-names = "bus";
592+
593+
/* GPIO1a[0..4] connected to pins GPIO69..73 */
594+
/* GPIO1a[5..31] connected to pins GPIO95..121 */
595+
gpio1a: gpio-port@0 {
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compatible = "snps,dw-apb-gpio-port";
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reg = <0>;
598+
gpio-controller;
599+
#gpio-cells = <2>;
600+
snps,nr-gpios = <32>;
601+
602+
interrupt-controller;
603+
interrupt-parent = <&gpioirqmux>;
604+
interrupts = <32 33 34 35 36 37 38 39
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40 41 42 43 44 45 46 47
606+
48 49 50 51 52 53 54 55
607+
56 57 58 59 60 61 62 63>;
608+
#interrupt-cells = <2>;
609+
};
610+
611+
/* GPIO1b[0..1] connected to pins GPIO55..56 */
612+
/* GPIO1b[2..4] connected to pins GPIO59..61 */
613+
/* GPIO1b[5..25] connected to pins GPIO74..94 */
614+
/* GPIO1b[26..31] connected to pins GPIO150..155 */
615+
gpio1b: gpio-port@1 {
616+
compatible = "snps,dw-apb-gpio-port";
617+
reg = <1>;
618+
gpio-controller;
619+
#gpio-cells = <2>;
620+
snps,nr-gpios = <32>;
621+
};
622+
};
623+
624+
gpio2: gpio@5000d000 {
625+
compatible = "snps,dw-apb-gpio";
626+
reg = <0x5000d000 0x80>;
627+
#address-cells = <1>;
628+
#size-cells = <0>;
629+
clocks = <&sysctrl R9A06G032_HCLK_GPIO2>;
630+
clock-names = "bus";
631+
632+
/* GPIO2a[0..27] connected to pins GPIO122..149 */
633+
/* GPIO2a[28..31] connected to pins GPIO156..159 */
634+
gpio2a: gpio-port@0 {
635+
compatible = "snps,dw-apb-gpio-port";
636+
reg = <0>;
637+
gpio-controller;
638+
#gpio-cells = <2>;
639+
snps,nr-gpios = <32>;
640+
641+
interrupt-controller;
642+
interrupt-parent = <&gpioirqmux>;
643+
interrupts = <64 65 66 67 68 69 70 71
644+
72 73 74 75 76 77 78 79
645+
80 81 82 83 84 85 86 87
646+
88 89 90 91 92 93 94 95>;
647+
#interrupt-cells = <2>;
648+
};
649+
650+
/* GPIO2b[0..9] connected to pins GPIO160..169 */
651+
gpio2b: gpio-port@1 {
652+
compatible = "snps,dw-apb-gpio-port";
653+
reg = <1>;
654+
gpio-controller;
655+
#gpio-cells = <2>;
656+
snps,nr-gpios = <10>;
657+
};
658+
};
659+
660+
gpioirqmux: interrupt-controller@51000480 {
661+
compatible = "renesas,r9a06g032-gpioirqmux", "renesas,rzn1-gpioirqmux";
662+
reg = <0x51000480 0x20>;
663+
#interrupt-cells = <1>;
664+
#address-cells = <0>;
665+
interrupt-map-mask = <0x7f>;
666+
667+
/*
668+
* Example mapping entry. Board DTs need to overwrite
669+
* 'interrupt-map' with their specific mapping. Check
670+
* the irqmux binding documentation for details.
671+
*/
672+
interrupt-map = <0 &gic GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
673+
674+
status = "disabled";
675+
};
676+
518677
can0: can@52104000 {
519678
compatible = "renesas,r9a06g032-sja1000", "renesas,rzn1-sja1000";
520679
reg = <0x52104000 0x800>;

‎arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -158,7 +158,7 @@
158158
reg = <0x51>;
159159
};
160160

161-
versaclock5: versaclock_som@6a {
161+
versaclock5: versaclock-som@6a {
162162
compatible = "idt,5p49v6965";
163163
reg = <0x6a>;
164164
#clock-cells = <1>;

‎arch/arm64/boot/dts/renesas/condor-common.dtsi‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -501,15 +501,15 @@
501501
reg = <0x00040000 0x080000>;
502502
read-only;
503503
};
504-
cert_header_sa3@c0000 {
504+
cert-header-sa3@c0000 {
505505
reg = <0x000c0000 0x080000>;
506506
read-only;
507507
};
508508
bl2@140000 {
509509
reg = <0x00140000 0x040000>;
510510
read-only;
511511
};
512-
cert_header_sa6@180000 {
512+
cert-header-sa6@180000 {
513513
reg = <0x00180000 0x040000>;
514514
read-only;
515515
};

‎arch/arm64/boot/dts/renesas/draak.dtsi‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -660,7 +660,7 @@
660660
reg = <0x00040000 0x140000>;
661661
read-only;
662662
};
663-
cert_header_sa6@180000 {
663+
cert-header-sa6@180000 {
664664
reg = <0x00180000 0x040000>;
665665
read-only;
666666
};

‎arch/arm64/boot/dts/renesas/ebisu.dtsi‎

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Original file line numberDiff line numberDiff line change
@@ -765,7 +765,7 @@
765765
reg = <0x00040000 0x140000>;
766766
read-only;
767767
};
768-
cert_header_sa6@180000 {
768+
cert-header-sa6@180000 {
769769
reg = <0x00180000 0x040000>;
770770
read-only;
771771
};

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